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From: Hongxing Zhu <hongxing.zhu@nxp.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "l.stach@pengutronix.de" <l.stach@pengutronix.de>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [RFC 2/2] PCI: imx6: Enable imx6qp pcie power management support
Date: Thu, 10 Feb 2022 03:23:19 +0000	[thread overview]
Message-ID: <AS8PR04MB867616CDC587BB93772AC8588C2F9@AS8PR04MB8676.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20220209153636.GA557361@bhelgaas>

> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: 2022年2月9日 23:37
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; shawnguo@kernel.org; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [RFC 2/2] PCI: imx6: Enable imx6qp pcie power management
> support
> 
> In subject, s/pcie/PCIe/ or remove it altogether, since I don't think it adds
> useful information.
> 
> On Wed, Feb 09, 2022 at 03:02:36PM +0800, Richard Zhu wrote:
> > i.MX6QP PCIe supports the RESET logic, thus it can support the L2 exit
> > by the reset mechanism.
> > Enable the i.MX6QP PCIe suspend/resume operations support.
> 
> Add blank line between paragraphs or rewrap into a single paragraph.
Got that, thanks.

> 
> Rewrap to fill 75 columns.
Okay, would be changed.

> 
> What does "L2 exit by reset mechanism" mean?  Is this an i.MX6-specific
> thing?  If not, can you point me to the relevant part of the PCIe spec?
No, it's not i.MX6 specific thing. i.MX6Q/DL doesn't have the self-reset mechanism.
Thus, it can't reset itself to an initialized stat when link exit from the L2
or L3 stats.
i.MX6QP PCIe has the self-reset mechanism, and it can reset itself when link
exit from L2 or L3 stats.
The commit description might not accurate.
How about change them to "i.MX6QP PCIe supports the RESET logic, thus it can
 reset itself to the initialized stat when exit from L2 or L3 stats."

Best Regards
Richard Zhu
> 
> Bjorn

  reply	other threads:[~2022-02-10  3:23 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-09  7:02 [RFC 1/2] ARM: dts: imx6qp-sabresd: Enable pcie support Richard Zhu
2022-02-09  7:02 ` [RFC 2/2] PCI: imx6: Enable imx6qp pcie power management support Richard Zhu
2022-02-09  9:07   ` Lucas Stach
2022-02-10  1:58     ` Hongxing Zhu
2022-02-09 15:36   ` Bjorn Helgaas
2022-02-10  3:23     ` Hongxing Zhu [this message]
2022-02-10 22:04       ` Bjorn Helgaas
2022-02-11  2:05         ` Hongxing Zhu
2022-02-11 16:53           ` Bjorn Helgaas
2022-02-15  3:16             ` Hongxing Zhu
2022-02-09  9:05 ` [RFC 1/2] ARM: dts: imx6qp-sabresd: Enable pcie support Lucas Stach
2022-02-10  1:49   ` Hongxing Zhu

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