* [PATCH AUTOSEL 5.4 038/108] sh_eth: check sh_eth_cpu_data::no_tx_cntrs when dumping registers
[not found] <20200411230943.24951-1-sashal@kernel.org>
@ 2020-04-11 23:08 ` Sasha Levin
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 039/108] sh_eth: check sh_eth_cpu_data::cexcr " Sasha Levin
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-04-11 23:08 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sergei Shtylyov, Chris Brandt, David S . Miller, Sasha Levin,
netdev, linux-renesas-soc
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[ Upstream commit 6eaeedc1aa27a423bd89043705eca39215015bb3 ]
When adding the sh_eth_cpu_data::no_tx_cntrs flag I forgot to add the
flag check to __sh_eth_get_regs(), causing the non-existing TX counter
registers to be considered for dumping on the R7S72100 SoC (the register
offset sanity check has the final say here)...
Fixes: ce9134dff6d9 ("sh_eth: add sh_eth_cpu_data::no_tx_cntrs flag")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/net/ethernet/renesas/sh_eth.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 8aa1b1bda96d1..6488d19c0b4d2 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -2184,10 +2184,12 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
add_reg(BCULR);
add_reg(MAHR);
add_reg(MALR);
- add_reg(TROCR);
- add_reg(CDCR);
- add_reg(LCCR);
- add_reg(CNDCR);
+ if (!cd->no_tx_cntrs) {
+ add_reg(TROCR);
+ add_reg(CDCR);
+ add_reg(LCCR);
+ add_reg(CNDCR);
+ }
add_reg(CEFCR);
add_reg(FRECR);
add_reg(TSFRCR);
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH AUTOSEL 5.4 039/108] sh_eth: check sh_eth_cpu_data::cexcr when dumping registers
[not found] <20200411230943.24951-1-sashal@kernel.org>
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 038/108] sh_eth: check sh_eth_cpu_data::no_tx_cntrs when dumping registers Sasha Levin
@ 2020-04-11 23:08 ` Sasha Levin
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 040/108] sh_eth: check sh_eth_cpu_data::no_xdfar " Sasha Levin
2020-04-11 23:09 ` [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs Sasha Levin
3 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-04-11 23:08 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sergei Shtylyov, Chris Brandt, David S . Miller, Sasha Levin,
netdev, linux-renesas-soc
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[ Upstream commit f75ca32403dbf91e20c275719aab705401b9e718 ]
When adding the sh_eth_cpu_data::cexcr flag I forgot to add the flag
check to __sh_eth_get_regs(), causing the non-existing RX packet counter
registers to be considered for dumping on the R7S72100 SoC (the register
offset sanity check has the final say here)...
Fixes: 4c1d45850d5 ("sh_eth: add sh_eth_cpu_data::cexcr flag")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/net/ethernet/renesas/sh_eth.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 6488d19c0b4d2..59f5db1ef29e9 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -2194,8 +2194,10 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
add_reg(FRECR);
add_reg(TSFRCR);
add_reg(TLFRCR);
- add_reg(CERCR);
- add_reg(CEECR);
+ if (cd->cexcr) {
+ add_reg(CERCR);
+ add_reg(CEECR);
+ }
add_reg(MAFCR);
if (cd->rtrate)
add_reg(RTRATE);
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH AUTOSEL 5.4 040/108] sh_eth: check sh_eth_cpu_data::no_xdfar when dumping registers
[not found] <20200411230943.24951-1-sashal@kernel.org>
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 038/108] sh_eth: check sh_eth_cpu_data::no_tx_cntrs when dumping registers Sasha Levin
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 039/108] sh_eth: check sh_eth_cpu_data::cexcr " Sasha Levin
@ 2020-04-11 23:08 ` Sasha Levin
2020-04-11 23:09 ` [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs Sasha Levin
3 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-04-11 23:08 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sergei Shtylyov, Chris Brandt, David S . Miller, Sasha Levin,
netdev, linux-renesas-soc
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[ Upstream commit 7bf47f609f7eaac4f7e9c407a85ad78997288a38 ]
When adding the sh_eth_cpu_data::no_xdfar flag I forgot to add the flag
check to __sh_eth_get_regs(), causing the non-existing RDFAR/TDFAR to be
considered for dumping on the R-Car gen1/2 SoCs (the register offset check
has the final say here)...
Fixes: 4c1d45850d5 ("sh_eth: add sh_eth_cpu_data::cexcr flag")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/net/ethernet/renesas/sh_eth.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 59f5db1ef29e9..7440da726d68f 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -2140,11 +2140,13 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
add_reg(EESR);
add_reg(EESIPR);
add_reg(TDLAR);
- add_reg(TDFAR);
+ if (!cd->no_xdfar)
+ add_reg(TDFAR);
add_reg(TDFXR);
add_reg(TDFFR);
add_reg(RDLAR);
- add_reg(RDFAR);
+ if (!cd->no_xdfar)
+ add_reg(RDFAR);
add_reg(RDFXR);
add_reg(RDFFR);
add_reg(TRSCER);
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs
[not found] <20200411230943.24951-1-sashal@kernel.org>
` (2 preceding siblings ...)
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 040/108] sh_eth: check sh_eth_cpu_data::no_xdfar " Sasha Levin
@ 2020-04-11 23:09 ` Sasha Levin
2020-04-12 8:44 ` Geert Uytterhoeven
3 siblings, 1 reply; 6+ messages in thread
From: Sasha Levin @ 2020-04-11 23:09 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Geert Uytterhoeven, Sasha Levin, linux-renesas-soc, linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
[ Upstream commit 408324a3c5383716939eea8096a0f999a0665f7e ]
SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.
Enable the ARM global timer on these SoCs, which will be used for:
- the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
4 ns,
- delay loops, allowing removal of calls to shmobile_init_delay() from
the corresponding machine vectors.
Note that when using an old DTB lacking the global timer, the kernel
will still work. However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-5-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
arch/arm/mach-shmobile/setup-sh73a0.c | 1 -
drivers/soc/renesas/Kconfig | 2 ++
3 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index b13ec9088ce53..86406e3f9b22e 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -72,7 +72,6 @@ static const char *const r8a7779_compat_dt[] __initconst = {
DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
.smp = smp_ops(r8a7779_smp_ops),
.map_io = r8a7779_map_io,
- .init_early = shmobile_init_delay,
.init_irq = r8a7779_init_irq_dt,
.init_late = shmobile_init_late,
.dt_compat = r8a7779_compat_dt,
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index cc08aa7522447..eb4a62fa42895 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -56,7 +56,6 @@ static const char *const sh73a0_boards_compat_dt[] __initconst = {
DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
.smp = smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
- .init_early = shmobile_init_delay,
.init_machine = sh73a0_generic_init,
.init_late = shmobile_init_late,
.dt_compat = sh73a0_boards_compat_dt,
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 3c5e017bacbac..d6d3093a74b2c 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -116,6 +116,7 @@ config ARCH_R8A7779
bool "R-Car H1 (R8A77790)"
select ARCH_RCAR_GEN1
select ARM_ERRATA_754322
+ select ARM_GLOBAL_TIMER
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select SYSC_R8A7779
@@ -163,6 +164,7 @@ config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
select ARCH_RMOBILE
select ARM_ERRATA_754322
+ select ARM_GLOBAL_TIMER
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select RENESAS_INTC_IRQPIN
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs
2020-04-11 23:09 ` [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs Sasha Levin
@ 2020-04-12 8:44 ` Geert Uytterhoeven
2020-04-17 17:18 ` Sasha Levin
0 siblings, 1 reply; 6+ messages in thread
From: Geert Uytterhoeven @ 2020-04-12 8:44 UTC (permalink / raw)
To: Sasha Levin; +Cc: Linux Kernel Mailing List, stable, Linux-Renesas, Linux ARM
Hi Sasha,
On Sun, Apr 12, 2020 at 1:11 AM Sasha Levin <sashal@kernel.org> wrote:
> From: Geert Uytterhoeven <geert+renesas@glider.be>
>
> [ Upstream commit 408324a3c5383716939eea8096a0f999a0665f7e ]
>
> SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> includes a global timer.
>
> Enable the ARM global timer on these SoCs, which will be used for:
> - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
> 4 ns,
> - delay loops, allowing removal of calls to shmobile_init_delay() from
> the corresponding machine vectors.
>
> Note that when using an old DTB lacking the global timer, the kernel
> will still work. However, loops-per-jiffies will no longer be preset,
> and the delay loop will need to be calibrated during boot.
I.e. to avoid this delay, this patch is best backported after backporting
8443ffd1bbd5be74 ("ARM: dts: r8a7779: Add device node for ARM global timer"),
df1a0aac0a533e6f ("ARM: dts: sh73a0: Add device node for ARM global timer").
While the former has been backported to v5.[45]-stable, the latter hasn't,
probably because it depends on
61b58e3f6e518c51 ("ARM: dts: sh73a0: Rename twd clock to periph clock")
So please backport the last two commits first.
Thanks!
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Link: https://lore.kernel.org/r/20191211135222.26770-5-geert+renesas@glider.be
> Signed-off-by: Sasha Levin <sashal@kernel.org>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs
2020-04-12 8:44 ` Geert Uytterhoeven
@ 2020-04-17 17:18 ` Sasha Levin
0 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-04-17 17:18 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux Kernel Mailing List, stable, Linux-Renesas, Linux ARM
On Sun, Apr 12, 2020 at 10:44:01AM +0200, Geert Uytterhoeven wrote:
>Hi Sasha,
>
>On Sun, Apr 12, 2020 at 1:11 AM Sasha Levin <sashal@kernel.org> wrote:
>> From: Geert Uytterhoeven <geert+renesas@glider.be>
>>
>> [ Upstream commit 408324a3c5383716939eea8096a0f999a0665f7e ]
>>
>> SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
>> includes a global timer.
>>
>> Enable the ARM global timer on these SoCs, which will be used for:
>> - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
>> 4 ns,
>> - delay loops, allowing removal of calls to shmobile_init_delay() from
>> the corresponding machine vectors.
>>
>> Note that when using an old DTB lacking the global timer, the kernel
>> will still work. However, loops-per-jiffies will no longer be preset,
>> and the delay loop will need to be calibrated during boot.
>
>I.e. to avoid this delay, this patch is best backported after backporting
>8443ffd1bbd5be74 ("ARM: dts: r8a7779: Add device node for ARM global timer"),
>df1a0aac0a533e6f ("ARM: dts: sh73a0: Add device node for ARM global timer").
>
>While the former has been backported to v5.[45]-stable, the latter hasn't,
>probably because it depends on
>61b58e3f6e518c51 ("ARM: dts: sh73a0: Rename twd clock to periph clock")
>
>So please backport the last two commits first.
Done, thanks!
--
Thanks,
Sasha
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-04-17 17:18 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <20200411230943.24951-1-sashal@kernel.org>
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 038/108] sh_eth: check sh_eth_cpu_data::no_tx_cntrs when dumping registers Sasha Levin
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 039/108] sh_eth: check sh_eth_cpu_data::cexcr " Sasha Levin
2020-04-11 23:08 ` [PATCH AUTOSEL 5.4 040/108] sh_eth: check sh_eth_cpu_data::no_xdfar " Sasha Levin
2020-04-11 23:09 ` [PATCH AUTOSEL 5.4 095/108] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs Sasha Levin
2020-04-12 8:44 ` Geert Uytterhoeven
2020-04-17 17:18 ` Sasha Levin
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).