* [PATCH 0/5] clk: renesas: Add MFIS clock
@ 2020-12-10 14:20 Julien Massot
2020-12-10 14:20 ` [PATCH 1/5] clk: renesas: r8a7795: " Julien Massot
` (5 more replies)
0 siblings, 6 replies; 19+ messages in thread
From: Julien Massot @ 2020-12-10 14:20 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Julien Massot
This series adds the missing MFIS clocks for most Reneas R-Car Gen3
SoCs. I have tested this series on E3, M3, and H3 based boards,
I don't have access to D3 nor V3 boards.
Julien Massot (5):
clk: renesas: r8a7795: Add MFIS clock
clk: renesas: r8a7796: Add MFIS clock
clk: renesas: r8a77965: Add MFIS clock
clk: renesas: r8a77990: Add MFIS clock
clk: renesas: r8a77995: Add MFIS clock
drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
5 files changed, 5 insertions(+)
--
2.29.2
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/5] clk: renesas: r8a7795: Add MFIS clock
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
@ 2020-12-10 14:20 ` Julien Massot
2020-12-11 12:48 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 2/5] clk: renesas: r8a7796: " Julien Massot
` (4 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Julien Massot @ 2020-12-10 14:20 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Julien Massot
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
---
drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 068018ae3c6e..c2ee4e2ab84d 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -137,6 +137,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
DEF_MOD("msiof2", 209, R8A7795_CLK_MSO),
DEF_MOD("msiof1", 210, R8A7795_CLK_MSO),
DEF_MOD("msiof0", 211, R8A7795_CLK_MSO),
+ DEF_MOD("mfis", 213, R8A7795_CLK_S2D2),
DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S3D1),
DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S3D1),
DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S0D3),
--
2.29.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 2/5] clk: renesas: r8a7796: Add MFIS clock
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
2020-12-10 14:20 ` [PATCH 1/5] clk: renesas: r8a7795: " Julien Massot
@ 2020-12-10 14:20 ` Julien Massot
2020-12-11 12:49 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 3/5] clk: renesas: r8a77965: " Julien Massot
` (3 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Julien Massot @ 2020-12-10 14:20 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Julien Massot
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 2cd6e3876fbd..0892d85a82f3 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -137,6 +137,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
DEF_MOD("msiof2", 209, R8A7796_CLK_MSO),
DEF_MOD("msiof1", 210, R8A7796_CLK_MSO),
DEF_MOD("msiof0", 211, R8A7796_CLK_MSO),
+ DEF_MOD("mfis", 213, R8A7795_CLK_S2D2),
DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S3D1),
DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S3D1),
DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3),
--
2.29.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/5] clk: renesas: r8a77965: Add MFIS clock
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
2020-12-10 14:20 ` [PATCH 1/5] clk: renesas: r8a7795: " Julien Massot
2020-12-10 14:20 ` [PATCH 2/5] clk: renesas: r8a7796: " Julien Massot
@ 2020-12-10 14:20 ` Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 4/5] clk: renesas: r8a77990: " Julien Massot
` (2 subsequent siblings)
5 siblings, 1 reply; 19+ messages in thread
From: Julien Massot @ 2020-12-10 14:20 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Julien Massot
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
---
drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 2b55a06ac5cf..66cc067bdb49 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -132,6 +132,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
DEF_MOD("msiof2", 209, R8A77965_CLK_MSO),
DEF_MOD("msiof1", 210, R8A77965_CLK_MSO),
DEF_MOD("msiof0", 211, R8A77965_CLK_MSO),
+ DEF_MOD("mfis", 213, R8A77965_CLK_S2D2),
DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S3D1),
DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S3D1),
DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3),
--
2.29.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 4/5] clk: renesas: r8a77990: Add MFIS clock
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
` (2 preceding siblings ...)
2020-12-10 14:20 ` [PATCH 3/5] clk: renesas: r8a77965: " Julien Massot
@ 2020-12-10 14:20 ` Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 5/5] clk: renesas: r8a77995: " Julien Massot
2020-12-10 14:57 ` [PATCH 0/5] clk: renesas: " Biju Das
5 siblings, 1 reply; 19+ messages in thread
From: Julien Massot @ 2020-12-10 14:20 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Julien Massot
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
---
drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 2b97ab61d044..c5a97556b557 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -133,6 +133,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
DEF_MOD("msiof2", 209, R8A77990_CLK_MSO),
DEF_MOD("msiof1", 210, R8A77990_CLK_MSO),
DEF_MOD("msiof0", 211, R8A77990_CLK_MSO),
+ DEF_MOD("mfis", 213, R8A77990_CLK_S2D2),
DEF_MOD("sys-dmac2", 217, R8A77990_CLK_S3D1),
DEF_MOD("sys-dmac1", 218, R8A77990_CLK_S3D1),
DEF_MOD("sys-dmac0", 219, R8A77990_CLK_S3D1),
--
2.29.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 5/5] clk: renesas: r8a77995: Add MFIS clock
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
` (3 preceding siblings ...)
2020-12-10 14:20 ` [PATCH 4/5] clk: renesas: r8a77990: " Julien Massot
@ 2020-12-10 14:20 ` Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:57 ` [PATCH 0/5] clk: renesas: " Biju Das
5 siblings, 1 reply; 19+ messages in thread
From: Julien Massot @ 2020-12-10 14:20 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Julien Massot
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
---
drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index 5b4691117b47..17a508fa416c 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -120,6 +120,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
DEF_MOD("msiof2", 209, R8A77995_CLK_MSO),
DEF_MOD("msiof1", 210, R8A77995_CLK_MSO),
DEF_MOD("msiof0", 211, R8A77995_CLK_MSO),
+ DEF_MOD("mfis", 213, R8A77995_CLK_S2D2),
DEF_MOD("sys-dmac2", 217, R8A77995_CLK_S3D1),
DEF_MOD("sys-dmac1", 218, R8A77995_CLK_S3D1),
DEF_MOD("sys-dmac0", 219, R8A77995_CLK_S3D1),
--
2.29.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* RE: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
` (4 preceding siblings ...)
2020-12-10 14:20 ` [PATCH 5/5] clk: renesas: r8a77995: " Julien Massot
@ 2020-12-10 14:57 ` Biju Das
2020-12-10 15:03 ` Julien Massot
5 siblings, 1 reply; 19+ messages in thread
From: Biju Das @ 2020-12-10 14:57 UTC (permalink / raw)
To: Julien Massot, linux-renesas-soc
Hi Julian,
Thanks for the patch.
> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
>
> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
> I have tested this series on E3, M3, and H3 based boards, I don't have
> access to D3 nor V3 boards.
Just a question, Can you explain what test have you done with MFIS module?
Cheers,
Biju
>
> Julien Massot (5):
> clk: renesas: r8a7795: Add MFIS clock
> clk: renesas: r8a7796: Add MFIS clock
> clk: renesas: r8a77965: Add MFIS clock
> clk: renesas: r8a77990: Add MFIS clock
> clk: renesas: r8a77995: Add MFIS clock
>
> drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
> drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
> drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
> drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
> drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
> 5 files changed, 5 insertions(+)
>
> --
> 2.29.2
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-10 14:57 ` [PATCH 0/5] clk: renesas: " Biju Das
@ 2020-12-10 15:03 ` Julien Massot
2020-12-10 15:44 ` Biju Das
2020-12-11 12:52 ` Geert Uytterhoeven
0 siblings, 2 replies; 19+ messages in thread
From: Julien Massot @ 2020-12-10 15:03 UTC (permalink / raw)
To: Biju Das, linux-renesas-soc
Hi,
On 12/10/20 3:57 PM, Biju Das wrote:
> Hi Julian,
>
> Thanks for the patch.
>
>> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
>>
>> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
>> I have tested this series on E3, M3, and H3 based boards, I don't have
>> access to D3 nor V3 boards.
>
> Just a question, Can you explain what test have you done with MFIS module?
A basic usage I did is to store and read a byte into one of the
communication register MFISARIICR / MFISAREMBR, a more complex usage is
to trigger interrupts between Linux and the realtime processor, using a
mailbox driver, that I didn't post yet.
Regards,
--
Julien Massot [IoT.bzh]
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-10 15:03 ` Julien Massot
@ 2020-12-10 15:44 ` Biju Das
2020-12-11 12:48 ` Geert Uytterhoeven
2020-12-11 12:52 ` Geert Uytterhoeven
1 sibling, 1 reply; 19+ messages in thread
From: Biju Das @ 2020-12-10 15:44 UTC (permalink / raw)
To: Julien Massot, linux-renesas-soc
Hi Julian,
> Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
>
> Hi,
>
> On 12/10/20 3:57 PM, Biju Das wrote:
> > Hi Julian,
> >
> > Thanks for the patch.
> >
> >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> >>
> >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3
> SoCs.
> >> I have tested this series on E3, M3, and H3 based boards, I don't
> >> have access to D3 nor V3 boards.
> >
> > Just a question, Can you explain what test have you done with MFIS
> module?
> A basic usage I did is to store and read a byte into one of the
> communication register MFISARIICR / MFISAREMBR, a more complex usage is to
> trigger interrupts between Linux and the realtime processor, using a
> mailbox driver, that I didn't post yet.
Thanks for the explanation.
FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.
Regards,
Biju
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-10 15:44 ` Biju Das
@ 2020-12-11 12:48 ` Geert Uytterhoeven
2020-12-11 15:49 ` Biju Das
0 siblings, 1 reply; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:48 UTC (permalink / raw)
To: Biju Das; +Cc: Julien Massot, linux-renesas-soc
Hi Biju,
On Thu, Dec 10, 2020 at 4:47 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
> > On 12/10/20 3:57 PM, Biju Das wrote:
> > >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> > >>
> > >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3
> > SoCs.
> > >> I have tested this series on E3, M3, and H3 based boards, I don't
> > >> have access to D3 nor V3 boards.
> > >
> > > Just a question, Can you explain what test have you done with MFIS
> > module?
> > A basic usage I did is to store and read a byte into one of the
> > communication register MFISARIICR / MFISAREMBR, a more complex usage is to
> > trigger interrupts between Linux and the realtime processor, using a
> > mailbox driver, that I didn't post yet.
>
> Thanks for the explanation.
>
> FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.
But R-Car D3 still has (a subset of) the MFIS.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/5] clk: renesas: r8a7795: Add MFIS clock
2020-12-10 14:20 ` [PATCH 1/5] clk: renesas: r8a7795: " Julien Massot
@ 2020-12-11 12:48 ` Geert Uytterhoeven
0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:48 UTC (permalink / raw)
To: Julien Massot; +Cc: Linux-Renesas
On Thu, Dec 10, 2020 at 3:55 PM Julien Massot <julien.massot@iot.bzh> wrote:
> Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 2/5] clk: renesas: r8a7796: Add MFIS clock
2020-12-10 14:20 ` [PATCH 2/5] clk: renesas: r8a7796: " Julien Massot
@ 2020-12-11 12:49 ` Geert Uytterhoeven
0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:49 UTC (permalink / raw)
To: Julien Massot; +Cc: Linux-Renesas
On Thu, Dec 10, 2020 at 3:55 PM Julien Massot <julien.massot@iot.bzh> wrote:
> Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 3/5] clk: renesas: r8a77965: Add MFIS clock
2020-12-10 14:20 ` [PATCH 3/5] clk: renesas: r8a77965: " Julien Massot
@ 2020-12-11 12:50 ` Geert Uytterhoeven
0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:50 UTC (permalink / raw)
To: Julien Massot; +Cc: Linux-Renesas
On Thu, Dec 10, 2020 at 3:55 PM Julien Massot <julien.massot@iot.bzh> wrote:
> Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 4/5] clk: renesas: r8a77990: Add MFIS clock
2020-12-10 14:20 ` [PATCH 4/5] clk: renesas: r8a77990: " Julien Massot
@ 2020-12-11 12:50 ` Geert Uytterhoeven
0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:50 UTC (permalink / raw)
To: Julien Massot; +Cc: Linux-Renesas
On Thu, Dec 10, 2020 at 3:55 PM Julien Massot <julien.massot@iot.bzh> wrote:
> Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 5/5] clk: renesas: r8a77995: Add MFIS clock
2020-12-10 14:20 ` [PATCH 5/5] clk: renesas: r8a77995: " Julien Massot
@ 2020-12-11 12:50 ` Geert Uytterhoeven
0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:50 UTC (permalink / raw)
To: Julien Massot; +Cc: Linux-Renesas
On Thu, Dec 10, 2020 at 3:55 PM Julien Massot <julien.massot@iot.bzh> wrote:
> Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-10 15:03 ` Julien Massot
2020-12-10 15:44 ` Biju Das
@ 2020-12-11 12:52 ` Geert Uytterhoeven
2020-12-11 13:06 ` Julien Massot
1 sibling, 1 reply; 19+ messages in thread
From: Geert Uytterhoeven @ 2020-12-11 12:52 UTC (permalink / raw)
To: Julien Massot; +Cc: Biju Das, linux-renesas-soc
Hi Julien,
On Thu, Dec 10, 2020 at 4:17 PM Julien Massot <julien.massot@iot.bzh> wrote:
> On 12/10/20 3:57 PM, Biju Das wrote:
> >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> >>
> >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
> >> I have tested this series on E3, M3, and H3 based boards, I don't have
> >> access to D3 nor V3 boards.
> >
> > Just a question, Can you explain what test have you done with MFIS module?
> A basic usage I did is to store and read a byte into one of the
> communication register MFISARIICR / MFISAREMBR, a more complex usage is
> to trigger interrupts between Linux and the realtime processor, using a
> mailbox driver, that I didn't post yet.
Thanks for your series!
Is it OK if I postpone applying this (possibly squashed into a single commit)
until you have posted an MFIS driver?
Thanks, and have a nice weekend!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-11 12:52 ` Geert Uytterhoeven
@ 2020-12-11 13:06 ` Julien Massot
2023-02-01 13:41 ` Geert Uytterhoeven
0 siblings, 1 reply; 19+ messages in thread
From: Julien Massot @ 2020-12-11 13:06 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Biju Das
> Is it OK if I postpone applying this (possibly squashed into a single commit)
> until you have posted an MFIS driver?
Yes it does make sense, the mailbox driver could take longer
to be reviewed. I was more looking at how to break dependencies if
the mailbox driver will go into a different tree.
Thanks for your time,
Have a nice weekend too !
Julien
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-11 12:48 ` Geert Uytterhoeven
@ 2020-12-11 15:49 ` Biju Das
0 siblings, 0 replies; 19+ messages in thread
From: Biju Das @ 2020-12-11 15:49 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Julien Massot, linux-renesas-soc
Hi Geert,
> Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
>
> Hi Biju,
>
> On Thu, Dec 10, 2020 at 4:47 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > > Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock On 12/10/20
> > > 3:57 PM, Biju Das wrote:
> > > >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> > > >>
> > > >> This series adds the missing MFIS clocks for most Reneas R-Car
> > > >> Gen3
> > > SoCs.
> > > >> I have tested this series on E3, M3, and H3 based boards, I don't
> > > >> have access to D3 nor V3 boards.
> > > >
> > > > Just a question, Can you explain what test have you done with MFIS
> > > module?
> > > A basic usage I did is to store and read a byte into one of the
> > > communication register MFISARIICR / MFISAREMBR, a more complex usage
> > > is to trigger interrupts between Linux and the realtime processor,
> > > using a mailbox driver, that I didn't post yet.
> >
> > Thanks for the explanation.
> >
> > FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.
>
> But R-Car D3 still has (a subset of) the MFIS.
Yes, True. But currently I don't know it's usage on D3.
Thanks and regards,
Biju
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/5] clk: renesas: Add MFIS clock
2020-12-11 13:06 ` Julien Massot
@ 2023-02-01 13:41 ` Geert Uytterhoeven
0 siblings, 0 replies; 19+ messages in thread
From: Geert Uytterhoeven @ 2023-02-01 13:41 UTC (permalink / raw)
To: Julien Massot; +Cc: linux-renesas-soc, Biju Das
Hi Julien,
On Fri, Dec 11, 2020 at 2:06 PM Julien Massot <julien.massot@iot.bzh> wrote:
> > Is it OK if I postpone applying this (possibly squashed into a single commit)
> > until you have posted an MFIS driver?
> Yes it does make sense, the mailbox driver could take longer
> to be reviewed. I was more looking at how to break dependencies if
> the mailbox driver will go into a different tree.
Do you still plan to work on the mailbox driver?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2023-02-01 13:42 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
2020-12-10 14:20 ` [PATCH 1/5] clk: renesas: r8a7795: " Julien Massot
2020-12-11 12:48 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 2/5] clk: renesas: r8a7796: " Julien Massot
2020-12-11 12:49 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 3/5] clk: renesas: r8a77965: " Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 4/5] clk: renesas: r8a77990: " Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 5/5] clk: renesas: r8a77995: " Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:57 ` [PATCH 0/5] clk: renesas: " Biju Das
2020-12-10 15:03 ` Julien Massot
2020-12-10 15:44 ` Biju Das
2020-12-11 12:48 ` Geert Uytterhoeven
2020-12-11 15:49 ` Biju Das
2020-12-11 12:52 ` Geert Uytterhoeven
2020-12-11 13:06 ` Julien Massot
2023-02-01 13:41 ` Geert Uytterhoeven
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