From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Samuel Holland <samuel@sholland.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
DT <devicetree@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [RFC PATCH 0/2] RZ/G2UL separate out SoC specific parts
Date: Mon, 10 Oct 2022 10:41:35 +0100 [thread overview]
Message-ID: <CA+V-a8vD1+kbby8rbZqYv2Ux1GaT=7n7V9qHJS3Djv-fKdWrAQ@mail.gmail.com> (raw)
In-Reply-To: <20220929172356.301342-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi Rob, Krzysztof,
On Thu, Sep 29, 2022 at 6:24 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Hi All,
>
> This patch series aims to split up the RZ/G2UL SoC DTSI into common parts
> so that this can be shared with the RZ/Five SoC.
>
> Implementation is based on the discussion [0] where I have used option#2.
>
> The Renesas RZ/G2UL (ARM64) and RZ/Five (RISC-V) have almost the same
> identical blocks to avoid duplication a base SoC dtsi (r9a07g043.dtsi) is
> created which will be used by the RZ/G2UL (r9a07g043u.dtsi) and RZ/Five
> (r9a07g043F.dtsi)
>
> Sending this as an RFC to get some feedback.
>
> r9a07g043f.dtsi will look something like below:
>
> #include <dt-bindings/interrupt-controller/irq.h>
>
> #define SOC_PERIPHERAL_IRQ_NUMBER(nr) (nr + 32)
> #define SOC_PERIPHERAL_IRQ(nr, na) SOC_PERIPHERAL_IRQ_NUMBER(nr) na
>
> #include <arm64/renesas/r9a07g043.dtsi>
>
> / {
> ...
> ...
> };
>
> Although patch#2 can be merged into patch#1 just wanted to keep them separated
> for easier review.
>
> [0] https://lore.kernel.org/linux-arm-kernel/Yyt8s5+pyoysVNeC@spud/T/
>
> Cheers,
> Prabhakar
>
> Lad Prabhakar (2):
> arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro
> to specify interrupt property
Can either of you please review patch #1.
Cheers,
Prabhakar
> arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
>
> arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 362 +++++++-----------
> arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 87 +++++
> .../boot/dts/renesas/r9a07g043u11-smarc.dts | 2 +-
> 3 files changed, 235 insertions(+), 216 deletions(-)
> create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
>
> --
> 2.25.1
>
next prev parent reply other threads:[~2022-10-10 9:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-29 17:23 [RFC PATCH 0/2] RZ/G2UL separate out SoC specific parts Prabhakar
2022-09-29 17:23 ` [RFC PATCH 1/2] arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property Prabhakar
2022-09-29 17:23 ` [RFC PATCH 2/2] arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts Prabhakar
2022-10-10 9:41 ` Lad, Prabhakar [this message]
2022-10-12 15:38 ` [RFC PATCH 0/2] RZ/G2UL separate out " Krzysztof Kozlowski
2022-10-12 19:00 ` Lad, Prabhakar
2022-10-25 12:40 ` Geert Uytterhoeven
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