* [PATCH 1/5] dt-bindings: i2c: renesas,riic: Document RZ/G2L I2C controller
2021-06-11 16:56 [PATCH 0/5] Add RZ/G2L I2C support Biju Das
@ 2021-06-11 16:56 ` Biju Das
2021-06-14 12:43 ` Geert Uytterhoeven
2021-06-11 16:56 ` [PATCH 2/5] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks Biju Das
` (3 subsequent siblings)
4 siblings, 1 reply; 16+ messages in thread
From: Biju Das @ 2021-06-11 16:56 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Chris Brandt, Wolfram Sang, linux-i2c, devicetree,
Geert Uytterhoeven, Chris Paterson, Biju Das,
Prabhakar Mahadev Lad, linux-renesas-soc
Document RZ/G2L I2C controller bindings.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
.../devicetree/bindings/i2c/renesas,riic.yaml | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
index 2d6378164958..52d92ec7ec0b 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
+++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Renesas RZ/A I2C Bus Interface (RIIC)
+title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
maintainers:
- Chris Brandt <chris.brandt@renesas.com>
@@ -17,9 +17,10 @@ properties:
compatible:
items:
- enum:
- - renesas,riic-r7s72100 # RZ/A1H
- - renesas,riic-r7s9210 # RZ/A2M
- - const: renesas,riic-rz # RZ/A
+ - renesas,riic-r7s72100 # RZ/A1H
+ - renesas,riic-r7s9210 # RZ/A2M
+ - renesas,riic-r9a07g044 # RZ/G2{L,LC}
+ - const: renesas,riic-rz # RZ/A or RZ/G2L
reg:
maxItems: 1
@@ -56,6 +57,16 @@ required:
- '#address-cells'
- '#size-cells'
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,riic-r9a07g044
+then:
+ required:
+ - resets
+
unevaluatedProperties: false
examples:
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] dt-bindings: i2c: renesas,riic: Document RZ/G2L I2C controller
2021-06-11 16:56 ` [PATCH 1/5] dt-bindings: i2c: renesas,riic: Document RZ/G2L I2C controller Biju Das
@ 2021-06-14 12:43 ` Geert Uytterhoeven
0 siblings, 0 replies; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-06-14 12:43 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Chris Brandt, Wolfram Sang, Linux I2C,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas
On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Document RZ/G2L I2C controller bindings.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/5] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks
2021-06-11 16:56 [PATCH 0/5] Add RZ/G2L I2C support Biju Das
2021-06-11 16:56 ` [PATCH 1/5] dt-bindings: i2c: renesas,riic: Document RZ/G2L I2C controller Biju Das
@ 2021-06-11 16:56 ` Biju Das
2021-06-14 12:32 ` Geert Uytterhoeven
2021-06-11 16:56 ` [PATCH 3/5] i2c: riic: Add RZ/G2L support Biju Das
` (2 subsequent siblings)
4 siblings, 1 reply; 16+ messages in thread
From: Biju Das @ 2021-06-11 16:56 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd
Cc: Biju Das, Geert Uytterhoeven, linux-renesas-soc, linux-clk,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Add I2C{0,1,2.3} clock entries.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/clk/renesas/r9a07g044-cpg.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index 2d2bc78b84a2..c3136da53614 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -94,6 +94,18 @@ static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
DEF_MOD("usb1", R9A07G044_CLK_USB1,
R9A07G044_CLK_P1,
0x578, (BIT(1) | BIT(3)), (BIT(1) | BIT(3))),
+ DEF_MOD("i2c0", R9A07G044_CLK_I2C0,
+ R9A07G044_CLK_P0,
+ 0x580, BIT(0), BIT(0)),
+ DEF_MOD("i2c1", R9A07G044_CLK_I2C1,
+ R9A07G044_CLK_P0,
+ 0x580, BIT(1), BIT(1)),
+ DEF_MOD("i2c2", R9A07G044_CLK_I2C2,
+ R9A07G044_CLK_P0,
+ 0x580, BIT(2), BIT(2)),
+ DEF_MOD("i2c3", R9A07G044_CLK_I2C3,
+ R9A07G044_CLK_P0,
+ 0x580, BIT(3), BIT(3)),
DEF_MOD("scif0", R9A07G044_CLK_SCIF0,
R9A07G044_CLK_P0,
0x584, BIT(0), BIT(0)),
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 2/5] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks
2021-06-11 16:56 ` [PATCH 2/5] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks Biju Das
@ 2021-06-14 12:32 ` Geert Uytterhoeven
0 siblings, 0 replies; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-06-14 12:32 UTC (permalink / raw)
To: Biju Das
Cc: Michael Turquette, Stephen Boyd, Linux-Renesas, linux-clk,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad
On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add I2C{0,1,2.3} clock entries.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.15.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/5] i2c: riic: Add RZ/G2L support
2021-06-11 16:56 [PATCH 0/5] Add RZ/G2L I2C support Biju Das
2021-06-11 16:56 ` [PATCH 1/5] dt-bindings: i2c: renesas,riic: Document RZ/G2L I2C controller Biju Das
2021-06-11 16:56 ` [PATCH 2/5] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks Biju Das
@ 2021-06-11 16:56 ` Biju Das
2021-06-14 12:38 ` Geert Uytterhoeven
2021-06-14 13:27 ` Philipp Zabel
2021-06-11 16:56 ` [PATCH 4/5] arm64: dts: renesas: r9a07g044: Add I2C nodes Biju Das
2021-06-11 16:56 ` [PATCH 5/5] arm64: defconfig: Enable RIIC Biju Das
4 siblings, 2 replies; 16+ messages in thread
From: Biju Das @ 2021-06-11 16:56 UTC (permalink / raw)
To: Philipp Zabel
Cc: Biju Das, Chris Brandt, Wolfram Sang, Arnd Bergmann,
Jarkko Nikula, Jean Delvare, Khalil Blaiech, Krzysztof Kozlowski,
Bence Csókás, Yicong Yang, Mike Rapoport,
Uwe Kleine-König, linux-i2c, Geert Uytterhoeven,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad,
linux-renesas-soc
RZ/G2L i2c controller is compatible with RZ/A i2c controller.
By default IP is in reset state, so need to perform release
reset before accessing any register.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/i2c/busses/Kconfig | 1 +
drivers/i2c/busses/i2c-riic.c | 21 +++++++++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 281a65d9b44b..5da09288b461 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -941,6 +941,7 @@ config I2C_QUP
config I2C_RIIC
tristate "Renesas RIIC adapter"
depends on ARCH_RENESAS || COMPILE_TEST
+ select RESET_CONTROLLER
help
If you say yes to this option, support will be included for the
Renesas RIIC I2C interface.
diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
index 4eccc0f69861..a3860631c6db 100644
--- a/drivers/i2c/busses/i2c-riic.c
+++ b/drivers/i2c/busses/i2c-riic.c
@@ -42,8 +42,10 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/reset.h>
#define RIIC_ICCR1 0x00
#define RIIC_ICCR2 0x04
@@ -86,6 +88,11 @@
#define RIIC_INIT_MSG -1
+enum riic_type {
+ RIIC_RZ_A,
+ RIIC_RZ_G2L,
+};
+
struct riic_dev {
void __iomem *base;
u8 *buf;
@@ -395,7 +402,9 @@ static int riic_i2c_probe(struct platform_device *pdev)
struct i2c_adapter *adap;
struct resource *res;
struct i2c_timings i2c_t;
+ struct reset_control *rstc;
int i, ret;
+ enum riic_type type;
riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
if (!riic)
@@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device *pdev)
return PTR_ERR(riic->clk);
}
+ type = (enum riic_type)of_device_get_match_data(&pdev->dev);
+ if (type == RIIC_RZ_G2L) {
+ rstc = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(rstc)) {
+ dev_err(&pdev->dev, "Error: missing reset ctrl\n");
+ return PTR_ERR(rstc);
+ }
+
+ reset_control_deassert(rstc);
+ }
+
for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) {
res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num);
if (!res)
@@ -472,6 +492,7 @@ static int riic_i2c_remove(struct platform_device *pdev)
}
static const struct of_device_id riic_i2c_dt_ids[] = {
+ { .compatible = "renesas,riic-r9a07g044", .data = (void *)RIIC_RZ_G2L },
{ .compatible = "renesas,riic-rz" },
{ /* Sentinel */ },
};
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 3/5] i2c: riic: Add RZ/G2L support
2021-06-11 16:56 ` [PATCH 3/5] i2c: riic: Add RZ/G2L support Biju Das
@ 2021-06-14 12:38 ` Geert Uytterhoeven
2021-06-14 16:04 ` Biju Das
2021-06-14 13:27 ` Philipp Zabel
1 sibling, 1 reply; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-06-14 12:38 UTC (permalink / raw)
To: Biju Das
Cc: Philipp Zabel, Chris Brandt, Wolfram Sang, Arnd Bergmann,
Jarkko Nikula, Jean Delvare, Khalil Blaiech, Krzysztof Kozlowski,
Bence Csókás, Yicong Yang, Mike Rapoport,
Uwe Kleine-König, Linux I2C, Chris Paterson, Biju Das,
Prabhakar Mahadev Lad, Linux-Renesas
Hi Biju,
On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> RZ/G2L i2c controller is compatible with RZ/A i2c controller.
> By default IP is in reset state, so need to perform release
> reset before accessing any register.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thanks for your patch!
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -941,6 +941,7 @@ config I2C_QUP
> config I2C_RIIC
> tristate "Renesas RIIC adapter"
> depends on ARCH_RENESAS || COMPILE_TEST
> + select RESET_CONTROLLER
if ARCH_R9A07G044?
> --- a/drivers/i2c/busses/i2c-riic.c
> +++ b/drivers/i2c/busses/i2c-riic.c
_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
> if (!riic)
> @@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device *pdev)
> return PTR_ERR(riic->clk);
> }
>
> + type = (enum riic_type)of_device_get_match_data(&pdev->dev);
> + if (type == RIIC_RZ_G2L) {
> + rstc = devm_reset_control_get(&pdev->dev, NULL);
> + if (IS_ERR(rstc)) {
> + dev_err(&pdev->dev, "Error: missing reset ctrl\n");
> + return PTR_ERR(rstc);
> + }
> +
> + reset_control_deassert(rstc);
Just wondering: does it harm if the driver is unloaded or unbounded,
and rebound while the I2C controller is not in reset state?
> + }
> +
> for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) {
> res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num);
> if (!res)
> @@ -472,6 +492,7 @@ static int riic_i2c_remove(struct platform_device *pdev)
> }
>
> static const struct of_device_id riic_i2c_dt_ids[] = {
> + { .compatible = "renesas,riic-r9a07g044", .data = (void *)RIIC_RZ_G2L },
> { .compatible = "renesas,riic-rz" },
Please fill in .data, to avoid relying implicitly on RIIC_RZ_A being zero.
> { /* Sentinel */ },
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 3/5] i2c: riic: Add RZ/G2L support
2021-06-14 12:38 ` Geert Uytterhoeven
@ 2021-06-14 16:04 ` Biju Das
0 siblings, 0 replies; 16+ messages in thread
From: Biju Das @ 2021-06-14 16:04 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Philipp Zabel, Chris Brandt, Wolfram Sang, Arnd Bergmann,
Jarkko Nikula, Jean Delvare, Khalil Blaiech, Krzysztof Kozlowski,
Bence Csókás, Yicong Yang, Mike Rapoport,
Uwe Kleine-König, Linux I2C, Chris Paterson, Biju Das,
Prabhakar Mahadev Lad, Linux-Renesas
Hi Geert,
Thanks for the feedback.
> -----Original Message-----
> Subject: Re: [PATCH 3/5] i2c: riic: Add RZ/G2L support
>
> Hi Biju,
>
> On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > RZ/G2L i2c controller is compatible with RZ/A i2c controller.
> > By default IP is in reset state, so need to perform release reset
> > before accessing any register.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/i2c/busses/Kconfig
> > +++ b/drivers/i2c/busses/Kconfig
> > @@ -941,6 +941,7 @@ config I2C_QUP
> > config I2C_RIIC
> > tristate "Renesas RIIC adapter"
> > depends on ARCH_RENESAS || COMPILE_TEST
> > + select RESET_CONTROLLER
>
> if ARCH_R9A07G044?
OK,Agreed.
>
> > --- a/drivers/i2c/busses/i2c-riic.c
> > +++ b/drivers/i2c/busses/i2c-riic.c
> _kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
> > if (!riic)
> > @@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device
> *pdev)
> > return PTR_ERR(riic->clk);
> > }
> >
> > + type = (enum riic_type)of_device_get_match_data(&pdev->dev);
> > + if (type == RIIC_RZ_G2L) {
> > + rstc = devm_reset_control_get(&pdev->dev, NULL);
> > + if (IS_ERR(rstc)) {
> > + dev_err(&pdev->dev, "Error: missing reset
> ctrl\n");
> > + return PTR_ERR(rstc);
> > + }
> > +
> > + reset_control_deassert(rstc);
>
> Just wondering: does it harm if the driver is unloaded or unbounded, and
> rebound while the I2C controller is not in reset state?
I have tested and it works after unloading and reloading it again.
Cheers,
Biju
>
> > + }
> > +
> > for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) {
> > res = platform_get_resource(pdev, IORESOURCE_IRQ,
> riic_irqs[i].res_num);
> > if (!res)
> > @@ -472,6 +492,7 @@ static int riic_i2c_remove(struct platform_device
> > *pdev) }
> >
> > static const struct of_device_id riic_i2c_dt_ids[] = {
> > + { .compatible = "renesas,riic-r9a07g044", .data = (void
> > + *)RIIC_RZ_G2L },
> > { .compatible = "renesas,riic-rz" },
>
> Please fill in .data, to avoid relying implicitly on RIIC_RZ_A being zero.
>
> > { /* Sentinel */ },
> > };
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
> -- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 3/5] i2c: riic: Add RZ/G2L support
2021-06-11 16:56 ` [PATCH 3/5] i2c: riic: Add RZ/G2L support Biju Das
2021-06-14 12:38 ` Geert Uytterhoeven
@ 2021-06-14 13:27 ` Philipp Zabel
2021-06-14 13:38 ` Geert Uytterhoeven
2021-06-14 17:20 ` Biju Das
1 sibling, 2 replies; 16+ messages in thread
From: Philipp Zabel @ 2021-06-14 13:27 UTC (permalink / raw)
To: Biju Das
Cc: Chris Brandt, Wolfram Sang, Arnd Bergmann, Jarkko Nikula,
Jean Delvare, Khalil Blaiech, Krzysztof Kozlowski,
Bence Csókás, Yicong Yang, Mike Rapoport,
Uwe Kleine-König, linux-i2c, Geert Uytterhoeven,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad,
linux-renesas-soc
Hi Biju,
On Fri, 2021-06-11 at 17:56 +0100, Biju Das wrote:
> RZ/G2L i2c controller is compatible with RZ/A i2c controller.
> By default IP is in reset state, so need to perform release
> reset before accessing any register.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> drivers/i2c/busses/Kconfig | 1 +
> drivers/i2c/busses/i2c-riic.c | 21 +++++++++++++++++++++
> 2 files changed, 22 insertions(+)
>
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index 281a65d9b44b..5da09288b461 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -941,6 +941,7 @@ config I2C_QUP
> config I2C_RIIC
> tristate "Renesas RIIC adapter"
> depends on ARCH_RENESAS || COMPILE_TEST
> + select RESET_CONTROLLER
There's no need for this. The reset API defines inline stubs so this can
be compiled without RESET_CONTROLLER enabled.
> help
> If you say yes to this option, support will be included for the
> Renesas RIIC I2C interface.
> diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
> index 4eccc0f69861..a3860631c6db 100644
> --- a/drivers/i2c/busses/i2c-riic.c
> +++ b/drivers/i2c/busses/i2c-riic.c
> @@ -42,8 +42,10 @@
> #include <linux/io.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
>
> #define RIIC_ICCR1 0x00
> #define RIIC_ICCR2 0x04
> @@ -86,6 +88,11 @@
>
> #define RIIC_INIT_MSG -1
>
> +enum riic_type {
> + RIIC_RZ_A,
> + RIIC_RZ_G2L,
> +};
> +
> struct riic_dev {
> void __iomem *base;
> u8 *buf;
> @@ -395,7 +402,9 @@ static int riic_i2c_probe(struct platform_device *pdev)
> struct i2c_adapter *adap;
> struct resource *res;
> struct i2c_timings i2c_t;
> + struct reset_control *rstc;
> int i, ret;
> + enum riic_type type;
>
> riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
> if (!riic)
> @@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device *pdev)
> return PTR_ERR(riic->clk);
> }
>
> + type = (enum riic_type)of_device_get_match_data(&pdev->dev);
> + if (type == RIIC_RZ_G2L) {
> + rstc = devm_reset_control_get(&pdev->dev, NULL);
Please use devm_reset_control_get_exclusive().
> + if (IS_ERR(rstc)) {
> + dev_err(&pdev->dev, "Error: missing reset ctrl\n");
> + return PTR_ERR(rstc);
> + }
> +
> + reset_control_deassert(rstc);
> + }
> +
> for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) {
> res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num);
> if (!res)
> @@ -472,6 +492,7 @@ static int riic_i2c_remove(struct platform_device *pdev)
> }
>
> static const struct of_device_id riic_i2c_dt_ids[] = {
> + { .compatible = "renesas,riic-r9a07g044", .data = (void *)RIIC_RZ_G2L },
> { .compatible = "renesas,riic-rz" },
> { /* Sentinel */ },
> };
regards
Philipp
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 3/5] i2c: riic: Add RZ/G2L support
2021-06-14 13:27 ` Philipp Zabel
@ 2021-06-14 13:38 ` Geert Uytterhoeven
2021-06-14 17:20 ` Biju Das
1 sibling, 0 replies; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-06-14 13:38 UTC (permalink / raw)
To: Philipp Zabel
Cc: Biju Das, Chris Brandt, Wolfram Sang, Arnd Bergmann,
Jarkko Nikula, Jean Delvare, Khalil Blaiech, Krzysztof Kozlowski,
Bence Csókás, Yicong Yang, Mike Rapoport,
Uwe Kleine-König, Linux I2C, Geert Uytterhoeven,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Linux-Renesas
Hi Philipp,
On Mon, Jun 14, 2021 at 3:27 PM Philipp Zabel <p.zabel@pengutronix.de> wrote:
> On Fri, 2021-06-11 at 17:56 +0100, Biju Das wrote:
> > RZ/G2L i2c controller is compatible with RZ/A i2c controller.
> > By default IP is in reset state, so need to perform release
> > reset before accessing any register.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > drivers/i2c/busses/Kconfig | 1 +
> > drivers/i2c/busses/i2c-riic.c | 21 +++++++++++++++++++++
> > 2 files changed, 22 insertions(+)
> >
> > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> > index 281a65d9b44b..5da09288b461 100644
> > --- a/drivers/i2c/busses/Kconfig
> > +++ b/drivers/i2c/busses/Kconfig
> > @@ -941,6 +941,7 @@ config I2C_QUP
> > config I2C_RIIC
> > tristate "Renesas RIIC adapter"
> > depends on ARCH_RENESAS || COMPILE_TEST
> > + select RESET_CONTROLLER
>
> There's no need for this. The reset API defines inline stubs so this can
> be compiled without RESET_CONTROLLER enabled.
AFAIK, the issue is that RIIC on RZ/G2L requires reset support,
so it must be enabled when building a kernel for RZ/G2L.
As RZ/A does not need or use it, and may run from SRAM, I'd like to
leave it disabled when building a kernel not including RZ/G2L support.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH 3/5] i2c: riic: Add RZ/G2L support
2021-06-14 13:27 ` Philipp Zabel
2021-06-14 13:38 ` Geert Uytterhoeven
@ 2021-06-14 17:20 ` Biju Das
1 sibling, 0 replies; 16+ messages in thread
From: Biju Das @ 2021-06-14 17:20 UTC (permalink / raw)
To: Philipp Zabel
Cc: Chris Brandt, Wolfram Sang, Arnd Bergmann, Jarkko Nikula,
Jean Delvare, Khalil Blaiech, Krzysztof Kozlowski,
Bence Csókás, Yicong Yang, Mike Rapoport,
Uwe Kleine-König, linux-i2c, Geert Uytterhoeven,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad,
linux-renesas-soc
Hi Philipp,
Thanks for the review.
> Subject: Re: [PATCH 3/5] i2c: riic: Add RZ/G2L support
>
> Hi Biju,
>
> On Fri, 2021-06-11 at 17:56 +0100, Biju Das wrote:
> > RZ/G2L i2c controller is compatible with RZ/A i2c controller.
> > By default IP is in reset state, so need to perform release reset
> > before accessing any register.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > drivers/i2c/busses/Kconfig | 1 +
> > drivers/i2c/busses/i2c-riic.c | 21 +++++++++++++++++++++
> > 2 files changed, 22 insertions(+)
> >
> > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> > index 281a65d9b44b..5da09288b461 100644
> > --- a/drivers/i2c/busses/Kconfig
> > +++ b/drivers/i2c/busses/Kconfig
> > @@ -941,6 +941,7 @@ config I2C_QUP
> > config I2C_RIIC
> > tristate "Renesas RIIC adapter"
> > depends on ARCH_RENESAS || COMPILE_TEST
> > + select RESET_CONTROLLER
>
> There's no need for this. The reset API defines inline stubs so this can
> be compiled without RESET_CONTROLLER enabled.
Hope you are ok with Geert's suggestion, as RZ/A boards are resource constrained.
So it is not good to enable for them.
>
> > help
> > If you say yes to this option, support will be included for the
> > Renesas RIIC I2C interface.
> > diff --git a/drivers/i2c/busses/i2c-riic.c
> > b/drivers/i2c/busses/i2c-riic.c index 4eccc0f69861..a3860631c6db
> > 100644
> > --- a/drivers/i2c/busses/i2c-riic.c
> > +++ b/drivers/i2c/busses/i2c-riic.c
> > @@ -42,8 +42,10 @@
> > #include <linux/io.h>
> > #include <linux/module.h>
> > #include <linux/of.h>
> > +#include <linux/of_device.h>
> > #include <linux/platform_device.h>
> > #include <linux/pm_runtime.h>
> > +#include <linux/reset.h>
> >
> > #define RIIC_ICCR1 0x00
> > #define RIIC_ICCR2 0x04
> > @@ -86,6 +88,11 @@
> >
> > #define RIIC_INIT_MSG -1
> >
> > +enum riic_type {
> > + RIIC_RZ_A,
> > + RIIC_RZ_G2L,
> > +};
> > +
> > struct riic_dev {
> > void __iomem *base;
> > u8 *buf;
> > @@ -395,7 +402,9 @@ static int riic_i2c_probe(struct platform_device
> *pdev)
> > struct i2c_adapter *adap;
> > struct resource *res;
> > struct i2c_timings i2c_t;
> > + struct reset_control *rstc;
> > int i, ret;
> > + enum riic_type type;
> >
> > riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
> > if (!riic)
> > @@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device
> *pdev)
> > return PTR_ERR(riic->clk);
> > }
> >
> > + type = (enum riic_type)of_device_get_match_data(&pdev->dev);
> > + if (type == RIIC_RZ_G2L) {
> > + rstc = devm_reset_control_get(&pdev->dev, NULL);
>
> Please use devm_reset_control_get_exclusive().
OK. Will do.
Regards,
Biju
>
> > + if (IS_ERR(rstc)) {
> > + dev_err(&pdev->dev, "Error: missing reset ctrl\n");
> > + return PTR_ERR(rstc);
> > + }
> > +
> > + reset_control_deassert(rstc);
> > + }
> > +
> > for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) {
> > res = platform_get_resource(pdev, IORESOURCE_IRQ,
> riic_irqs[i].res_num);
> > if (!res)
> > @@ -472,6 +492,7 @@ static int riic_i2c_remove(struct platform_device
> > *pdev) }
> >
> > static const struct of_device_id riic_i2c_dt_ids[] = {
> > + { .compatible = "renesas,riic-r9a07g044", .data = (void
> > +*)RIIC_RZ_G2L },
> > { .compatible = "renesas,riic-rz" },
> > { /* Sentinel */ },
> > };
>
> regards
> Philipp
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 4/5] arm64: dts: renesas: r9a07g044: Add I2C nodes
2021-06-11 16:56 [PATCH 0/5] Add RZ/G2L I2C support Biju Das
` (2 preceding siblings ...)
2021-06-11 16:56 ` [PATCH 3/5] i2c: riic: Add RZ/G2L support Biju Das
@ 2021-06-11 16:56 ` Biju Das
2021-06-14 12:45 ` Geert Uytterhoeven
2021-06-11 16:56 ` [PATCH 5/5] arm64: defconfig: Enable RIIC Biju Das
4 siblings, 1 reply; 16+ messages in thread
From: Biju Das @ 2021-06-11 16:56 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Add I2C{0,1,2,3} nodes to RZ/G2 (R9A07G044) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
This patch depend on [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210609153230.6967-11-prabhakar.mahadev-lad.rj@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 80 ++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 2ffdaed6c9a5..36b3295a8829 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -93,6 +93,86 @@
status = "disabled";
};
+ i2c0: i2c@10058000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+ reg = <0 0x10058000 0 0x400>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 348 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 349 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_CLK_I2C0>;
+ clock-frequency = <100000>;
+ resets = <&cpg R9A07G044_CLK_I2C0>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@10058400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+ reg = <0 0x10058400 0 0x400>;
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 356 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 357 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_CLK_I2C1>;
+ clock-frequency = <100000>;
+ resets = <&cpg R9A07G044_CLK_I2C1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@10058800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+ reg = <0 0x10058800 0 0x400>;
+ interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_CLK_I2C2>;
+ clock-frequency = <100000>;
+ resets = <&cpg R9A07G044_CLK_I2C2>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@10058C00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+ reg = <0 0x10058c00 0 0x400>;
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 372 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_CLK_I2C3>;
+ clock-frequency = <100000>;
+ resets = <&cpg R9A07G044_CLK_I2C3>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g044-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 4/5] arm64: dts: renesas: r9a07g044: Add I2C nodes
2021-06-11 16:56 ` [PATCH 4/5] arm64: dts: renesas: r9a07g044: Add I2C nodes Biju Das
@ 2021-06-14 12:45 ` Geert Uytterhoeven
0 siblings, 0 replies; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-06-14 12:45 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Magnus Damm, Linux-Renesas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad
On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add I2C{0,1,2,3} nodes to RZ/G2 (R9A07G044) SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.15.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 5/5] arm64: defconfig: Enable RIIC
2021-06-11 16:56 [PATCH 0/5] Add RZ/G2L I2C support Biju Das
` (3 preceding siblings ...)
2021-06-11 16:56 ` [PATCH 4/5] arm64: dts: renesas: r9a07g044: Add I2C nodes Biju Das
@ 2021-06-11 16:56 ` Biju Das
2021-06-14 12:45 ` Geert Uytterhoeven
4 siblings, 1 reply; 16+ messages in thread
From: Biju Das @ 2021-06-11 16:56 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon
Cc: Biju Das, Bjorn Andersson, Shawn Guo, Krzysztof Kozlowski,
Geert Uytterhoeven, Guido Günther, Dmitry Baryshkov,
Michael Walle, Enric Balletbo i Serra, Nishanth Menon,
Douglas Anderson, Fabio Estevam, Lad Prabhakar, Andrey Zhizhikin,
linux-arm-kernel, Chris Paterson, Biju Das, linux-renesas-soc
Enable RIIC driver support for Renesas RZ/G2L based platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index b6f755b225af..d96faf4e84f8 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -465,6 +465,7 @@ CONFIG_I2C_SH_MOBILE=y
CONFIG_I2C_TEGRA=y
CONFIG_I2C_UNIPHIER_F=y
CONFIG_I2C_RCAR=y
+CONFIG_I2C_RIIC=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SPI=y
CONFIG_SPI_ARMADA_3700=y
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 5/5] arm64: defconfig: Enable RIIC
2021-06-11 16:56 ` [PATCH 5/5] arm64: defconfig: Enable RIIC Biju Das
@ 2021-06-14 12:45 ` Geert Uytterhoeven
2021-08-13 9:55 ` Geert Uytterhoeven
0 siblings, 1 reply; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-06-14 12:45 UTC (permalink / raw)
To: Biju Das
Cc: Catalin Marinas, Will Deacon, Bjorn Andersson, Shawn Guo,
Krzysztof Kozlowski, Guido Günther, Dmitry Baryshkov,
Michael Walle, Enric Balletbo i Serra, Nishanth Menon,
Douglas Anderson, Fabio Estevam, Lad Prabhakar, Andrey Zhizhikin,
Linux ARM, Chris Paterson, Biju Das, Linux-Renesas
On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable RIIC driver support for Renesas RZ/G2L based platforms.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.15.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 5/5] arm64: defconfig: Enable RIIC
2021-06-14 12:45 ` Geert Uytterhoeven
@ 2021-08-13 9:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 16+ messages in thread
From: Geert Uytterhoeven @ 2021-08-13 9:55 UTC (permalink / raw)
To: Biju Das
Cc: Catalin Marinas, Will Deacon, Bjorn Andersson, Shawn Guo,
Krzysztof Kozlowski, Guido Günther, Dmitry Baryshkov,
Michael Walle, Enric Balletbo i Serra, Nishanth Menon,
Douglas Anderson, Fabio Estevam, Lad Prabhakar, Andrey Zhizhikin,
Linux ARM, Chris Paterson, Biju Das, Linux-Renesas
On Mon, Jun 14, 2021 at 2:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Fri, Jun 11, 2021 at 6:56 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Enable RIIC driver support for Renesas RZ/G2L based platforms.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-devel for v5.15.
Given we don't have any i2c users yet in the RZ/G2L board DTS files,
I'm postponing this to v5.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 16+ messages in thread