[PATCH/RFC 00/19] arm64: dts: renesas: Initial support for R-Car M3-W+

[PATCH/RFC 00/19] arm64: dts: renesas: Initial support for R-Car M3-W+

[Geert Uytterhoeven]

	Hi all,

This RFC patch series adds support for the R-Car M3-W+ (R8A77961) SoC
and the Salvator-XS board with R-Car M3-W+.  This SoC is a derivative of
R-Car M3-W (R8A77960), and also known as R-Car M3-W ES3.0.
As this is an RFC, I'm sending it to a limited audience.

Based on experience with previous SoCs in the R-Car Gen3 family, the
following design decisions were made:
  - Use different compatible values (r8a77961-based),
  - Use different clock and SYSC DT binding definitions
    (R8A77961-based), but the same numerical values, to allow sharing
    drivers,
  - Share the pin control driver,
  - Share the clock driver,
  - Share the system controller driver.

While the DT ABI is stable (hence we cannot s/r8a7796/r8a77960/ in DTS),
kernel source code and kernel config symbols can be changed at any
time.  As changing kernel config symbols impacts the user, they weren't
renamed yet.

Questions:
  - What's the board part number of Salvator-XS with R-Car M3-W+?
  - Should r8a77961_pinmux_info (and the rename of r8a7796_pinmux_info
    to r8a77960_pinmux_info) be dropped? I added it because
    r8a7796_pinmux_info.name contains "r8a77960_pfc".

  - Should the CLK_R8A77961 and PINCTRL_PFC_R8A77961 symbols be dropped?
    The clock and pin control drivers are the same or almost the same,
    so the code increase by always enabling both is minimal.

  - Should the R8A77961 config symbols be dropped?
      - CONFIG_ARCH_R8A77961
      - CONFIG_CLK_R8A77961
      - CONFIG_PINCTRL_PFC_R8A77961
      - CONFIG_SYSC_R8A77961

  - If not, should the R8A7796 config symbols be renamed?
      - CONFIG_ARCH_R8A7796 to CONFIG_ARCH_R8A77960?
      - CONFIG_CLK_R8A7796 to CONFIG_CLK_R8A77960?
      - CONFIG_PINCTRL_PFC_R8A7796 to CONFIG_PINCTRL_PFC_R8A77960?
      - CONFIG_SYSC_R8A7796 to CONFIG_SYSC_R8A77960?
    Due to dependencies on CONFIG_ARCH_R8A7796, this should be a single
    commit.

Related questions for old R-Car H3 ES1.x support:
  - Should CONFIG_PINCTRL_PFC_R8A77950 be added, to allow compiling out
    R-Car H3 ES1.x pin control support?
    If yes, should CONFIG_PINCTRL_PFC_R8A7795 be renamed to
    CONFIG_PINCTRL_PFC_R8A77951?

This patch series is based on renesas-drivers-2019-10-01-v5.4-rc1).  For
your convenience, it is available in the topic/r8a77961-v1 branch of my
renesas-drivers git repository at
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.

This has been tested using remote access.

Thanks for your comments!

Geert Uytterhoeven (19):
  dt-bindings: arm: renesas: Document R-Car M3-W+ SoC DT bindings
  dt-bindings: arm: renesas: Add Salvator-XS board with R-Car M3-W+
  dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support
  dt-bindings: pinctrl: sh-pfc: Document r8a77961 support
  dt-bindings: power: rcar-sysc: Document r8a77961 support
  dt-bindings: reset: rcar-rst: Document r8a77961 support
  dt-bindings: serial: sh-sci: Document r8a77961 bindings
  dt-bindings: power: Add r8a77961 SYSC power domain definitions
  dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
  soc: renesas: Add R8A77961 config option
  soc: renesas: Identify R-Car M3-W+
  soc: renesas: rcar-sysc: Add R8A77961 support
  soc: renesas: rcar-rst: Add support for R-Car M3-W+
  clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
  pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support
  arm64: dts: renesas: Add Renesas R8A77961 SoC support
  arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+
  arm64: defconfig: Enable R8A77961 SoC
  [LOCAL] arm64: renesas_defconfig: Enable R8A77961 SoC

 .../devicetree/bindings/arm/renesas.yaml      |   6 +
 .../bindings/clock/renesas,cpg-mssr.txt       |   9 +-
 .../bindings/pinctrl/renesas,pfc-pinctrl.txt  |   1 +
 .../bindings/power/renesas,rcar-sysc.txt      |   1 +
 .../devicetree/bindings/reset/renesas,rst.txt |   1 +
 .../bindings/serial/renesas,sci-serial.txt    |   2 +
 arch/arm64/boot/dts/renesas/Makefile          |   1 +
 .../boot/dts/renesas/r8a77961-salvator-xs.dts |  31 +
 arch/arm64/boot/dts/renesas/r8a77961.dtsi     | 723 ++++++++++++++++++
 arch/arm64/configs/defconfig                  |   1 +
 arch/arm64/configs/renesas_defconfig          |   1 +
 drivers/clk/renesas/Kconfig                   |   5 +
 drivers/clk/renesas/Makefile                  |   1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c        |  21 +-
 drivers/clk/renesas/renesas-cpg-mssr.c        |   6 +
 drivers/pinctrl/sh-pfc/Kconfig                |   4 +
 drivers/pinctrl/sh-pfc/Makefile               |   1 +
 drivers/pinctrl/sh-pfc/core.c                 |   8 +-
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c          |  31 +-
 drivers/pinctrl/sh-pfc/sh_pfc.h               |   3 +-
 drivers/soc/renesas/Kconfig                   |  11 +
 drivers/soc/renesas/Makefile                  |   1 +
 drivers/soc/renesas/r8a7796-sysc.c            |  27 +-
 drivers/soc/renesas/rcar-rst.c                |   1 +
 drivers/soc/renesas/rcar-sysc.c               |   5 +-
 drivers/soc/renesas/rcar-sysc.h               |   3 +-
 drivers/soc/renesas/renesas-soc.c             |   3 +
 include/dt-bindings/clock/r8a77961-cpg-mssr.h |  65 ++
 include/dt-bindings/power/r8a77961-sysc.h     |  32 +
 29 files changed, 978 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77961.dtsi
 create mode 100644 include/dt-bindings/clock/r8a77961-cpg-mssr.h
 create mode 100644 include/dt-bindings/power/r8a77961-sysc.h

-- 
2.17.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC 01/19] dt-bindings: arm: renesas: Document R-Car M3-W+ SoC DT bindings

[Geert Uytterhoeven]

Add device tree binding documentation for the Renesas R-Car M3-W+
(R8A77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 Documentation/devicetree/bindings/arm/renesas.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml
index bc0b4ec54756d6ae..b78e4e33e7c7ef22 100644
--- a/Documentation/devicetree/bindings/arm/renesas.yaml
+++ b/Documentation/devicetree/bindings/arm/renesas.yaml
@@ -205,6 +205,10 @@ properties:
               - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
           - const: renesas,r8a7796
 
+      - description: R-Car M3-W+ (R8A77961)
+        items:
+          - const: renesas,r8a77961
+
       - description: Kingfisher (SBEV-RCAR-KF-M03)
         items:
           - const: shimafuji,kingfisher
-- 
2.17.1

[PATCH/RFC 02/19] dt-bindings: arm: renesas: Add Salvator-XS board with R-Car M3-W+

[Geert Uytterhoeven]

Add device tree binding documentation for the Renesas Salvator-XS board
equipped with an R-Car M3-W+ (R8A77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 Documentation/devicetree/bindings/arm/renesas.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml
index b78e4e33e7c7ef22..21b2b25093538f5f 100644
--- a/Documentation/devicetree/bindings/arm/renesas.yaml
+++ b/Documentation/devicetree/bindings/arm/renesas.yaml
@@ -207,6 +207,8 @@ properties:
 
       - description: R-Car M3-W+ (R8A77961)
         items:
+          - enum:
+              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, FIXME part number)
           - const: renesas,r8a77961
 
       - description: Kingfisher (SBEV-RCAR-KF-M03)
-- 
2.17.1

[PATCH/RFC 03/19] dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support

[Geert Uytterhoeven]

Add DT binding documentation for the Clock Pulse Generator / Module
Standby and Software Reset block in the Renesas R-Car M3-W+ (R8A77961)
SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../devicetree/bindings/clock/renesas,cpg-mssr.txt       | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
index b5edebeb12b40638..b9b0927b7c780699 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
@@ -28,6 +28,7 @@ Required Properties:
       - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
       - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
       - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
+      - "renesas,r8a77961-cpg-mssr" for the r8a77961 SoC (R-Car M3-W+)
       - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)
       - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)
       - "renesas,r8a77980-cpg-mssr" for the r8a77980 SoC (R-Car V3H)
@@ -42,10 +43,10 @@ Required Properties:
   - clock-names: List of external parent clock names. Valid names are:
       - "extal" (r7s9210, r8a7743, r8a7744, r8a7745, r8a77470, r8a774a1,
 		 r8a774b1, r8a774c0, r8a7790, r8a7791, r8a7792, r8a7793,
-		 r8a7794, r8a7795, r8a7796, r8a77965, r8a77970, r8a77980,
-		 r8a77990, r8a77995)
-      - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a7796, r8a77965, r8a77970,
-		  r8a77980)
+		 r8a7794, r8a7795, r8a7796, r8a77961, r8a77965, r8a77970,
+		 r8a77980, r8a77990, r8a77995)
+      - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a7796, r8a77961, r8a77965,
+		  r8a77970, r8a77980)
       - "usb_extal" (r8a7743, r8a7744, r8a7745, r8a77470, r8a7790, r8a7791,
 		     r8a7793, r8a7794)
 
-- 
2.17.1

[PATCH/RFC 04/19] dt-bindings: pinctrl: sh-pfc: Document r8a77961 support

[Geert Uytterhoeven]

Add DT binding documentation for the Pin Function Controller in the
Renesas R-Car M3-W+ (R8A77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index c1b9eb4c8696d547..fd7034e55e3912f4 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -29,6 +29,7 @@ Required Properties:
     - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
     - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
     - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
+    - "renesas,pfc-r8a77961": for R8A77961 (R-Car M3-W+) compatible pin-controller.
     - "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller.
     - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller.
     - "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller.
-- 
2.17.1

[PATCH/RFC 05/19] dt-bindings: power: rcar-sysc: Document r8a77961 support

[Geert Uytterhoeven]

Add DT binding documentation for the System Controller in the Renesas
R-Car M3-W+ (R8A77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
index 712caa5726f7cb91..acb41fade926e2de 100644
--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -22,6 +22,7 @@ Required properties:
       - "renesas,r8a7794-sysc" (R-Car E2)
       - "renesas,r8a7795-sysc" (R-Car H3)
       - "renesas,r8a7796-sysc" (R-Car M3-W)
+      - "renesas,r8a77961-sysc" (R-Car M3-W+)
       - "renesas,r8a77965-sysc" (R-Car M3-N)
       - "renesas,r8a77970-sysc" (R-Car V3M)
       - "renesas,r8a77980-sysc" (R-Car V3H)
-- 
2.17.1

[PATCH/RFC 06/19] dt-bindings: reset: rcar-rst: Document r8a77961 support

[Geert Uytterhoeven]

Add DT binding documentation for the Reset block in the Renesas R-Car
M3-W+ (R8A77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
index d6d6769a0c42735f..de7f06ccd003da9f 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -31,6 +31,7 @@ Required properties:
 		  - "renesas,r8a7794-rst" (R-Car E2)
 		  - "renesas,r8a7795-rst" (R-Car H3)
 		  - "renesas,r8a7796-rst" (R-Car M3-W)
+		  - "renesas,r8a77961-rst" (R-Car M3-W+)
 		  - "renesas,r8a77965-rst" (R-Car M3-N)
 		  - "renesas,r8a77970-rst" (R-Car V3M)
 		  - "renesas,r8a77980-rst" (R-Car V3H)
-- 
2.17.1

[PATCH/RFC 07/19] dt-bindings: serial: sh-sci: Document r8a77961 bindings

[Geert Uytterhoeven]

Document support for the SCIF and HSCIF serial ports in the Renesas
R-Car M3-W+ (R8A77961) SoC.

No driver update is needed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index dd63151dc8b6d3e1..cebe63434fa7c993 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -54,6 +54,8 @@ Required properties:
     - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.
     - "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART.
     - "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART.
+    - "renesas,scif-r8a77961" for R8A77961 (R-Car M3-W+) SCIF compatible UART.
+    - "renesas,hscif-r8a77961" for R8A77961 (R-Car M3-W+) HSCIF compatible UART.
     - "renesas,scif-r8a77965" for R8A77965 (R-Car M3-N) SCIF compatible UART.
     - "renesas,hscif-r8a77965" for R8A77965 (R-Car M3-N) HSCIF compatible UART.
     - "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART.
-- 
2.17.1

[PATCH/RFC 08/19] dt-bindings: power: Add r8a77961 SYSC power domain definitions

[Geert Uytterhoeven]

Add power domain indices for the R-Car M3-W+ (R8A77961) SoC.

Based on Rev. 2.00 of the R-Car Series, 3rd Generation, Hardware User’s
Manual (Jul. 31, 2019).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 include/dt-bindings/power/r8a77961-sysc.h | 32 +++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 include/dt-bindings/power/r8a77961-sysc.h

diff --git a/include/dt-bindings/power/r8a77961-sysc.h b/include/dt-bindings/power/r8a77961-sysc.h
new file mode 100644
index 0000000000000000..7a3800996f7c0252
--- /dev/null
+++ b/include/dt-bindings/power/r8a77961-sysc.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2019 Glider bvba
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77961_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77961_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77961_PD_CA57_CPU0		 0
+#define R8A77961_PD_CA57_CPU1		 1
+#define R8A77961_PD_CA53_CPU0		 5
+#define R8A77961_PD_CA53_CPU1		 6
+#define R8A77961_PD_CA53_CPU2		 7
+#define R8A77961_PD_CA53_CPU3		 8
+#define R8A77961_PD_CA57_SCU		12
+#define R8A77961_PD_CR7			13
+#define R8A77961_PD_A3VC		14
+#define R8A77961_PD_3DG_A		17
+#define R8A77961_PD_3DG_B		18
+#define R8A77961_PD_CA53_SCU		21
+#define R8A77961_PD_A3IR		24
+#define R8A77961_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A77961_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77961_SYSC_H__ */
-- 
2.17.1

[PATCH/RFC 09/19] dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions

[Geert Uytterhoeven]

Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car
M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's
Manual (Rev. 2.00, Jul. 31, 2019).  A gap is added for CSIREF, to
preserve compatibility with the definitions for R-Car M3-W (R8A77960).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2)
are not included, as they are used as internal clock sources only, and
never referenced from DT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 include/dt-bindings/clock/r8a77961-cpg-mssr.h | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 include/dt-bindings/clock/r8a77961-cpg-mssr.h

diff --git a/include/dt-bindings/clock/r8a77961-cpg-mssr.h b/include/dt-bindings/clock/r8a77961-cpg-mssr.h
new file mode 100644
index 0000000000000000..7921d785546d12ce
--- /dev/null
+++ b/include/dt-bindings/clock/r8a77961-cpg-mssr.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * Copyright (C) 2019 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A77961_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A77961_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a77961 CPG Core Clocks */
+#define R8A77961_CLK_Z			0
+#define R8A77961_CLK_Z2			1
+#define R8A77961_CLK_ZR			2
+#define R8A77961_CLK_ZG			3
+#define R8A77961_CLK_ZTR			4
+#define R8A77961_CLK_ZTRD2		5
+#define R8A77961_CLK_ZT			6
+#define R8A77961_CLK_ZX			7
+#define R8A77961_CLK_S0D1		8
+#define R8A77961_CLK_S0D2		9
+#define R8A77961_CLK_S0D3		10
+#define R8A77961_CLK_S0D4		11
+#define R8A77961_CLK_S0D6		12
+#define R8A77961_CLK_S0D8		13
+#define R8A77961_CLK_S0D12		14
+#define R8A77961_CLK_S1D1		15
+#define R8A77961_CLK_S1D2		16
+#define R8A77961_CLK_S1D4		17
+#define R8A77961_CLK_S2D1		18
+#define R8A77961_CLK_S2D2		19
+#define R8A77961_CLK_S2D4		20
+#define R8A77961_CLK_S3D1		21
+#define R8A77961_CLK_S3D2		22
+#define R8A77961_CLK_S3D4		23
+#define R8A77961_CLK_LB			24
+#define R8A77961_CLK_CL			25
+#define R8A77961_CLK_ZB3			26
+#define R8A77961_CLK_ZB3D2		27
+#define R8A77961_CLK_ZB3D4		28
+#define R8A77961_CLK_CR			29
+#define R8A77961_CLK_CRD2		30
+#define R8A77961_CLK_SD0H		31
+#define R8A77961_CLK_SD0			32
+#define R8A77961_CLK_SD1H		33
+#define R8A77961_CLK_SD1			34
+#define R8A77961_CLK_SD2H		35
+#define R8A77961_CLK_SD2			36
+#define R8A77961_CLK_SD3H		37
+#define R8A77961_CLK_SD3			38
+#define R8A77961_CLK_SSP2		39
+#define R8A77961_CLK_SSP1		40
+#define R8A77961_CLK_SSPRS		41
+#define R8A77961_CLK_RPC			42
+#define R8A77961_CLK_RPCD2		43
+#define R8A77961_CLK_MSO			44
+#define R8A77961_CLK_CANFD		45
+#define R8A77961_CLK_HDMI		46
+#define R8A77961_CLK_CSI0		47
+/* CLK_CSIREF was removed */
+#define R8A77961_CLK_CP			49
+#define R8A77961_CLK_CPEX		50
+#define R8A77961_CLK_R			51
+#define R8A77961_CLK_OSC			52
+
+#endif /* __DT_BINDINGS_CLOCK_R8A77961_CPG_MSSR_H__ */
-- 
2.17.1

[PATCH/RFC 10/19] soc: renesas: Add R8A77961 config option

[Geert Uytterhoeven]

Add a configuration option for the Renesas R-Car M3-W+ (R8A77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/soc/renesas/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 3bd0c218bf30992a..b2ec65210bd770d5 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -206,6 +206,12 @@ config ARCH_R8A7796
 	help
 	  This enables support for the Renesas R-Car M3-W SoC.
 
+config ARCH_R8A77961
+	bool "Renesas R-Car M3-W+ SoC Platform"
+	select ARCH_RCAR_GEN3
+	help
+	  This enables support for the Renesas R-Car M3-W+ SoC.
+
 config ARCH_R8A77965
 	bool "Renesas R-Car M3-N SoC Platform"
 	select ARCH_RCAR_GEN3
-- 
2.17.1

[PATCH/RFC 11/19] soc: renesas: Identify R-Car M3-W+

[Geert Uytterhoeven]

Add support for identifying the R-Car M3-W+ (R8A77961) SoC, which shares
the Product ID Number with R-Car M3-W (R8A77960), but differs in CUT
Number (Ver. 3.0).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/soc/renesas/renesas-soc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 45135bc88e277d34..5dc2ae55f746a48a 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -265,6 +265,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
 #ifdef CONFIG_ARCH_R8A7796
 	{ .compatible = "renesas,r8a7796",	.data = &soc_rcar_m3_w },
 #endif
+#ifdef CONFIG_ARCH_R8A77961
+	{ .compatible = "renesas,r8a77961",	.data = &soc_rcar_m3_w },
+#endif
 #ifdef CONFIG_ARCH_R8A77965
 	{ .compatible = "renesas,r8a77965",	.data = &soc_rcar_m3_n },
 #endif
-- 
2.17.1

[PATCH/RFC 12/19] soc: renesas: rcar-sysc: Add R8A77961 support

[Geert Uytterhoeven]

Add support for the power areas in the Renesas R-Car M3-W+ (R8A77961)
SoC to the R-Car System Controller driver.

R-Car M3-W+ (aka R-Car M3-W ES3.0) is very similar to R-Car
M3-W (R8A77960), which allows for both SoCs to share a driver:
  - R-Car M3-W+ lacks the A2VC power area, so its area must be
    nullified,
  - The existing support for the SYSCEXTMASK register added in commit
    9bd645af9d2a49ac ("soc: renesas: r8a7796-sysc: Fix power request
    conflicts") applies to ES3.0 and later only.
    As R-Car M3-W+ uses a different compatible value, differentiate
    based on that, instead of on the ES version.

Rename r8a7796_sysc_info to r8a77960_sysc_info for consistency.

Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/soc/renesas/Kconfig        |  5 +++++
 drivers/soc/renesas/Makefile       |  1 +
 drivers/soc/renesas/r8a7796-sysc.c | 27 +++++++++++++--------------
 drivers/soc/renesas/rcar-sysc.c    |  5 ++++-
 drivers/soc/renesas/rcar-sysc.h    |  3 ++-
 5 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index b2ec65210bd770d5..62d388c10c7a7207 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -209,6 +209,7 @@ config ARCH_R8A7796
 config ARCH_R8A77961
 	bool "Renesas R-Car M3-W+ SoC Platform"
 	select ARCH_RCAR_GEN3
+	select SYSC_R8A77961
 	help
 	  This enables support for the Renesas R-Car M3-W+ SoC.
 
@@ -302,6 +303,10 @@ config SYSC_R8A7796
 	bool "R-Car M3-W System Controller support" if COMPILE_TEST
 	select SYSC_RCAR
 
+config SYSC_R8A77961
+	bool "R-Car M3-W+ System Controller support" if COMPILE_TEST
+	select SYSC_RCAR
+
 config SYSC_R8A77965
 	bool "R-Car M3-N System Controller support" if COMPILE_TEST
 	select SYSC_RCAR
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index e99dc37ea1209444..5d2d6abf38e505ac 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SYSC_R8A7792)	+= r8a7792-sysc.o
 obj-$(CONFIG_SYSC_R8A7794)	+= r8a7794-sysc.o
 obj-$(CONFIG_SYSC_R8A7795)	+= r8a7795-sysc.o
 obj-$(CONFIG_SYSC_R8A7796)	+= r8a7796-sysc.o
+obj-$(CONFIG_SYSC_R8A77961)	+= r8a7796-sysc.o
 obj-$(CONFIG_SYSC_R8A77965)	+= r8a77965-sysc.o
 obj-$(CONFIG_SYSC_R8A77970)	+= r8a77970-sysc.o
 obj-$(CONFIG_SYSC_R8A77980)	+= r8a77980-sysc.o
diff --git a/drivers/soc/renesas/r8a7796-sysc.c b/drivers/soc/renesas/r8a7796-sysc.c
index d374622a667bbfbd..46770615859c9871 100644
--- a/drivers/soc/renesas/r8a7796-sysc.c
+++ b/drivers/soc/renesas/r8a7796-sysc.c
@@ -1,19 +1,19 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Renesas R-Car M3-W System Controller
+ * Renesas R-Car M3-W/W+ System Controller
  *
  * Copyright (C) 2016 Glider bvba
+ * Copyright (C) 2018-2019 Renesas Electronics Corporation
  */
 
 #include <linux/bits.h>
 #include <linux/kernel.h>
-#include <linux/sys_soc.h>
 
 #include <dt-bindings/power/r8a7796-sysc.h>
 
 #include "rcar-sysc.h"
 
-static const struct rcar_sysc_area r8a7796_areas[] __initconst = {
+static struct rcar_sysc_area r8a7796_areas[] __initdata = {
 	{ "always-on",	    0, 0, R8A7796_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },
 	{ "ca57-scu",	0x1c0, 0, R8A7796_PD_CA57_SCU,	R8A7796_PD_ALWAYS_ON,
 	  PD_SCU },
@@ -41,22 +41,21 @@ static const struct rcar_sysc_area r8a7796_areas[] __initconst = {
 };
 
 
-/* Fixups for R-Car M3-W ES1.x revision */
-static const struct soc_device_attribute r8a7796es1[] __initconst = {
-	{ .soc_id = "r8a7796", .revision = "ES1.*" },
-	{ /* sentinel */ }
-};
-
-static int __init r8a7796_sysc_init(void)
+static int __init r8a77961_sysc_init(void)
 {
-	if (soc_device_match(r8a7796es1))
-		r8a7796_sysc_info.extmask_val = 0;
+	rcar_sysc_nullify(r8a7796_areas, ARRAY_SIZE(r8a7796_areas),
+			  R8A7796_PD_A2VC0);
 
 	return 0;
 }
 
-struct rcar_sysc_info r8a7796_sysc_info __initdata = {
-	.init = r8a7796_sysc_init,
+const struct rcar_sysc_info r8a77960_sysc_info __initconst = {
+	.areas = r8a7796_areas,
+	.num_areas = ARRAY_SIZE(r8a7796_areas),
+};
+
+const struct rcar_sysc_info r8a77961_sysc_info __initconst = {
+	.init = r8a77961_sysc_init,
 	.areas = r8a7796_areas,
 	.num_areas = ARRAY_SIZE(r8a7796_areas),
 	.extmask_offs = 0x2f8,
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index d4f2ed52b2b363be..9d63e2ad53b76e6d 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -314,7 +314,10 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 	{ .compatible = "renesas,r8a7795-sysc", .data = &r8a7795_sysc_info },
 #endif
 #ifdef CONFIG_SYSC_R8A7796
-	{ .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
+	{ .compatible = "renesas,r8a7796-sysc", .data = &r8a77960_sysc_info },
+#endif
+#ifdef CONFIG_SYSC_R8A77961
+	{ .compatible = "renesas,r8a77961-sysc", .data = &r8a77961_sysc_info },
 #endif
 #ifdef CONFIG_SYSC_R8A77965
 	{ .compatible = "renesas,r8a77965-sysc", .data = &r8a77965_sysc_info },
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index e4c9854f5dc00492..8d074489fba96821 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -61,7 +61,8 @@ extern const struct rcar_sysc_info r8a7791_sysc_info;
 extern const struct rcar_sysc_info r8a7792_sysc_info;
 extern const struct rcar_sysc_info r8a7794_sysc_info;
 extern struct rcar_sysc_info r8a7795_sysc_info;
-extern struct rcar_sysc_info r8a7796_sysc_info;
+extern const struct rcar_sysc_info r8a77960_sysc_info;
+extern const struct rcar_sysc_info r8a77961_sysc_info;
 extern const struct rcar_sysc_info r8a77965_sysc_info;
 extern const struct rcar_sysc_info r8a77970_sysc_info;
 extern const struct rcar_sysc_info r8a77980_sysc_info;
-- 
2.17.1

[PATCH/RFC 13/19] soc: renesas: rcar-rst: Add support for R-Car M3-W+

[Geert Uytterhoeven]

Add support for the Reset block in the R-Car M3-W+ (R8A77961) SoC to the
Renesas R-Car RST driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/soc/renesas/rcar-rst.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index cd5592977cefc22b..14d05a070dd3ecea 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -59,6 +59,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
 	/* R-Car Gen3 */
 	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
 	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
+	{ .compatible = "renesas,r8a77961-rst", .data = &rcar_rst_gen3 },
 	{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
 	{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
 	{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
-- 
2.17.1

[PATCH/RFC 14/19] clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support

[Geert Uytterhoeven]

Add support for the R-Car M3-W+ (R8A77961) SoC to the Renesas Clock
Pulse Generator / Module Standby and Software Reset driver.

R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver.  R-Car M3-W+ lacks a few modules, so their
clocks must be nullified.

Based on a patch in the BSP by Takeshi Kihara
<takeshi.kihara.df@renesas.com>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/clk/renesas/Kconfig            |  5 +++++
 drivers/clk/renesas/Makefile           |  1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c | 21 ++++++++++++++++++---
 drivers/clk/renesas/renesas-cpg-mssr.c |  6 ++++++
 4 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index be03bb74801252bc..abdd39052ad44991 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -22,6 +22,7 @@ config CLK_RENESAS
 	select CLK_R8A7794 if ARCH_R8A7794
 	select CLK_R8A7795 if ARCH_R8A7795
 	select CLK_R8A7796 if ARCH_R8A7796
+	select CLK_R8A77961 if ARCH_R8A77961
 	select CLK_R8A77965 if ARCH_R8A77965
 	select CLK_R8A77970 if ARCH_R8A77970
 	select CLK_R8A77980 if ARCH_R8A77980
@@ -113,6 +114,10 @@ config CLK_R8A7796
 	bool "R-Car M3-W clock support" if COMPILE_TEST
 	select CLK_RCAR_GEN3_CPG
 
+config CLK_R8A77961
+	bool "R-Car M3-W+ clock support" if COMPILE_TEST
+	select CLK_RCAR_GEN3_CPG
+
 config CLK_R8A77965
 	bool "R-Car M3-N clock support" if COMPILE_TEST
 	select CLK_RCAR_GEN3_CPG
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index ef0fdd00d2b741b2..7cb12b37be77b33d 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_CLK_R8A7792)		+= r8a7792-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7794)		+= r8a7794-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7795)		+= r8a7795-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A7796)		+= r8a7796-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A77961)		+= r8a7796-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77965)		+= r8a77965-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77970)		+= r8a77970-cpg-mssr.o
 obj-$(CONFIG_CLK_R8A77980)		+= r8a77980-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 90cc6a1026028fa8..8cc4876daae30bdd 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -2,8 +2,8 @@
 /*
  * r8a7796 Clock Pulse Generator / Module Standby and Software Reset
  *
- * Copyright (C) 2016 Glider bvba
- * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2016-2019 Glider bvba
+ * Copyright (C) 2018-2019 Renesas Electronics Corp.
  *
  * Based on r8a7795-cpg-mssr.c
  *
@@ -14,6 +14,7 @@
 #include <linux/device.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/of.h>
 #include <linux/soc/renesas/rcar-rst.h>
 
 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
@@ -116,7 +117,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
 	DEF_BASE("r",           R8A7796_CLK_R,     CLK_TYPE_GEN3_R, CLK_RINT),
 };
 
-static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
+static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
 	DEF_MOD("fdp1-0",		 119,	R8A7796_CLK_S0D1),
 	DEF_MOD("scif5",		 202,	R8A7796_CLK_S3D4),
 	DEF_MOD("scif4",		 203,	R8A7796_CLK_S3D4),
@@ -304,6 +305,14 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
 	{ 2,		192,	1,	192,	1,	32,	},
 };
 
+	/*
+	 * Fixups for R-Car M3-W+
+	 */
+
+static const unsigned int r8a77961_mod_nullify[] __initconst = {
+	MOD_CLK_ID(617),			/* FCPCI0  */
+};
+
 static int __init r8a7796_cpg_mssr_init(struct device *dev)
 {
 	const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
@@ -320,6 +329,12 @@ static int __init r8a7796_cpg_mssr_init(struct device *dev)
 		return -EINVAL;
 	}
 
+	if (of_device_is_compatible(dev->of_node, "renesas,r8a77961-cpg-mssr"))
+		mssr_mod_nullify(r8a7796_mod_clks,
+				 ARRAY_SIZE(r8a7796_mod_clks),
+				 r8a77961_mod_nullify,
+				 ARRAY_SIZE(r8a77961_mod_nullify));
+
 	return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);
 }
 
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 35966678148e2c8b..1518cd304bce3ae8 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -755,6 +755,12 @@ static const struct of_device_id cpg_mssr_match[] = {
 		.data = &r8a7796_cpg_mssr_info,
 	},
 #endif
+#ifdef CONFIG_CLK_R8A77961
+	{
+		.compatible = "renesas,r8a77961-cpg-mssr",
+		.data = &r8a7796_cpg_mssr_info,
+	},
+#endif
 #ifdef CONFIG_CLK_R8A77965
 	{
 		.compatible = "renesas,r8a77965-cpg-mssr",
-- 
2.17.1

[PATCH/RFC 15/19] pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support

[Geert Uytterhoeven]

Add support for the Pin Function Controller in the R-Car M3-W+
(R8A77961) SoC.

R-Car M3-W+ is pin compatible with R-Car M3-W (R8A77960), which allows
for both SoCs to share a driver.

Rename r8a7796_pinmux_info to r8a77960_pinmux_info for consistency.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/Kconfig       |  4 ++++
 drivers/pinctrl/sh-pfc/Makefile      |  1 +
 drivers/pinctrl/sh-pfc/core.c        |  8 ++++++-
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 31 ++++++++++++++++++++++++++--
 drivers/pinctrl/sh-pfc/sh_pfc.h      |  3 ++-
 5 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
index de2a33ab945bf1c2..c9e8bd261748898a 100644
--- a/drivers/pinctrl/sh-pfc/Kconfig
+++ b/drivers/pinctrl/sh-pfc/Kconfig
@@ -28,6 +28,7 @@ config PINCTRL_SH_PFC
 	select PINCTRL_PFC_R8A7794 if ARCH_R8A7794
 	select PINCTRL_PFC_R8A7795 if ARCH_R8A7795
 	select PINCTRL_PFC_R8A7796 if ARCH_R8A7796
+	select PINCTRL_PFC_R8A77961 if ARCH_R8A77961
 	select PINCTRL_PFC_R8A77965 if ARCH_R8A77965
 	select PINCTRL_PFC_R8A77970 if ARCH_R8A77970
 	select PINCTRL_PFC_R8A77980 if ARCH_R8A77980
@@ -120,6 +121,9 @@ config PINCTRL_PFC_R8A7795
 config PINCTRL_PFC_R8A7796
 	bool "R-Car M3-W pin control support" if COMPILE_TEST
 
+config PINCTRL_PFC_R8A77961
+	bool "R-Car M3-W+ pin control support" if COMPILE_TEST
+
 config PINCTRL_PFC_R8A77965
 	bool "R-Car M3-N pin control support" if COMPILE_TEST
 
diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
index 00b12af651ebe744..af71444155bb37c5 100644
--- a/drivers/pinctrl/sh-pfc/Makefile
+++ b/drivers/pinctrl/sh-pfc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7794)	+= pfc-r8a7794.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795-es1.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7796)	+= pfc-r8a7796.o
+obj-$(CONFIG_PINCTRL_PFC_R8A77961)	+= pfc-r8a7796.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77965)	+= pfc-r8a77965.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77970)	+= pfc-r8a77970.o
 obj-$(CONFIG_PINCTRL_PFC_R8A77980)	+= pfc-r8a77980.o
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index f8cbd33b4511be69..1745c0639932c7a7 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -588,7 +588,13 @@ static const struct of_device_id sh_pfc_of_table[] = {
 #ifdef CONFIG_PINCTRL_PFC_R8A7796
 	{
 		.compatible = "renesas,pfc-r8a7796",
-		.data = &r8a7796_pinmux_info,
+		.data = &r8a77960_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A77961
+	{
+		.compatible = "renesas,pfc-r8a77961",
+		.data = &r8a77961_pinmux_info,
 	},
 #endif
 #ifdef CONFIG_PINCTRL_PFC_R8A77965
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index 61db7c7a35ec9cb4..c3047c315e7b9f8f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * R8A7796 processor support - PFC hardware block.
+ * R8A7796 (R-Car M3-W/W+) support - PFC hardware block.
  *
  * Copyright (C) 2016-2019 Renesas Electronics Corp.
  *
@@ -6211,7 +6211,7 @@ const struct sh_pfc_soc_info r8a774a1_pinmux_info = {
 #endif
 
 #ifdef CONFIG_PINCTRL_PFC_R8A7796
-const struct sh_pfc_soc_info r8a7796_pinmux_info = {
+const struct sh_pfc_soc_info r8a77960_pinmux_info = {
 	.name = "r8a77960_pfc",
 	.ops = &r8a7796_pinmux_ops,
 	.unlock_reg = 0xe6060000, /* PMMR */
@@ -6236,3 +6236,30 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
 	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
 };
 #endif
+
+#ifdef CONFIG_PINCTRL_PFC_R8A77961
+const struct sh_pfc_soc_info r8a77961_pinmux_info = {
+	.name = "r8a77961_pfc",
+	.ops = &r8a7796_pinmux_ops,
+	.unlock_reg = 0xe6060000, /* PMMR */
+
+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+	.pins = pinmux_pins,
+	.nr_pins = ARRAY_SIZE(pinmux_pins),
+	.groups = pinmux_groups.common,
+	.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
+		ARRAY_SIZE(pinmux_groups.automotive),
+	.functions = pinmux_functions.common,
+	.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
+		ARRAY_SIZE(pinmux_functions.automotive),
+
+	.cfg_regs = pinmux_config_regs,
+	.drive_regs = pinmux_drive_regs,
+	.bias_regs = pinmux_bias_regs,
+	.ioctrl_regs = pinmux_ioctrl_regs,
+
+	.pinmux_data = pinmux_data,
+	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
+};
+#endif
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 63d2089240c6c0fb..d7a72e2f2330db04 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -320,7 +320,8 @@ extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7795es1_pinmux_info;
-extern const struct sh_pfc_soc_info r8a7796_pinmux_info;
+extern const struct sh_pfc_soc_info r8a77960_pinmux_info;
+extern const struct sh_pfc_soc_info r8a77961_pinmux_info;
 extern const struct sh_pfc_soc_info r8a77965_pinmux_info;
 extern const struct sh_pfc_soc_info r8a77970_pinmux_info;
 extern const struct sh_pfc_soc_info r8a77980_pinmux_info;
-- 
2.17.1

[PATCH/RFC 16/19] arm64: dts: renesas: Add Renesas R8A77961 SoC support

[Geert Uytterhoeven]

Add initial support for the Renesas R-Car M3-W+ (R8A77961) SoC.

This includes:
  - Cortex-A57 and Cortex-A53 CPU cores
    (incl. L2 caches and power state definitions),
  - Power Management Unit,
  - PSCI firmware,
  - Pin Function Controller,
  - Clock, Reset, System, and Interrupt Controllers,
  - SCIF2 serial console,
  - Product Register,
  - ARM Architectured Timer,
and various placeholders to allow to use salvator-xs.dtsi.

Based on r8a7796.dtsi.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 723 ++++++++++++++++++++++
 1 file changed, 723 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77961.dtsi

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
new file mode 100644
index 0000000000000000..64466c86b698826d
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -0,0 +1,723 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
+ *
+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/clock/r8a77961-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77961-sysc.h>
+
+#define CPG_AUDIO_CLK_I		R8A77961_CLK_S0D4
+
+/ {
+	compatible = "renesas,r8a77961";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	/*
+	 * The external audio clocks are configured as 0 Hz fixed frequency
+	 * clocks by default.
+	 * Boards that provide audio clocks should override them.
+	 */
+	audio_clk_a: audio_clk_a {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	audio_clk_b: audio_clk_b {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	audio_clk_c: audio_clk_c {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	/* External CAN clock - to be overridden by boards that provide it */
+	can_clk: can {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	cluster0_opp: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+		};
+		opp-1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+		};
+		opp-1500000000 {
+			opp-hz = /bits/ 64 <1500000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+		};
+		opp-1600000000 {
+			opp-hz = /bits/ 64 <1600000000>;
+			opp-microvolt = <900000>;
+			clock-latency-ns = <300000>;
+			turbo-mode;
+		};
+		opp-1700000000 {
+			opp-hz = /bits/ 64 <1700000000>;
+			opp-microvolt = <900000>;
+			clock-latency-ns = <300000>;
+			turbo-mode;
+		};
+		opp-1800000000 {
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <960000>;
+			clock-latency-ns = <300000>;
+			turbo-mode;
+		};
+	};
+
+	cluster1_opp: opp_table1 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+		};
+		opp-1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+		};
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+		};
+		opp-1300000000 {
+			opp-hz = /bits/ 64 <1300000000>;
+			opp-microvolt = <820000>;
+			clock-latency-ns = <300000>;
+			turbo-mode;
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&a57_0>;
+				};
+				core1 {
+					cpu = <&a57_1>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&a53_0>;
+				};
+				core1 {
+					cpu = <&a53_1>;
+				};
+				core2 {
+					cpu = <&a53_2>;
+				};
+				core3 {
+					cpu = <&a53_3>;
+				};
+			};
+		};
+
+		a57_0: cpu@0 {
+			compatible = "arm,cortex-a57";
+			reg = <0x0>;
+			device_type = "cpu";
+			power-domains = <&sysc R8A77961_PD_CA57_CPU0>;
+			next-level-cache = <&L2_CA57>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
+			dynamic-power-coefficient = <854>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
+			operating-points-v2 = <&cluster0_opp>;
+			capacity-dmips-mhz = <1024>;
+			#cooling-cells = <2>;
+		};
+
+		a57_1: cpu@1 {
+			compatible = "arm,cortex-a57";
+			reg = <0x1>;
+			device_type = "cpu";
+			power-domains = <&sysc R8A77961_PD_CA57_CPU1>;
+			next-level-cache = <&L2_CA57>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
+			operating-points-v2 = <&cluster0_opp>;
+			capacity-dmips-mhz = <1024>;
+			#cooling-cells = <2>;
+		};
+
+		a53_0: cpu@100 {
+			compatible = "arm,cortex-a53";
+			reg = <0x100>;
+			device_type = "cpu";
+			power-domains = <&sysc R8A77961_PD_CA53_CPU0>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
+			#cooling-cells = <2>;
+			dynamic-power-coefficient = <277>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
+			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <535>;
+		};
+
+		a53_1: cpu@101 {
+			compatible = "arm,cortex-a53";
+			reg = <0x101>;
+			device_type = "cpu";
+			power-domains = <&sysc R8A77961_PD_CA53_CPU1>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
+			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <535>;
+		};
+
+		a53_2: cpu@102 {
+			compatible = "arm,cortex-a53";
+			reg = <0x102>;
+			device_type = "cpu";
+			power-domains = <&sysc R8A77961_PD_CA53_CPU2>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
+			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <535>;
+		};
+
+		a53_3: cpu@103 {
+			compatible = "arm,cortex-a53";
+			reg = <0x103>;
+			device_type = "cpu";
+			power-domains = <&sysc R8A77961_PD_CA53_CPU3>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
+			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <535>;
+		};
+
+		L2_CA57: cache-controller-0 {
+			compatible = "cache";
+			power-domains = <&sysc R8A77961_PD_CA57_SCU>;
+			cache-unified;
+			cache-level = <2>;
+		};
+
+		L2_CA53: cache-controller-1 {
+			compatible = "cache";
+			power-domains = <&sysc R8A77961_PD_CA53_SCU>;
+			cache-unified;
+			cache-level = <2>;
+		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP_0: cpu-sleep-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <400>;
+				exit-latency-us = <500>;
+				min-residency-us = <4000>;
+			};
+
+			CPU_SLEEP_1: cpu-sleep-1 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <700>;
+				exit-latency-us = <700>;
+				min-residency-us = <5000>;
+			};
+		};
+	};
+
+	extal_clk: extal {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board */
+		clock-frequency = <0>;
+	};
+
+	extalr_clk: extalr {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board */
+		clock-frequency = <0>;
+	};
+
+	/* External PCIe clock - can be overridden by the board */
+	pcie_bus_clk: pcie_bus {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	pmu_a53 {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+				      <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+				      <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
+	};
+
+	pmu_a57 {
+		compatible = "arm,cortex-a57-pmu";
+		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&a57_0>, <&a57_1>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
+		method = "smc";
+	};
+
+	/* External SCIF clock - to be overridden by boards that provide it */
+	scif_clk: scif {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		interrupt-parent = <&gic>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		rwdt: watchdog@e6020000 {
+			reg = <0 0xe6020000 0 0x0c>;
+			/* placeholder */
+		};
+
+		gpio2: gpio@e6052000 {
+			reg = <0 0xe6052000 0 0x50>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			/* placeholder */
+		};
+
+		gpio3: gpio@e6053000 {
+			reg = <0 0xe6053000 0 0x50>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			/* placeholder */
+		};
+
+		gpio4: gpio@e6054000 {
+			reg = <0 0xe6054000 0 0x50>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			/* placeholder */
+		};
+
+		gpio5: gpio@e6055000 {
+			reg = <0 0xe6055000 0 0x50>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			/* placeholder */
+		};
+
+		gpio6: gpio@e6055400 {
+			reg = <0 0xe6055400 0 0x50>;
+			#gpio-cells = <2>;
+			gpio-controller;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			/* placeholder */
+		};
+
+		pfc: pin-controller@e6060000 {
+			compatible = "renesas,pfc-r8a77961";
+			reg = <0 0xe6060000 0 0x50c>;
+		};
+
+		cpg: clock-controller@e6150000 {
+			compatible = "renesas,r8a77961-cpg-mssr";
+			reg = <0 0xe6150000 0 0x1000>;
+			clocks = <&extal_clk>, <&extalr_clk>;
+			clock-names = "extal", "extalr";
+			#clock-cells = <2>;
+			#power-domain-cells = <0>;
+			#reset-cells = <1>;
+		};
+
+		rst: reset-controller@e6160000 {
+			compatible = "renesas,r8a77961-rst";
+			reg = <0 0xe6160000 0 0x0200>;
+		};
+
+		sysc: system-controller@e6180000 {
+			compatible = "renesas,r8a77961-sysc";
+			reg = <0 0xe6180000 0 0x0400>;
+			#power-domain-cells = <1>;
+		};
+
+		intc_ex: interrupt-controller@e61c0000 {
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			reg = <0 0xe61c0000 0 0x200>;
+			/* placeholder */
+		};
+
+		i2c2: i2c@e6510000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0 0xe6510000 0 0x40>;
+			/* placeholder */
+		};
+
+		i2c4: i2c@e66d8000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0 0xe66d8000 0 0x40>;
+			/* placeholder */
+		};
+
+		i2c_dvfs: i2c@e60b0000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0 0xe60b0000 0 0x425>;
+			/* placeholder */
+		};
+
+		hscif1: serial@e6550000 {
+			reg = <0 0xe6550000 0 0x60>;
+			/* placeholder */
+		};
+
+		hsusb: usb@e6590000 {
+			reg = <0 0xe6590000 0 0x200>;
+			/* placeholder */
+		};
+
+		usb3_phy0: usb-phy@e65ee000 {
+			reg = <0 0xe65ee000 0 0x90>;
+			#phy-cells = <0>;
+			/* placeholder */
+		};
+
+		avb: ethernet@e6800000 {
+			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			/* placeholder */
+		};
+
+		pwm1: pwm@e6e31000 {
+			reg = <0 0xe6e31000 0 8>;
+			#pwm-cells = <2>;
+			/* placeholder */
+		};
+
+		scif1: serial@e6e68000 {
+			reg = <0 0xe6e68000 0 64>;
+			/* placeholder */
+		};
+
+		scif2: serial@e6e88000 {
+			compatible = "renesas,scif-r8a77961",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6e88000 0 64>;
+			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 310>,
+				 <&cpg CPG_CORE R8A77961_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 310>;
+			status = "disabled";
+		};
+
+		vin0: video@e6ef0000 {
+			reg = <0 0xe6ef0000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin1: video@e6ef1000 {
+			reg = <0 0xe6ef1000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin2: video@e6ef2000 {
+			reg = <0 0xe6ef2000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin3: video@e6ef3000 {
+			reg = <0 0xe6ef3000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin4: video@e6ef4000 {
+			reg = <0 0xe6ef4000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin5: video@e6ef5000 {
+			reg = <0 0xe6ef5000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin6: video@e6ef6000 {
+			reg = <0 0xe6ef6000 0 0x1000>;
+			/* placeholder */
+		};
+
+		vin7: video@e6ef7000 {
+			reg = <0 0xe6ef7000 0 0x1000>;
+			/* placeholder */
+		};
+
+		rcar_sound: sound@ec500000 {
+			reg = <0 0xec500000 0 0x1000>, /* SCU */
+			      <0 0xec5a0000 0 0x100>,  /* ADG */
+			      <0 0xec540000 0 0x1000>, /* SSIU */
+			      <0 0xec541000 0 0x280>,  /* SSI */
+			      <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+			/* placeholder */
+			rcar_sound,dvc {
+				dvc0: dvc-0 { };
+				dvc1: dvc-1 { };
+			};
+
+			rcar_sound,src {
+				src0: src-0 { };
+				src1: src-1 { };
+			};
+
+			rcar_sound,ssi {
+				ssi0: ssi-0 { };
+				ssi1: ssi-1 { };
+			};
+		};
+
+		xhci0: usb@ee000000 {
+			reg = <0 0xee000000 0 0xc00>;
+			/* placeholder */
+		};
+
+		usb3_peri0: usb@ee020000 {
+			reg = <0 0xee020000 0 0x400>;
+			/* placeholder */
+		};
+
+		ohci0: usb@ee080000 {
+			reg = <0 0xee080000 0 0x100>;
+			/* placeholder */
+		};
+
+		ohci1: usb@ee0a0000 {
+			reg = <0 0xee0a0000 0 0x100>;
+			/* placeholder */
+		};
+
+		ehci0: usb@ee080100 {
+			reg = <0 0xee080100 0 0x100>;
+			/* placeholder */
+		};
+
+		ehci1: usb@ee0a0100 {
+			reg = <0 0xee0a0100 0 0x100>;
+			/* placeholder */
+		};
+
+		usb2_phy0: usb-phy@ee080200 {
+			reg = <0 0xee080200 0 0x700>;
+			/* placeholder */
+		};
+
+		usb2_phy1: usb-phy@ee0a0200 {
+			reg = <0 0xee0a0200 0 0x700>;
+			/* placeholder */
+		};
+
+		sdhi0: sd@ee100000 {
+			reg = <0 0xee100000 0 0x2000>;
+			/* placeholder */
+		};
+
+		sdhi2: sd@ee140000 {
+			reg = <0 0xee140000 0 0x2000>;
+			/* placeholder */
+		};
+
+		sdhi3: sd@ee160000 {
+			reg = <0 0xee160000 0 0x2000>;
+			/* placeholder */
+		};
+
+		gic: interrupt-controller@f1010000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0xf1010000 0 0x1000>,
+			      <0x0 0xf1020000 0 0x20000>,
+			      <0x0 0xf1040000 0 0x20000>,
+			      <0x0 0xf1060000 0 0x20000>;
+			interrupts = <GIC_PPI 9
+					(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+			clocks = <&cpg CPG_MOD 408>;
+			clock-names = "clk";
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 408>;
+		};
+
+		pciec0: pcie@fe000000 {
+			reg = <0 0xfe000000 0 0x80000>;
+			/* placeholder */
+		};
+
+		pciec1: pcie@ee800000 {
+			reg = <0 0xee800000 0 0x80000>;
+			/* placeholder */
+		};
+
+		csi20: csi2@fea80000 {
+			reg = <0 0xfea80000 0 0x10000>;
+			/* placeholder */
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+				};
+			};
+		};
+
+		csi40: csi2@feaa0000 {
+			reg = <0 0xfeaa0000 0 0x10000>;
+			/* placeholder */
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					reg = <1>;
+				};
+			};
+		};
+
+		hdmi0: hdmi@fead0000 {
+			reg = <0 0xfead0000 0 0x10000>;
+			/* placeholder */
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+				};
+				port@1 {
+					reg = <1>;
+				};
+				port@2 {
+					/* HDMI sound */
+					reg = <2>;
+				};
+			};
+		};
+
+		du: display@feb00000 {
+			reg = <0 0xfeb00000 0 0x70000>;
+			/* placeholder */
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+				port@1 {
+					reg = <1>;
+					du_out_hdmi0: endpoint {
+					};
+				};
+				port@2 {
+					reg = <2>;
+					du_out_lvds0: endpoint {
+					};
+				};
+			};
+		};
+
+		prr: chipid@fff00044 {
+			compatible = "renesas,prr";
+			reg = <0 0xfff00044 0 4>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	/* External USB clocks - can be overridden by the board */
+	usb3s0_clk: usb3s0 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	usb_extal_clk: usb_extal {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+};
-- 
2.17.1

[PATCH/RFC 17/19] arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+

[Geert Uytterhoeven]

Add initial support for the Renesas Salvator-X 2nd version development
board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM.

The memory map is as follows:
  - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff
		      0x000480000000 -> 0x004ffffffff
  - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff

Based on a patch in the BSP by Takeshi Kihara
<takeshi.kihara.df@renesas.com>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/Makefile          |  1 +
 .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 3a6a0fb5b482a2dc..e0a829c139ee133f 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-h3ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
+dtb-$(CONFIG_ARCH_R8A77961) += r8a77961-salvator-xs.dtb
 dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb
 dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-m3nulcb.dtb
 dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-m3nulcb-kf.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
new file mode 100644
index 0000000000000000..4abd78ac1cd597d9
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Salvator-X 2nd version board with R-Car M3-W+
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a77961.dtsi"
+#include "salvator-xs.dtsi"
+
+/ {
+	model = "Renesas Salvator-X 2nd version board based on r8a77961";
+	compatible = "renesas,salvator-xs", "renesas,r8a77961";
+
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x78000000>;
+	};
+
+	memory@400000000 {
+		device_type = "memory";
+		reg = <0x4 0x80000000 0x0 0x80000000>;
+	};
+
+	memory@600000000 {
+		device_type = "memory";
+		reg = <0x6 0x00000000 0x1 0x00000000>;
+	};
+};
-- 
2.17.1

[PATCH/RFC 18/19] arm64: defconfig: Enable R8A77961 SoC

[Geert Uytterhoeven]

Enable the Renesas R-Car M3-W+ (R8A77961) SoC in the ARM64 defconfig.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 3614eed8abfd499f..f34d06f11d95eab7 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -745,6 +745,7 @@ CONFIG_ARCH_R8A774B1=y
 CONFIG_ARCH_R8A774C0=y
 CONFIG_ARCH_R8A7795=y
 CONFIG_ARCH_R8A7796=y
+CONFIG_ARCH_R8A77961=y
 CONFIG_ARCH_R8A77965=y
 CONFIG_ARCH_R8A77970=y
 CONFIG_ARCH_R8A77980=y
-- 
2.17.1

[PATCH/RFC 19/19] [LOCAL] arm64: renesas_defconfig: Enable R8A77961 SoC

[Geert Uytterhoeven]

Enable the Renesas R-Car M3-W+ (R8A77961) SoC in the ARM64
renesas_defconfig.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Not intended for upstream inclusion.
---
 arch/arm64/configs/renesas_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/renesas_defconfig b/arch/arm64/configs/renesas_defconfig
index ff981485e7bb5b06..bc9a4cb8cc32b8d0 100644
--- a/arch/arm64/configs/renesas_defconfig
+++ b/arch/arm64/configs/renesas_defconfig
@@ -288,6 +288,7 @@ CONFIG_ARCH_R8A774B1=y
 CONFIG_ARCH_R8A774C0=y
 CONFIG_ARCH_R8A7795=y
 CONFIG_ARCH_R8A7796=y
+CONFIG_ARCH_R8A77961=y
 CONFIG_ARCH_R8A77965=y
 CONFIG_ARCH_R8A77970=y
 CONFIG_ARCH_R8A77980=y
-- 
2.17.1

RE: [PATCH/RFC 00/19] arm64: dts: renesas: Initial support for R-Car M3-W+

[Yoshihiro Shimoda]

Hi Geert-san,

Thank you for the patches!

> From: Geert Uytterhoeven, Sent: Monday, October 7, 2019 7:23 PM
> 
> 	Hi all,
> 
> This RFC patch series adds support for the R-Car M3-W+ (R8A77961) SoC
> and the Salvator-XS board with R-Car M3-W+.  This SoC is a derivative of
> R-Car M3-W (R8A77960), and also known as R-Car M3-W ES3.0.
> As this is an RFC, I'm sending it to a limited audience.
> 
> Based on experience with previous SoCs in the R-Car Gen3 family, the
> following design decisions were made:
>   - Use different compatible values (r8a77961-based),
>   - Use different clock and SYSC DT binding definitions
>     (R8A77961-based), but the same numerical values, to allow sharing
>     drivers,
>   - Share the pin control driver,
>   - Share the clock driver,
>   - Share the system controller driver.
> 
> While the DT ABI is stable (hence we cannot s/r8a7796/r8a77960/ in DTS),
> kernel source code and kernel config symbols can be changed at any
> time.  As changing kernel config symbols impacts the user, they weren't
> renamed yet.
> 
> Questions:
>   - What's the board part number of Salvator-XS with R-Car M3-W+?

RTP0RC7796SIPB0012SA5A.

>   - Should r8a77961_pinmux_info (and the rename of r8a7796_pinmux_info
>     to r8a77960_pinmux_info) be dropped? I added it because
>     r8a7796_pinmux_info.name contains "r8a77960_pfc".
> 
>   - Should the CLK_R8A77961 and PINCTRL_PFC_R8A77961 symbols be dropped?
>     The clock and pin control drivers are the same or almost the same,
>     so the code increase by always enabling both is minimal.
> 
>   - Should the R8A77961 config symbols be dropped?
>       - CONFIG_ARCH_R8A77961
>       - CONFIG_CLK_R8A77961
>       - CONFIG_PINCTRL_PFC_R8A77961
>       - CONFIG_SYSC_R8A77961

I think the current implementations are OK.

>   - If not, should the R8A7796 config symbols be renamed?
>       - CONFIG_ARCH_R8A7796 to CONFIG_ARCH_R8A77960?
>       - CONFIG_CLK_R8A7796 to CONFIG_CLK_R8A77960?
>       - CONFIG_PINCTRL_PFC_R8A7796 to CONFIG_PINCTRL_PFC_R8A77960?
>       - CONFIG_SYSC_R8A7796 to CONFIG_SYSC_R8A77960?
>     Due to dependencies on CONFIG_ARCH_R8A7796, this should be a single
>     commit.

I think so.

> Related questions for old R-Car H3 ES1.x support:
>   - Should CONFIG_PINCTRL_PFC_R8A77950 be added, to allow compiling out
>     R-Car H3 ES1.x pin control support?
>     If yes, should CONFIG_PINCTRL_PFC_R8A7795 be renamed to
>     CONFIG_PINCTRL_PFC_R8A77951?

I think the current implementation (CONFIG_PINCTRL_PFC_R8A7795 only) is OK
because the hardware document doesn't mention about R8A77950.

> This patch series is based on renesas-drivers-2019-10-01-v5.4-rc1).  For
> your convenience, it is available in the topic/r8a77961-v1 branch of my
> renesas-drivers git repository at
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.

I reviewed the patch series and seems good to me after updated a few things
(add the board part number and rename R8A7796 to R8A77960). So,

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

And, I tested on the my environment. So,

Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

Re: [PATCH/RFC 17/19] arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+

[Eugeniu Rosca]

Hi Geert,

Thanks for the series. One question below.

On Mon, Oct 07, 2019 at 12:23:30PM +0200, Geert Uytterhoeven wrote:
> Add initial support for the Renesas Salvator-X 2nd version development
> board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM.
> 
> The memory map is as follows:
>   - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff
> 		      0x000480000000 -> 0x004ffffffff
>   - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff
> 
> Based on a patch in the BSP by Takeshi Kihara
> <takeshi.kihara.df@renesas.com>.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  arch/arm64/boot/dts/renesas/Makefile          |  1 +
>  .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++
>  2 files changed, 32 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts

It is common practice in Renesas BSP to specify the SiP memory
split by suffixing the DTB names with '-{2,4}x{2,4}g' [1].

Has this ever been discussed on ML?

Here in particular, it would allow M3-W+ 2x4GiB Salvator-XS and
M3-W+ 2x2GiB (or any other DRAM split flavor of) Salvator-XS to
coexist in harmony, if the latter pops up at any point.

[1] (rcar-3.9.6) ls -1 arch/arm64/boot/dts/renesas/*dtb  | grep 'g.dtb'
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-4x2g.dtb
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs-2x2g.dtb
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs-4x2g.dtb
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dtb

-- 
Best Regards,
Eugeniu

Re: [PATCH/RFC 03/19] dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support

[Eugeniu Rosca]

On Mon, Oct 07, 2019 at 12:23:16PM +0200, Geert Uytterhoeven wrote:
> Add DT binding documentation for the Clock Pulse Generator / Module
> Standby and Software Reset block in the Renesas R-Car M3-W+ (R8A77961)
> SoC.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../devicetree/bindings/clock/renesas,cpg-mssr.txt       | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> index b5edebeb12b40638..b9b0927b7c780699 100644
> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt

[..]

> @@ -42,10 +43,10 @@ Required Properties:
>    - clock-names: List of external parent clock names. Valid names are:
>        - "extal" (r7s9210, r8a7743, r8a7744, r8a7745, r8a77470, r8a774a1,
>  		 r8a774b1, r8a774c0, r8a7790, r8a7791, r8a7792, r8a7793,
> -		 r8a7794, r8a7795, r8a7796, r8a77965, r8a77970, r8a77980,
> -		 r8a77990, r8a77995)
> -      - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a7796, r8a77965, r8a77970,
> -		  r8a77980)
> +		 r8a7794, r8a7795, r8a7796, r8a77961, r8a77965, r8a77970,
> +		 r8a77980, r8a77990, r8a77995)
> +      - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a7796, r8a77961, r8a77965,
> +		  r8a77970, r8a77980)
>        - "usb_extal" (r8a7743, r8a7744, r8a7745, r8a77470, r8a7790, r8a7791,
>  		     r8a7793, r8a7794)

Not easy to review, but 'git show --color-words' comes to the rescue :)

-- 
Best Regards,
Eugeniu

Re: [PATCH/RFC 00/19] arm64: dts: renesas: Initial support for R-Car M3-W+

[Eugeniu Rosca]

Hi Geert,

On Mon, Oct 07, 2019 at 12:23:13PM +0200, Geert Uytterhoeven wrote:
> 	Hi all,
> 
> This RFC patch series adds support for the R-Car M3-W+ (R8A77961) SoC
> and the Salvator-XS board with R-Car M3-W+.  This SoC is a derivative of
> R-Car M3-W (R8A77960), and also known as R-Car M3-W ES3.0.
> As this is an RFC, I'm sending it to a limited audience.
> 
> Based on experience with previous SoCs in the R-Car Gen3 family, the
> following design decisions were made:
>   - Use different compatible values (r8a77961-based),

Given that a potentially incomplete list of M3-W compatible strings
counts 40 occurrences [1] and this series adds only 7 [2], current RFC
looks like the first step in a multi-phase approach. Do you plan to add
the missing r8a77961 compatibles in the next revision or do you expect
other people to contribute those later?

>   - Use different clock and SYSC DT binding definitions
>     (R8A77961-based), but the same numerical values, to allow sharing
>     drivers,
>   - Share the pin control driver,
>   - Share the clock driver,
>   - Share the system controller driver.
> 
> While the DT ABI is stable (hence we cannot s/r8a7796/r8a77960/ in DTS),
> kernel source code and kernel config symbols can be changed at any
> time.  As changing kernel config symbols impacts the user, they weren't
> renamed yet.
> 
> Questions:
>   - What's the board part number of Salvator-XS with R-Car M3-W+?

I guess my board is an exception, since it got the SiP simply upgraded
from SoC ES1.x to ES3.0 by resoldering. IOW the board carries the same
serial number as M3-ES1.1 Salvator-XS.

[..]

>   - Should the R8A77961 config symbols be dropped?
>       - CONFIG_ARCH_R8A77961
>       - CONFIG_CLK_R8A77961
>       - CONFIG_PINCTRL_PFC_R8A77961
>       - CONFIG_SYSC_R8A77961
> 
>   - If not, should the R8A7796 config symbols be renamed?
>       - CONFIG_ARCH_R8A7796 to CONFIG_ARCH_R8A77960?
>       - CONFIG_CLK_R8A7796 to CONFIG_CLK_R8A77960?
>       - CONFIG_PINCTRL_PFC_R8A7796 to CONFIG_PINCTRL_PFC_R8A77960?
>       - CONFIG_SYSC_R8A7796 to CONFIG_SYSC_R8A77960?
>     Due to dependencies on CONFIG_ARCH_R8A7796, this should be a single
>     commit.

[2 cents] Both adding CONFIG_*_R8A77961 and renaming CONFIG_*_R8A7796 to
CONFIG_*_R8A77960 make sense to me.

> Related questions for old R-Car H3 ES1.x support:
>   - Should CONFIG_PINCTRL_PFC_R8A77950 be added, to allow compiling out
>     R-Car H3 ES1.x pin control support?

[2 cents] Adding CONFIG_*_R8A77950 makes sense in spite of the fact that
R8A77950 is not documented in R-Car HW man. In fact, it is quite clear
why R8A77950 is _not_ documented while R8A77960 _is_ documented. The
former is obsolete (the community is nice by not obliterating its
support) while the latter is expected to hit the market.

>     If yes, should CONFIG_PINCTRL_PFC_R8A7795 be renamed to
>     CONFIG_PINCTRL_PFC_R8A77951?

In a perfect/ideal world, I would say yes.

> This patch series is based on renesas-drivers-2019-10-01-v5.4-rc1).  For
> your convenience, it is available in the topic/r8a77961-v1 branch of my
> renesas-drivers git repository at
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
> 
> This has been tested using remote access.
> 
> Thanks for your comments!

Thanks for the bring-up!

[..]

[1] linux (geert-renesas-drivers/topic/r8a77961-v1) \
git grep -o "\"renesas[^\ ]*r8a7796\b[^\"]*\"" | cut -f2 -d: | sort -u
"renesas,can-r8a7796"
"renesas,dmac-r8a7796"
"renesas,du-r8a7796"
"renesas,etheravb-r8a7796"
"renesas,gpio-r8a7796"
"renesas,hscif-r8a7796"
"renesas,i2c-r8a7796"
"renesas,iic-r8a7796"
"renesas,intc-ex-r8a7796"
"renesas,ipmmu-r8a7796"
"renesas,msiof-r8a7796"
"renesas,pcie-r8a7796"
"renesas,pfc-r8a7796"
"renesas,pwm-r8a7796"
"renesas,r8a7796"
"renesas,r8a7796-canfd"
"renesas,r8a7796-cmt0"
"renesas,r8a7796-cmt1"
"renesas,r8a7796-cpg-mssr"
"renesas,r8a7796-csi2"
"renesas,r8a7796-drif"
"renesas,r8a7796-hdmi"
"renesas,r8a7796-imr-lx4"
"renesas,r8a7796-lvds"
"renesas,r8a7796-rcar-usb2-clock-sel"
"renesas,r8a7796-rst"
"renesas,r8a7796-sysc"
"renesas,r8a7796-thermal"
"renesas,r8a7796-usb3-peri"
"renesas,r8a7796-usb3-phy"
"renesas,r8a7796-usb-dmac"
"renesas,r8a7796-wdt"
"renesas,rcar_sound-r8a7796"
"renesas,scif-r8a7796"
"renesas,sdhi-r8a7796"
"renesas,tpu-r8a7796"
"renesas,usb2-phy-r8a7796"
"renesas,usbhs-r8a7796"
"renesas,vin-r8a7796"
"renesas,xhci-r8a7796"

[2] linux (geert-renesas-drivers/topic/r8a77961-v1) \
git grep -o "\"renesas[^\ ]*r8a77961\b[^\"]*\"" | cut -f2 -d: | sort -u
"renesas,hscif-r8a77961"
"renesas,pfc-r8a77961"
"renesas,r8a77961"
"renesas,r8a77961-cpg-mssr"
"renesas,r8a77961-rst"
"renesas,r8a77961-sysc"
"renesas,scif-r8a77961"

-- 
Best Regards,
Eugeniu

Re: [PATCH/RFC 03/19] dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support

[Geert Uytterhoeven]

Hi Eugeniu,

On Mon, Oct 14, 2019 at 8:46 PM Eugeniu Rosca <erosca@de.adit-jv.com> wrote:
> On Mon, Oct 07, 2019 at 12:23:16PM +0200, Geert Uytterhoeven wrote:
> > Add DT binding documentation for the Clock Pulse Generator / Module
> > Standby and Software Reset block in the Renesas R-Car M3-W+ (R8A77961)
> > SoC.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> >  .../devicetree/bindings/clock/renesas,cpg-mssr.txt       | 9 +++++----
> >  1 file changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> > index b5edebeb12b40638..b9b0927b7c780699 100644
> > --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> > +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
>
> [..]
>
> > @@ -42,10 +43,10 @@ Required Properties:
> >    - clock-names: List of external parent clock names. Valid names are:
> >        - "extal" (r7s9210, r8a7743, r8a7744, r8a7745, r8a77470, r8a774a1,
> >                r8a774b1, r8a774c0, r8a7790, r8a7791, r8a7792, r8a7793,
> > -              r8a7794, r8a7795, r8a7796, r8a77965, r8a77970, r8a77980,
> > -              r8a77990, r8a77995)
> > -      - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a7796, r8a77965, r8a77970,
> > -               r8a77980)
> > +              r8a7794, r8a7795, r8a7796, r8a77961, r8a77965, r8a77970,
> > +              r8a77980, r8a77990, r8a77995)
> > +      - "extalr" (r8a774a1, r8a774b1, r8a7795, r8a7796, r8a77961, r8a77965,
> > +               r8a77970, r8a77980)
> >        - "usb_extal" (r8a7743, r8a7744, r8a7745, r8a77470, r8a7790, r8a7791,
> >                    r8a7793, r8a7794)
>
> Not easy to review, but 'git show --color-words' comes to the rescue :)

Exactly ;-)

$ git help wshow
'wshow' is aliased to 'show --color-words'
$ git help wlog
'wlog' is aliased to 'log --color-words'

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 00/19] arm64: dts: renesas: Initial support for R-Car M3-W+

[Geert Uytterhoeven]

Hi Eugeniu,

On Mon, Oct 14, 2019 at 9:58 PM Eugeniu Rosca <erosca@de.adit-jv.com> wrote:
> On Mon, Oct 07, 2019 at 12:23:13PM +0200, Geert Uytterhoeven wrote:
> > This RFC patch series adds support for the R-Car M3-W+ (R8A77961) SoC
> > and the Salvator-XS board with R-Car M3-W+.  This SoC is a derivative of
> > R-Car M3-W (R8A77960), and also known as R-Car M3-W ES3.0.
> > As this is an RFC, I'm sending it to a limited audience.
> >
> > Based on experience with previous SoCs in the R-Car Gen3 family, the
> > following design decisions were made:
> >   - Use different compatible values (r8a77961-based),
>
> Given that a potentially incomplete list of M3-W compatible strings
> counts 40 occurrences [1] and this series adds only 7 [2], current RFC
> looks like the first step in a multi-phase approach. Do you plan to add
> the missing r8a77961 compatibles in the next revision or do you expect
> other people to contribute those later?

This is indeed a multi-phase approach.
I plan to add more later, and welcome other people in our team to do so, too.
However, as we currently have limited (remote) access, we cannot
add/test all other devices.
So if you have hardware access, any help is welcome.

> >   - Use different clock and SYSC DT binding definitions
> >     (R8A77961-based), but the same numerical values, to allow sharing
> >     drivers,
> >   - Share the pin control driver,
> >   - Share the clock driver,
> >   - Share the system controller driver.
> >
> > While the DT ABI is stable (hence we cannot s/r8a7796/r8a77960/ in DTS),
> > kernel source code and kernel config symbols can be changed at any
> > time.  As changing kernel config symbols impacts the user, they weren't
> > renamed yet.
> >
> > Questions:
> >   - What's the board part number of Salvator-XS with R-Car M3-W+?
>
> I guess my board is an exception, since it got the SiP simply upgraded
> from SoC ES1.x to ES3.0 by resoldering. IOW the board carries the same
> serial number as M3-ES1.1 Salvator-XS.

Yes, AFAIK, all Salvator-X and Salvator-XS boards have the same PCB
(modulo minor revision updates), and support all of H3/M3-W/M3-N SiPs
(except for H3 ES1.x, which is not supported by the -XS variant).
So upgraded boards retain their original part number.

> >   - Should the R8A77961 config symbols be dropped?
> >       - CONFIG_ARCH_R8A77961
> >       - CONFIG_CLK_R8A77961
> >       - CONFIG_PINCTRL_PFC_R8A77961
> >       - CONFIG_SYSC_R8A77961
> >
> >   - If not, should the R8A7796 config symbols be renamed?
> >       - CONFIG_ARCH_R8A7796 to CONFIG_ARCH_R8A77960?
> >       - CONFIG_CLK_R8A7796 to CONFIG_CLK_R8A77960?
> >       - CONFIG_PINCTRL_PFC_R8A7796 to CONFIG_PINCTRL_PFC_R8A77960?
> >       - CONFIG_SYSC_R8A7796 to CONFIG_SYSC_R8A77960?
> >     Due to dependencies on CONFIG_ARCH_R8A7796, this should be a single
> >     commit.
>
> [2 cents] Both adding CONFIG_*_R8A77961 and renaming CONFIG_*_R8A7796 to
> CONFIG_*_R8A77960 make sense to me.
>
> > Related questions for old R-Car H3 ES1.x support:
> >   - Should CONFIG_PINCTRL_PFC_R8A77950 be added, to allow compiling out
> >     R-Car H3 ES1.x pin control support?
>
> [2 cents] Adding CONFIG_*_R8A77950 makes sense in spite of the fact that
> R8A77950 is not documented in R-Car HW man. In fact, it is quite clear
> why R8A77950 is _not_ documented while R8A77960 _is_ documented. The
> former is obsolete (the community is nice by not obliterating its
> support) while the latter is expected to hit the market.
>
> >     If yes, should CONFIG_PINCTRL_PFC_R8A7795 be renamed to
> >     CONFIG_PINCTRL_PFC_R8A77951?
>
> In a perfect/ideal world, I would say yes.

Thanks for your feedback!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 17/19] arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+

[Geert Uytterhoeven]

Hi Eugeniu,

On Mon, Oct 14, 2019 at 7:57 PM Eugeniu Rosca <erosca@de.adit-jv.com> wrote:
> On Mon, Oct 07, 2019 at 12:23:30PM +0200, Geert Uytterhoeven wrote:
> > Add initial support for the Renesas Salvator-X 2nd version development
> > board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM.
> >
> > The memory map is as follows:
> >   - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff
> >                     0x000480000000 -> 0x004ffffffff
> >   - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff
> >
> > Based on a patch in the BSP by Takeshi Kihara
> > <takeshi.kihara.df@renesas.com>.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> >  arch/arm64/boot/dts/renesas/Makefile          |  1 +
> >  .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++
> >  2 files changed, 32 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
>
> It is common practice in Renesas BSP to specify the SiP memory
> split by suffixing the DTB names with '-{2,4}x{2,4}g' [1].
>
> Has this ever been discussed on ML?
>
> Here in particular, it would allow M3-W+ 2x4GiB Salvator-XS and
> M3-W+ 2x2GiB (or any other DRAM split flavor of) Salvator-XS to
> coexist in harmony, if the latter pops up at any point.

With mainline U-Boot, the memory configuration is passed from ATF
through U-Boot to Linux, see e.g. "ARM: renesas: Configure DRAM size
from ATF DT fragment" [1], so there's no longer a need to maintain
multiple DTS files.

[1] https://gitlab.denx.de/u-boot/u-boot/commit/175f5027345c7feaa41e8f4201778814bf72fe37

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 17/19] arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+

[Eugeniu Rosca]

Hi Geert,

On Wed, Oct 16, 2019 at 10:54:12AM +0200, Geert Uytterhoeven wrote:
> Hi Eugeniu,
> 
> On Mon, Oct 14, 2019 at 7:57 PM Eugeniu Rosca <erosca@de.adit-jv.com> wrote:
> > On Mon, Oct 07, 2019 at 12:23:30PM +0200, Geert Uytterhoeven wrote:
> > > Add initial support for the Renesas Salvator-X 2nd version development
> > > board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM.
> > >
> > > The memory map is as follows:
> > >   - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff
> > >                     0x000480000000 -> 0x004ffffffff
> > >   - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff
> > >
> > > Based on a patch in the BSP by Takeshi Kihara
> > > <takeshi.kihara.df@renesas.com>.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > ---
> > >  arch/arm64/boot/dts/renesas/Makefile          |  1 +
> > >  .../boot/dts/renesas/r8a77961-salvator-xs.dts | 31 +++++++++++++++++++
> > >  2 files changed, 32 insertions(+)
> > >  create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
> >
> > It is common practice in Renesas BSP to specify the SiP memory
> > split by suffixing the DTB names with '-{2,4}x{2,4}g' [1].
> >
> > Has this ever been discussed on ML?
> >
> > Here in particular, it would allow M3-W+ 2x4GiB Salvator-XS and
> > M3-W+ 2x2GiB (or any other DRAM split flavor of) Salvator-XS to
> > coexist in harmony, if the latter pops up at any point.
> 
> With mainline U-Boot, the memory configuration is passed from ATF
> through U-Boot to Linux, see e.g. "ARM: renesas: Configure DRAM size
> from ATF DT fragment" [1], so there's no longer a need to maintain
> multiple DTS files.

With CONFIG_ARCH_FIXUP_FDT_MEMORY being disabled on most, if not all,
R-Car3 targets in u-boot master [2], it's unlikely we'll get any DRAM
information passed via DT from U-Boot to Linux.

I notice that Marek (CC) has just submitted a patch to re-enable [3]
the U-Boot feature. Does this mean the community is fine with the idea
that adjusting the Linux DT memory entries (e.g. for debugging and
other purposes) will become a NOOP and will require users to reflash
their bootloaders?

> [1] https://gitlab.denx.de/u-boot/u-boot/commit/175f5027345c7feaa41e8f4201778814bf72fe37
[2] u-boot (6891152a4596) git grep FIXUP_FDT -- configs/r8a779*
configs/r8a7795_salvator-x_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a7795_ulcb_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a77965_salvator-x_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a77965_ulcb_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a7796_salvator-x_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a7796_ulcb_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a77970_eagle_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a77990_ebisu_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
configs/r8a77995_draak_defconfig:# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
[3] https://patchwork.ozlabs.org/patch/1177387/
    ("ARM: rmobile: Enable CONFIG_ARCH_FIXUP_FDT_MEMORY on Gen3")

-- 
Best Regards,
Eugeniu