From: Andreas Schwab <schwab@suse.de>
To: Christoph Hellwig <hch@infradead.org>
Cc: mark.rutland@arm.com, linux-pwm@vger.kernel.org,
linux-gpio@vger.kernel.org, linus.walleij@linaro.org,
palmer@sifive.com, linux-kernel@vger.kernel.org,
Atish Patra <atish.patra@wdc.com>,
devicetree@vger.kernel.org, robh+dt@kernel.org,
thierry.reding@gmail.com, linux-riscv@lists.infradead.org
Subject: Re: [RFC 4/4] gpio: sifive: Add GPIO driver for SiFive SoCs
Date: Wed, 10 Oct 2018 15:28:50 +0200 [thread overview]
Message-ID: <mvmk1mq2anh.fsf@suse.de> (raw)
Message-ID: <20181010132850.Hlo3oHzWjYVCJxZa90VcYQ6uvIaTn0unLi_HuxRhevM@z> (raw)
In-Reply-To: <20181010131255.GB29142@infradead.org> (Christoph Hellwig's message of "Wed, 10 Oct 2018 06:12:55 -0700")
On Okt 10 2018, Christoph Hellwig <hch@infradead.org> wrote:
> On Wed, Oct 10, 2018 at 03:01:29PM +0200, Andreas Schwab wrote:
>> On Okt 09 2018, Atish Patra <atish.patra@wdc.com> wrote:
>>
>> > +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
>> > +{
>> > + unsigned long flags;
>> > + unsigned int trigger;
>> > +
>> > + raw_spin_lock_irqsave(&chip->lock, flags);
>> > + trigger = (chip->enabled & BIT(offset)) ? chip->trigger[offset] : 0;
>>
>> This should use test_bit instead.
>
> Given that this apparently needs the spinlock for atomciy with more than
> just the bitmap test_bit would be rather pointless.
BIT and test_bit/assign_bit are not compatible.
Andreas.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
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next prev parent reply other threads:[~2018-10-10 13:29 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-09 18:51 [RFC 0/4] GPIO & PWM support for HiFive Unleashed Atish Patra
2018-10-09 18:51 ` Atish Patra
2018-10-09 18:51 ` [RFC 1/4] pwm: sifive: Add DT documentation for SiFive PWM Controller Atish Patra
2018-10-09 18:51 ` Atish Patra
2018-10-10 13:49 ` Thierry Reding
2018-10-10 13:49 ` Thierry Reding
2018-10-15 22:57 ` Atish Patra
2018-10-15 22:57 ` Atish Patra
2018-10-15 23:19 ` Wesley Terpstra
2018-10-15 23:19 ` Wesley Terpstra
2018-10-16 11:13 ` Thierry Reding
2018-10-16 11:13 ` Thierry Reding
2018-10-16 11:01 ` Thierry Reding
2018-10-16 11:01 ` Thierry Reding
2018-10-16 17:31 ` Paul Walmsley
2018-10-16 17:31 ` Paul Walmsley
2018-10-16 22:04 ` Thierry Reding
2018-10-16 22:04 ` Thierry Reding
2018-10-16 22:20 ` Atish Patra
2018-10-16 22:20 ` Atish Patra
2018-10-17 15:58 ` Rob Herring
2018-10-17 15:58 ` Rob Herring
2018-10-17 21:45 ` Atish Patra
2018-10-17 21:45 ` Atish Patra
2018-11-10 5:38 ` Paul Walmsley
2018-11-10 5:38 ` Paul Walmsley
2018-10-10 13:51 ` Thierry Reding
2018-10-10 13:51 ` Thierry Reding
2018-10-15 22:45 ` Atish Patra
2018-10-15 22:45 ` Atish Patra
2018-10-16 10:51 ` Thierry Reding
2018-10-16 10:51 ` Thierry Reding
2018-10-16 22:42 ` Atish Patra
2018-10-16 22:42 ` Atish Patra
2018-10-09 18:51 ` [RFC 2/4] pwm: sifive: Add a driver for SiFive SoC PWM Atish Patra
2018-10-09 18:51 ` Atish Patra
2018-10-10 13:11 ` Christoph Hellwig
2018-10-10 13:11 ` Christoph Hellwig
2018-10-10 13:44 ` Thierry Reding
2018-10-10 13:44 ` Thierry Reding
2018-10-16 6:28 ` Atish Patra
2018-10-16 6:28 ` Atish Patra
2018-10-10 14:13 ` Thierry Reding
2018-10-10 14:13 ` Thierry Reding
2018-10-16 6:24 ` Atish Patra
2018-10-16 6:24 ` Atish Patra
2018-10-09 18:51 ` [RFC 3/4] gpio: sifive: Add DT documentation for SiFive GPIO Atish Patra
2018-10-09 18:51 ` Atish Patra
2018-10-09 18:51 ` [RFC 4/4] gpio: sifive: Add GPIO driver for SiFive SoCs Atish Patra
2018-10-09 18:51 ` Atish Patra
2018-10-10 12:35 ` Linus Walleij
2018-10-10 12:35 ` Linus Walleij
2018-10-17 1:01 ` Atish Patra
2018-10-17 1:01 ` Atish Patra
2019-09-18 7:32 ` Bin Meng
2018-10-10 13:01 ` Andreas Schwab
2018-10-10 13:01 ` Andreas Schwab
2018-10-10 13:12 ` Christoph Hellwig
2018-10-10 13:12 ` Christoph Hellwig
2018-10-10 13:28 ` Andreas Schwab [this message]
2018-10-10 13:28 ` Andreas Schwab
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