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From: Atish Patra <Atish.Patra@wdc.com>
To: "robh+dt@kernel.org" <robh+dt@kernel.org>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
	"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
	"tiny.windzz@gmail.com" <tiny.windzz@gmail.com>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"palmer@sifive.com" <palmer@sifive.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"johan@kernel.org" <johan@kernel.org>,
	Anup Patel <Anup.Patel@wdc.com>,
	"gary@garyguo.net" <gary@garyguo.net>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"info@metux.net" <info@metux.net>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"allison@lohutok.net" <allison@lohutok.net>
Subject: Re: [PATCH v3 5/5] dt-bindings: Update the riscv,isa string description
Date: Thu, 1 Aug 2019 23:07:36 +0000	[thread overview]
Message-ID: <40ec671a2ef7204ad890b2ca43ec92d6981d6344.camel@wdc.com> (raw)
In-Reply-To: <CAL_JsqLqxN1+fvrdD24Ho6s7gB+pGy-0sZaL-jJqkYZ2yC4JEA@mail.gmail.com>

On Thu, 2019-08-01 at 09:50 -0600, Rob Herring wrote:
> On Wed, Jul 31, 2019 at 6:58 PM Atish Patra <atish.patra@wdc.com>
> wrote:
> > Since the RISC-V specification states that ISA description strings
> > are
> > case-insensitive, there's no functional difference between mixed-
> > case,
> > upper-case, and lower-case ISA strings. Thus, to simplify parsing,
> > specify that the letters present in "riscv,isa" must be all
> > lowercase.
> > 
> > Suggested-by: Paul Walmsley <paul.walmsley@sifive.com>
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > ---
> >  Documentation/devicetree/bindings/riscv/cpus.yaml | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml
> > b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > index c899111aa5e3..4f0acb00185a 100644
> > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > @@ -46,10 +46,12 @@ properties:
> >            - rv64imafdc
> >      description:
> >        Identifies the specific RISC-V instruction set architecture
> > -      supported by the hart.  These are documented in the RISC-V
> > +      supported by the hart. These are documented in the RISC-V
> >        User-Level ISA document, available from
> >        https://riscv.org/specifications/
> > 
> > +      Letters in the riscv,isa string must be all lowercase.
> > +
> 
> The schemas are case sensitive this looks pretty pointless without
> the
> context of the commit msg. Can you prefix with 'While the
> specification is case insensitive, "
> 

Sure. How about this ?

"While the above isa strings in ISA specification are case insensitive,
letters in the riscv,isa string must be all lowercase to simplify
parsing."


> For some background, FDT generally always has been case sensitive too
> (dtc won't merge/override nodes/properties with differing case). It's
> really only some older true OF systems that were case insensitive.
> The
> kernel had a mixture of case sensitive and insensitive comparisons
> somewhat depending on the arch and whether of_prop_cmp/of_node_cmp or
> str*cmp functions were used. There's been a lot of clean-up and now
> most comparisons are case sensitive with only Sparc having some
> deviation.
> 
> Rob

-- 
Regards,
Atish
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      reply	other threads:[~2019-08-01 23:07 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-01  0:58 [PATCH v3 0/5] Miscellaneous fixes Atish Patra
2019-08-01  0:58 ` [PATCH v3 1/5] RISC-V: Remove per cpu clocksource Atish Patra
2019-08-01  0:58 ` [PATCH v3 2/5] RISC-V: Add riscv_isa reprensenting ISA features common across CPUs Atish Patra
2019-08-01  0:58 ` [PATCH v3 3/5] RISC-V: Fix unsupported isa string info Atish Patra
2019-08-06 23:27   ` Paul Walmsley
2019-08-07  1:13     ` Atish Patra
2019-08-07  1:26       ` Paul Walmsley
2019-08-07 15:37         ` Palmer Dabbelt
2019-08-07 17:31         ` Atish Patra
2019-08-07 17:42           ` Palmer Dabbelt
2019-08-01  0:58 ` [PATCH v3 4/5] RISC-V: Export few kernel symbols Atish Patra
2019-08-01 15:56   ` Christoph Hellwig
2019-08-01 23:04     ` Atish Patra
2019-08-01  0:58 ` [PATCH v3 5/5] dt-bindings: Update the riscv,isa string description Atish Patra
2019-08-01 15:50   ` [PATCH v3 5/5] dt-bindings: Update the riscv, isa " Rob Herring
2019-08-01 23:07     ` Atish Patra [this message]

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