From: "Björn Töpel" <bjorn@kernel.org>
To: guoren@kernel.org, arnd@arndb.de, guoren@kernel.org,
palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org,
luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de,
jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org,
chenhuacai@kernel.org, apatel@ventanamicro.com,
atishp@atishpatra.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, mark.rutland@arm.com,
zouyipeng@huawei.com, bigeasy@linutronix.de,
David.Laight@aculab.com, chenzhongjin@huawei.com,
greentime.hu@sifive.com, andy.chiu@sifive.com
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH -next V8 06/14] riscv: convert to generic entry
Date: Mon, 05 Dec 2022 11:49:10 +0100 [thread overview]
Message-ID: <874jua9lcp.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <20221103075047.1634923-7-guoren@kernel.org>
guoren@kernel.org writes:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> This patch converts riscv to use the generic entry infrastructure from
> kernel/entry/*. The generic entry makes maintainers' work easier and
> codes more elegant. Here are the changes than before:
>
> - More clear entry.S with handle_exception and ret_from_exception
> - Get rid of complex custom signal implementation
> - More readable syscall procedure
> - Little modification on ret_from_fork & ret_from_kernel_thread
> - Wrap with irqentry_enter/exit and syscall_enter/exit_from_user_mode
> - Use the standard preemption code instead of custom
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Suggested-by: Huacai Chen <chenhuacai@kernel.org>
> Tested-by: Yipeng Zou <zouyipeng@huawei.com>
> ---
[...]
> diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
> index 5d3f2fbeb33c..c86d0eafdf6a 100644
> --- a/arch/riscv/kernel/sys_riscv.c
> +++ b/arch/riscv/kernel/sys_riscv.c
> @@ -5,8 +5,10 @@
> * Copyright (C) 2017 SiFive
> */
>
> +#include <linux/entry-common.h>
> #include <linux/syscalls.h>
> #include <asm/unistd.h>
> +#include <asm/syscall.h>
> #include <asm/cacheflush.h>
> #include <asm-generic/mman-common.h>
>
> @@ -69,3 +71,28 @@ SYSCALL_DEFINE3(riscv_flush_icache, uintptr_t, start, uintptr_t, end,
>
> return 0;
> }
> +
> +typedef long (*syscall_t)(ulong, ulong, ulong, ulong, ulong, ulong, ulong);
> +
> +asmlinkage void do_sys_ecall_u(struct pt_regs *regs)
> +{
> + syscall_t syscall;
> + ulong nr = regs->a7;
> +
> + regs->epc += 4;
> + regs->orig_a0 = regs->a0;
> + regs->a0 = -ENOSYS;
> +
> + nr = syscall_enter_from_user_mode(regs, nr);
> +#ifdef CONFIG_COMPAT
> + if ((regs->status & SR_UXL) == SR_UXL_32)
> + syscall = compat_sys_call_table[nr];
> + else
> +#endif
> + syscall = sys_call_table[nr];
> +
> + if (nr < NR_syscalls)
> + regs->a0 = syscall(regs->orig_a0, regs->a1, regs->a2,
> + regs->a3, regs->a4, regs->a5,
> regs->a6);
Now that we're doing the "pt_regs to call" dance, it would make sense to
introduce a syscall wrapper (like x86 and arm64) for riscv, so that we
don't need to unwrap all regs for all syscalls (See __MAP() in
include/linux/syscalls.h). That would be an optimization, so it could be
done as a follow-up, and not part of the series.
Björn
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next prev parent reply other threads:[~2022-12-05 10:49 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-03 7:50 [PATCH -next V8 00/14] riscv: Add GENERIC_ENTRY support and related features guoren
2022-11-03 7:50 ` [PATCH -next V8 01/14] compiler_types.h: Add __noinstr_section() for noinstr guoren
2022-12-05 9:12 ` Björn Töpel
2022-11-03 7:50 ` [PATCH -next V8 02/14] riscv: elf_kexec: Fixup compile warning guoren
2022-12-05 9:13 ` Björn Töpel
2022-12-06 4:39 ` Guo Ren
2022-11-03 7:50 ` [PATCH -next V8 03/14] riscv: compat_syscall_table: " guoren
2022-12-05 9:13 ` Björn Töpel
2022-11-03 7:50 ` [PATCH -next V8 04/14] riscv: ptrace: Remove duplicate operation guoren
2022-12-05 9:34 ` Björn Töpel
2022-12-06 4:41 ` Guo Ren
2022-11-03 7:50 ` [PATCH -next V8 05/14] riscv: traps: Add noinstr to prevent instrumentation inserted guoren
2022-11-03 7:50 ` [PATCH -next V8 06/14] riscv: convert to generic entry guoren
2022-11-27 16:25 ` Ben Hutchings
2022-11-28 2:42 ` Guo Ren
2022-12-05 10:49 ` Björn Töpel [this message]
2022-12-06 6:39 ` Guo Ren
2022-11-03 7:50 ` [PATCH -next V8 07/14] riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK guoren
2022-11-03 7:50 ` [PATCH -next V8 08/14] riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK guoren
2022-11-03 7:50 ` [PATCH -next V8 09/14] riscv: Add config of thread stack size guoren
2022-11-03 7:50 ` [PATCH -next V8 10/14] riscv: Typo fixup for addi -> andi in comment guoren
2022-12-05 9:18 ` Björn Töpel
2022-11-03 7:50 ` [PATCH -next V8 11/14] riscv: Add support for STACKLEAK gcc plugin guoren
2022-11-03 7:50 ` [PATCH -next V8 12/14] riscv: remove extra level wrappers of trace_hardirqs_{on,off} guoren
2022-11-03 7:50 ` [PATCH -next V8 13/14] riscv: consolidate ret_from_kernel_thread into ret_from_fork guoren
2022-11-03 7:50 ` [PATCH -next V8 14/14] riscv: entry: consolidate general regs saving/restoring guoren
2022-11-23 15:26 ` [PATCH -next V8 00/14] riscv: Add GENERIC_ENTRY support and related features Jisheng Zhang
2022-12-05 9:46 ` Björn Töpel
2022-12-06 6:12 ` Guo Ren
2022-12-06 7:03 ` Björn Töpel
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