linux-riscv.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
 messages from 2019-03-07 01:28:01 to 2019-03-22 17:57:42 UTC [more...]

per-cpu thoughts
 2019-03-22 17:57 UTC  (28+ messages)

[PATCH v5 0/3] locking/rwsem: Rwsem rearchitecture part 0
 2019-03-22 17:41 UTC  (10+ messages)
` [PATCH v5 1/3] locking/rwsem: Remove arch specific rwsem files
` [PATCH v5 2/3] locking/rwsem: Remove rwsem-spinlock.c & use rwsem-xadd.c for all archs
` [PATCH v5 3/3] locking/rwsem: Optimize down_read_trylock()

32bit kernel is broken for Linux-5.1-rc1 due to GCC cmodel=medlow
 2019-03-22 13:45 UTC  (9+ messages)

[PATCH] RISC-V: Fix FIXMAP_TOP to avoid overlap with VMALLOC area
 2019-03-22 13:40 UTC  (3+ messages)

[PATCH] riscv: fix accessing 8-byte variable from RV32
 2019-03-22 13:34 UTC  (2+ messages)

[PATCH v2 0/5] Boot RISC-V kernel from any 4KB aligned address
 2019-03-22 13:33 UTC  (8+ messages)
` [PATCH v2 1/5] RISC-V: Add separate defconfig for 32bit systems
` [PATCH v2 2/5] RISC-V: Make setup_vm() independent of GCC code model
` [PATCH v2 3/5] RISC-V: Allow booting kernel from any 4KB aligned address
` [PATCH v2 4/5] RISC-V: Remove redundant trampoline page table
` [PATCH v2 5/5] RISC-V: Fix memory reservation in setup_bootmem()

[PATCH] irqchip: plic: Fix priority base offset
 2019-03-22 13:27 UTC  (4+ messages)

[PATCH 0/4] Provide generic top-down mmap layout functions
 2019-03-22 13:22 UTC  (7+ messages)
` [PATCH 1/4] arm64, mm: Move generic mmap layout functions to mm
` [PATCH 2/4] arm: Use generic mmap top-down layout
` [PATCH 3/4] mips: "
` [PATCH 4/4] riscv: Make mmap allocation top-down by default

[PATCH 0/2] EDAC Support for SiFive SoCs
 2019-03-22  6:00 UTC  (5+ messages)
` [PATCH 1/2] edac: sifive: Add DT documentation for SiFive EDAC driver and subcomponent
` [PATCH 2/2] edac: sifive: Add EDAC driver for SiFive FU540-C000 chip

[PATCH v5 05/19] riscv: mm: Add p?d_large() definitions
 2019-03-21 14:19 UTC 

[PATCH v4 1/2] sh: mm: make use of new memblocks_present() helper
 2019-03-21  8:37 UTC  (5+ messages)

[PATCH v2 13/13] syscall_get_arch: add "struct task_struct *" argument
 2019-03-21  1:22 UTC  (2+ messages)

[PATCH v3 0/4] TLB/I$ flush cleanups and improvements
 2019-03-20 23:58 UTC  (7+ messages)
` [PATCH v3 3/4] riscv: fix sbi_remote_sfence_vma{,_asid}
` [PATCH v3 1/4] riscv: move flush_icache_{all,mm} to cacheflush.c
` [PATCH v3 4/4] riscv: rewrite tlb flush for performance
` [PATCH v3 2/4] riscv: move switch_mm to its own file

[RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V
 2019-03-20 23:48 UTC  (6+ messages)
` [RFT/RFC PATCH v3 1/5] Documentation: DT: arm: add support for sockets defining package boundaries
` [RFT/RFC PATCH v3 2/5] dt-binding: cpu-topology: Move cpu-map to a common binding
` [RFT/RFC PATCH v3 3/5] cpu-topology: Move cpu topology code to common code
` [RFT/RFC PATCH v3 4/5] arm: Use common cpu_topology
` [RFT/RFC PATCH v3 5/5] RISC-V: Parse cpu topology during boot

[RFT/RFC PATCH v2 0/4] Unify CPU topology across ARM & RISC-V
 2019-03-20  1:22 UTC  (5+ messages)
` [RFT/RFC PATCH v2 1/4] dt-binding: cpu-topology: Move cpu-map to a common binding
` [RFT/RFC PATCH v2 2/4] cpu-topology: Move cpu topology code to common code
` [RFT/RFC PATCH v2 3/4] arm: Use common cpu_topology
` [RFT/RFC PATCH v2 4/4] RISC-V: Parse cpu topology during boot

[v1 PATCH 1/4] RISC-V: Add RISC-V specific arch_match_cpu_phys_id
 2019-03-20  1:29 UTC  (7+ messages)
` [v1 PATCH 2/4] RISC-V: Fix of_get_cpu_node usage
` [v1 PATCH 3/4] RISC-V: Implement nosmp commandline option
` [v1 PATCH 4/4] RISC-V: Support nr_cpus command line option

[PATCH v10 0/2] PWM support for HiFive Unleashed
 2019-03-19  8:09 UTC  (6+ messages)
` [PATCH v10 1/2] pwm: sifive: Add DT documentation for SiFive PWM Controller
` [PATCH v10 2/2] pwm: sifive: Add a driver for SiFive SoC PWM

[PATCH v9 0/2] PWM support for HiFive Unleashed
 2019-03-19  6:26 UTC  (12+ messages)
` [PATCH v9 1/2] pwm: sifive: Add DT documentation for SiFive PWM Controller
` [PATCH v9 2/2] pwm: sifive: Add a driver for SiFive SoC PWM

[PATCH 0/3] Boot RISC-V kernel from any 4KB aligned address
 2019-03-18 16:27 UTC  (17+ messages)
` [PATCH 1/3] RISC-V: Add separate defconfig for 32bit systems
` [PATCH 2/3] RISC-V: Make setup_vm() independent of GCC code model
` [PATCH 3/3] RISC-V: Allow booting kernel from any 4KB aligned address

ssh session with qemu-arm using busybox
 2019-03-12 23:12 UTC  (7+ messages)
        ` [Qemu-devel] "

[PATCH 00/14] entry: preempt_schedule_irq() callers scrub
 2019-03-12 18:18 UTC  (4+ messages)
` [PATCH 09/14] RISC-V: entry: Remove unneeded need_resched() loop

Building and cross-compiling kernel source on Mac OS
 2019-03-12 17:32 UTC 

[PATCH 0/2] L2 Cache EDAC Support for HiFive Unleashed
 2019-03-12 16:32 UTC  (6+ messages)
` [PATCH 1/2] edac: sifive: Add DT documentation for SiFive L2 cache Controller
` [PATCH 2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache Controller

[PATCH v5 0/2] PWM support for HiFive Unleashed
 2019-03-12  7:27 UTC  (6+ messages)
` [PATCH v5 2/2] pwm: sifive: Add a driver for SiFive SoC PWM

[PATCH v8 0/2] PWM support for HiFive Unleashed
 2019-03-12  6:52 UTC  (8+ messages)
` [PATCH v8 2/2] pwm: sifive: Add a driver for SiFive SoC PWM

[PATCH 3/3] riscv: rewrite tlb flush for performance improvement
 2019-03-11 16:28 UTC  (11+ messages)

Debian build polishing
 2019-03-11 16:19 UTC  (11+ messages)
` [PATCH v1 1/5] Makefile: rules for printing kernel architecture and localversion
` [PATCH v1 2/5] scripts: mkdebian: allow renaming generated debian/rules via env
` [PATCH v1 3/5] scripts: mkdebian: fix missing dependencies
` [PATCH v1 4/5] scripts: checkpatch.pl: don't complain that debian/rules is executable
` [PATCH v1 5/5] debian: add generic rule file

[PATCH v2 0/4] Improvements related to TLB and I$ flush
 2019-03-09  8:17 UTC  (7+ messages)
` [PATCH v2 2/4] riscv: move switch_mm to its own file
` [PATCH v2 3/4] riscv: fix sbi_remote_sfence_vma{,_asid}
` [PATCH v2 1/4] riscv: move flush_icache_{all,mm} to cacheflush.c
` [PATCH v2 4/4] riscv: rewrite tlb flush for performance

Fwd: Re: [PATCH 3/3] riscv: rewrite tlb flush for performance improvement
 2019-03-08 16:54 UTC 

[PATCH] riscv: move flush_icache_{all,mm} code to proper location
 2019-03-08 16:28 UTC  (4+ messages)
` [PATCH] riscv: move flush_icache_{all, mm} "

[PATCH] RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)
 2019-03-08 14:53 UTC  (2+ messages)

[PATCH 1/3] riscv: move switch_mm to its own file
 2019-03-08 14:27 UTC  (2+ messages)

[GIT PULL] RISC-V Patches for the 5.1 Merge Window, Part 1
 2019-03-07 21:40 UTC  (2+ messages)

[PATCH 2/3] riscv: fix SBI call of sbi_remote_sfence_vma{,_asid}
 2019-03-07  1:27 UTC 


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).