From: Anup Patel <anup@brainfault.org>
To: Alexander Graf <graf@amazon.com>
Cc: Damien Le Moal <Damien.LeMoal@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Radim K <rkrcmar@redhat.com>, Anup Patel <Anup.Patel@wdc.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v7 11/21] RISC-V: KVM: Handle WFI exits for VCPU
Date: Mon, 23 Sep 2019 18:24:02 +0530 [thread overview]
Message-ID: <CAAhSdy1A-FZJ5DeyzFzZn8h-Vs4QR16uFgeeCNpJi2KMQMbPmQ@mail.gmail.com> (raw)
In-Reply-To: <3c149ec4-38df-9073-2880-b28148d3c059@amazon.com>
On Mon, Sep 23, 2019 at 12:24 PM Alexander Graf <graf@amazon.com> wrote:
>
>
>
> On 04.09.19 18:15, Anup Patel wrote:
> > We get illegal instruction trap whenever Guest/VM executes WFI
> > instruction.
> >
> > This patch handles WFI trap by blocking the trapped VCPU using
> > kvm_vcpu_block() API. The blocked VCPU will be automatically
> > resumed whenever a VCPU interrupt is injected from user-space
> > or from in-kernel IRQCHIP emulation.
> >
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > Acked-by: Paolo Bonzini <pbonzini@redhat.com>
> > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> > ---
> > arch/riscv/kvm/vcpu_exit.c | 72 ++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 72 insertions(+)
> >
> > diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
> > index d75a6c35b6c7..39469f67b241 100644
> > --- a/arch/riscv/kvm/vcpu_exit.c
> > +++ b/arch/riscv/kvm/vcpu_exit.c
> > @@ -12,6 +12,13 @@
> > #include <linux/kvm_host.h>
> > #include <asm/csr.h>
> >
> > +#define INSN_OPCODE_MASK 0x007c
> > +#define INSN_OPCODE_SHIFT 2
> > +#define INSN_OPCODE_SYSTEM 28
> > +
> > +#define INSN_MASK_WFI 0xffffff00
> > +#define INSN_MATCH_WFI 0x10500000
> > +
> > #define INSN_MATCH_LB 0x3
> > #define INSN_MASK_LB 0x707f
> > #define INSN_MATCH_LH 0x1003
> > @@ -112,6 +119,67 @@
> > (s32)(((insn) >> 7) & 0x1f))
> > #define MASK_FUNCT3 0x7000
> >
> > +static int truly_illegal_insn(struct kvm_vcpu *vcpu,
> > + struct kvm_run *run,
> > + ulong insn)
> > +{
> > + /* Redirect trap to Guest VCPU */
> > + kvm_riscv_vcpu_trap_redirect(vcpu, EXC_INST_ILLEGAL, insn);
> > +
> > + return 1;
> > +}
> > +
> > +static int system_opcode_insn(struct kvm_vcpu *vcpu,
> > + struct kvm_run *run,
> > + ulong insn)
> > +{
> > + if ((insn & INSN_MASK_WFI) == INSN_MATCH_WFI) {
> > + vcpu->stat.wfi_exit_stat++;
> > + if (!kvm_arch_vcpu_runnable(vcpu)) {
> > + srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx);
> > + kvm_vcpu_block(vcpu);
> > + vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
> > + kvm_clear_request(KVM_REQ_UNHALT, vcpu);
> > + }
> > + vcpu->arch.guest_context.sepc += INSN_LEN(insn);
> > + return 1;
> > + }
> > +
> > + return truly_illegal_insn(vcpu, run, insn);
> > +}
> > +
> > +static int illegal_inst_fault(struct kvm_vcpu *vcpu, struct kvm_run *run,
> > + unsigned long insn)
> > +{
> > + unsigned long ut_scause = 0;
> > + struct kvm_cpu_context *ct;
> > +
> > + if (unlikely((insn & 3) != 3)) {
>
> What do the low 2 bits mean here? Maybe you can use a define instead?
These bits are for instruction length (16bit or 32bit).
I will add appropriate defines for these bits.
Regards,
Anup
>
>
> Alex
>
>
>
>
> Amazon Development Center Germany GmbH
> Krausenstr. 38
> 10117 Berlin
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> Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
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>
>
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next prev parent reply other threads:[~2019-09-23 12:54 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-04 16:13 [PATCH v7 00/21] KVM RISC-V Support Anup Patel
2019-09-04 16:13 ` [PATCH v7 01/21] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Anup Patel
2019-09-19 12:37 ` Paul Walmsley
2019-09-04 16:13 ` [PATCH] RISC-V: Enable KVM for RV64 and RV32 Anup Patel
2019-09-04 16:17 ` Anup Patel
2019-09-04 16:13 ` [PATCH v7 02/21] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-09-19 12:56 ` Anup Patel
2019-09-21 10:01 ` Paul Walmsley
2019-09-23 3:39 ` Anup Patel
2019-09-23 15:54 ` Alistair Francis
2019-09-04 16:14 ` [PATCH v7 03/21] RISC-V: Export few kernel symbols Anup Patel
2019-09-19 12:39 ` Paul Walmsley
2019-09-04 16:14 ` [PATCH v7 04/21] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-09-04 16:14 ` [PATCH v7 05/21] RISC-V: Add initial skeletal KVM support Anup Patel
2019-09-04 16:14 ` [PATCH v7 06/21] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-09-23 6:44 ` Alexander Graf
2019-09-23 12:37 ` Anup Patel
2019-09-04 16:14 ` [PATCH v7 07/21] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-09-04 16:14 ` [PATCH v7 08/21] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-09-23 3:42 ` Anup Patel
2019-09-04 16:15 ` [PATCH v7 09/21] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-09-04 16:15 ` [PATCH v7 10/21] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-09-23 6:50 ` Alexander Graf
2019-09-23 11:12 ` Paolo Bonzini
2019-09-23 13:09 ` Anup Patel
2019-09-23 13:33 ` Paolo Bonzini
2019-09-24 5:07 ` Anup Patel
2019-10-08 22:44 ` Palmer Dabbelt
2019-10-09 4:58 ` Anup Patel
2019-09-04 16:15 ` [PATCH v7 11/21] RISC-V: KVM: Handle WFI " Anup Patel
2019-09-23 6:53 ` Alexander Graf
2019-09-23 12:54 ` Anup Patel [this message]
2019-09-04 16:15 ` [PATCH v7 12/21] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-09-04 16:15 ` [PATCH v7 13/21] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-09-04 16:15 ` [PATCH v7 14/21] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-09-04 16:15 ` [PATCH v7 15/21] RISC-V: KVM: Add timer functionality Anup Patel
2019-09-04 16:15 ` [PATCH v7 16/21] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-09-04 16:15 ` [PATCH v7 17/21] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-09-04 16:16 ` [PATCH v7 18/21] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-09-05 8:35 ` Andreas Schwab
2019-09-23 7:01 ` Alexander Graf
2019-09-23 12:59 ` Anup Patel
2019-09-04 16:16 ` [PATCH v7 19/21] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2019-09-04 16:16 ` [PATCH v7 20/21] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Anup Patel
2019-09-19 7:54 ` Paul Walmsley
2019-09-04 16:16 ` [PATCH v7 21/21] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
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