From: Anup Patel <anup@brainfault.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>, Gary Guo <gary@garyguo.net>,
Anup Patel <Anup.Patel@wdc.com>,
Atish Patra <atish.patra@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
opensbi@lists.infradead.org,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v4 0/5] TLB/I$ flush cleanups and improvements
Date: Wed, 10 Apr 2019 14:31:04 +0530 [thread overview]
Message-ID: <CAAhSdy36Ukh-rCZPnyQh9y8iUi730wBuY_qGO+ctK1_L=sCU1g@mail.gmail.com> (raw)
In-Reply-To: <20190410070446.GA18678@infradead.org>
On Wed, Apr 10, 2019 at 12:34 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Wed, Mar 27, 2019 at 12:41:11AM +0000, Gary Guo wrote:
> > From: Gary Guo <gary@garyguo.net>
> >
> > This is the v4 of the general TLB/I$ flush improvement series.
> > I still have tlbi_method=ipi being the default as opposed to what
> > Atish suggests, as:
> > * There are still usage of BBL in the wild
> > * OpenSBI's support isn't made into stable yet.
> > * OpenSBI's support on the dev branch has some racing issues yet to resolve.
>
> Can you clarify the races? I know Anup had some FIFO-order commits
> in opensbi about a week ago, did they address you concerns?
>
> Anup, do you have performance numbers for the old opensbi vs your
> implementation of the optimized TLB flushing vs this patch?
Atish had posted performance numbers on his GitHub PR at:
https://github.com/riscv/opensbi/pull/111
These performance numbers are as follows.....
Benchmark used: A microbenchmark that mmap a ramdisk (1G) and
multiple threads access 50MB of memory randomly.
https://github.com/westerndigitalcorporation/hmmap/blob/master/userspace/hmmap_uspace_common.c
The result is averaged over 25 iterations for 8 threads on HiFive
Unleashed board. In both cases around ~1M remote tlb flushes are triggered.
IPI SBI Gain
Average Write Time 2.53183 2.43263 +4.34%
Average Read Time 1.32198 1.24643 +6.09%
Total Time 97.7589 92.859 +5.01%
I believe he has more optimizations in-pipeline for OpenSBI
so we might see even better numbers.
Regards,
Anup
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next prev parent reply other threads:[~2019-04-10 9:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 0:41 [PATCH v4 0/5] TLB/I$ flush cleanups and improvements Gary Guo
2019-03-27 0:41 ` [PATCH v4 1/5] riscv: move flush_icache_{all,mm} to cacheflush.c Gary Guo
2019-03-27 7:06 ` Christoph Hellwig
2019-03-28 6:45 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 3/5] riscv: fix sbi_remote_sfence_vma{,_asid} Gary Guo
2019-03-27 7:08 ` Christoph Hellwig
2019-03-28 6:47 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 4/5] riscv: rewrite tlb flush for performance Gary Guo
2019-03-27 7:25 ` Christoph Hellwig
2019-03-27 13:56 ` Gary Guo
2019-03-28 16:17 ` Christoph Hellwig
2019-03-28 16:39 ` Gary Guo
2019-03-28 16:55 ` Christoph Hellwig
2019-03-27 0:41 ` [PATCH v4 2/5] riscv: move switch_mm to its own file Gary Guo
2019-03-27 7:08 ` Christoph Hellwig
2019-03-27 7:18 ` Christoph Hellwig
2019-03-28 6:47 ` Anup Patel
2019-03-27 0:41 ` [PATCH v4 5/5] riscv: implement IPI-based remote TLB shootdown Gary Guo
2019-03-27 7:31 ` Christoph Hellwig
2019-03-27 14:03 ` Gary Guo
2019-03-28 16:36 ` Christoph Hellwig
2019-03-28 16:47 ` Gary Guo
2019-03-28 16:57 ` Christoph Hellwig
2019-03-28 6:50 ` Anup Patel
2019-04-10 7:04 ` [PATCH v4 0/5] TLB/I$ flush cleanups and improvements Christoph Hellwig
2019-04-10 9:01 ` Anup Patel [this message]
2019-04-10 10:11 ` Christoph Hellwig
2019-04-10 10:22 ` Anup Patel
2019-04-11 1:24 ` Atish Patra
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