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From: Anup Patel <anup@brainfault.org>
To: Guo Ren <guoren@kernel.org>
Cc: linux-arch@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
	Guo Ren <ren_guo@c-sky.com>, Arnd Bergmann <arnd@arndb.de>,
	Atish Patra <atish.patra@wdc.com>,
	Andreas Schwab <schwab@linux-m68k.org>,
	Anup Patel <Anup.Patel@wdc.com>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	linux-csky@vger.kernel.org,
	Vincent Chen <vincent.chen@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Greentime Hu <greentime.hu@sifive.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Bin Meng <bmeng.cn@gmail.com>
Subject: Re: [PATCH V2 2/4] riscv: Rename __switch_to_aux -> fpu
Date: Thu, 23 Jan 2020 11:14:46 +0530	[thread overview]
Message-ID: <CAAhSdy3pe4NNS4Gv3dxfe36mMQAB4wis3+wN2OzBmVF7BehK=A@mail.gmail.com> (raw)
In-Reply-To: <20200116143029.31441-2-guoren@kernel.org>

On Thu, Jan 16, 2020 at 8:01 PM <guoren@kernel.org> wrote:
>
> From: Guo Ren <ren_guo@c-sky.com>
>
> The name of __switch_to_aux is not clear and rename it with the
> determine function: __switch_to_fpu. Next we could add other regs'
> switch.
>
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Cc: Anup Patel <Anup.Patel@wdc.com>
> ---
>  arch/riscv/include/asm/switch_to.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
> index 407bcc96a710..b9234e7178d0 100644
> --- a/arch/riscv/include/asm/switch_to.h
> +++ b/arch/riscv/include/asm/switch_to.h
> @@ -44,7 +44,7 @@ static inline void fstate_restore(struct task_struct *task,
>         }
>  }
>
> -static inline void __switch_to_aux(struct task_struct *prev,
> +static inline void __switch_to_fpu(struct task_struct *prev,
>                                    struct task_struct *next)
>  {
>         struct pt_regs *regs;
> @@ -60,7 +60,7 @@ extern bool has_fpu;
>  #define has_fpu false
>  #define fstate_save(task, regs) do { } while (0)
>  #define fstate_restore(task, regs) do { } while (0)
> -#define __switch_to_aux(__prev, __next) do { } while (0)
> +#define __switch_to_fpu(__prev, __next) do { } while (0)
>  #endif
>
>  extern struct task_struct *__switch_to(struct task_struct *,
> @@ -71,7 +71,7 @@ do {                                                  \
>         struct task_struct *__prev = (prev);            \
>         struct task_struct *__next = (next);            \
>         if (has_fpu)                                    \
> -               __switch_to_aux(__prev, __next);        \
> +               __switch_to_fpu(__prev, __next);        \
>         ((last) = __switch_to(__prev, __next));         \
>  } while (0)
>
> --
> 2.17.0
>

LGTM.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup


  reply	other threads:[~2020-01-23  5:45 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-16 14:30 [PATCH V2 1/4] riscv: Separate patch for cflags and aflags guoren
2020-01-16 14:30 ` [PATCH V2 2/4] riscv: Rename __switch_to_aux -> fpu guoren
2020-01-23  5:44   ` Anup Patel [this message]
2020-01-16 14:30 ` [PATCH V2 3/4] riscv: Extending cpufeature.c to detect V-extension guoren
2020-01-23  5:45   ` Anup Patel
2020-01-16 14:30 ` [PATCH V2 4/4] riscv: Add vector ISA support guoren
2020-01-23  6:04   ` Anup Patel
2020-01-23  5:44 ` [PATCH V2 1/4] riscv: Separate patch for cflags and aflags Anup Patel

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