From: Bin Meng <bmeng.cn@gmail.com>
To: Atish Patra <atish.patra@wdc.com>
Cc: devicetree <devicetree@vger.kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Cyril.Jean@microchip.com,
Daire McNamara <daire.mcnamara@microchip.com>,
Anup Patel <anup.patel@wdc.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Alistair Francis <alistair.francis@wdc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
Padmarao Begari <padmarao.begari@microchip.com>
Subject: Re: [RFC PATCH 3/3] RISC-V: Enable Microchip PolarFire ICICLE SoC
Date: Tue, 3 Nov 2020 18:03:01 +0800 [thread overview]
Message-ID: <CAEUhbmU5jUpSAzJS3oN2i6igHXOXMAq2KR5yWhbx1q2_qF-FHg@mail.gmail.com> (raw)
In-Reply-To: <20201028232759.1928479-4-atish.patra@wdc.com>
On Thu, Oct 29, 2020 at 6:00 PM Atish Patra <atish.patra@wdc.com> wrote:
>
> Enable Microchip PolarFire ICICLE soc config in defconfig.
> It allows the default upstream kernel to boot on PolarFire ICICLE board.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/configs/defconfig | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
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next prev parent reply other threads:[~2020-11-03 10:03 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 23:27 [RFC PATCH 0/3] Add Microchip PolarFire Soc Support Atish Patra
2020-10-28 23:27 ` [RFC PATCH 1/3] RISC-V: Add Microchip PolarFire SoC kconfig option Atish Patra
2020-10-30 9:08 ` Anup Patel
2020-11-03 9:55 ` Bin Meng
2020-11-06 7:14 ` Palmer Dabbelt
2020-10-28 23:27 ` [RFC PATCH 2/3] RISC-V: Initial DTS for Microchip ICICLE board Atish Patra
2020-10-29 10:24 ` Ben Dooks
2020-10-30 7:11 ` Atish Patra
2020-10-30 21:19 ` Ben Dooks
2020-11-03 15:07 ` Atish Patra
2020-11-03 15:19 ` Ben Dooks
2020-11-03 18:10 ` Cyril.Jean
2020-11-03 18:28 ` Ben Dooks
2020-11-03 18:36 ` Atish Patra
2020-11-03 18:39 ` Ben Dooks
2020-11-03 18:45 ` Atish Patra
2020-11-03 18:40 ` Cyril.Jean
2020-11-03 18:46 ` Ben Dooks
2020-11-04 2:41 ` Bin Meng
2020-10-30 9:05 ` Anup Patel
2020-10-30 20:27 ` Atish Patra
2020-11-03 10:59 ` Ben Dooks
2020-11-03 15:08 ` Atish Patra
2020-10-30 21:20 ` Ben Dooks
2020-11-03 10:00 ` Bin Meng
2020-11-03 18:19 ` Cyril.Jean
2020-11-03 18:38 ` Atish Patra
2020-11-03 18:50 ` Cyril.Jean
2020-11-03 19:02 ` Atish Patra
2020-11-06 7:14 ` Palmer Dabbelt
2020-10-28 23:27 ` [RFC PATCH 3/3] RISC-V: Enable Microchip PolarFire ICICLE SoC Atish Patra
2020-10-30 9:09 ` Anup Patel
2020-10-30 21:21 ` Ben Dooks
2020-11-03 10:03 ` Bin Meng [this message]
2020-11-06 7:14 ` Palmer Dabbelt
2020-11-06 7:14 ` [RFC PATCH 0/3] Add Microchip PolarFire Soc Support Palmer Dabbelt
2020-11-06 7:37 ` Atish Patra
2020-11-06 8:11 ` Palmer Dabbelt
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