* Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support [not found] <CAOnJCUL5tLzk73GJNVXMmJmBKo_kVcAQ7OYwpi9bjKgTbabhyg@mail.gmail.com> @ 2021-04-23 19:56 ` Palmer Dabbelt 0 siblings, 0 replies; 7+ messages in thread From: Palmer Dabbelt @ 2021-04-23 19:56 UTC (permalink / raw) To: atishp Cc: Conor.Dooley, Alistair Francis, Anup Patel, Atish Patra, Daire.McNamara, Ivan.Griffin, Lewis.Hanly, aou, bjorn, devicetree, linux-kernel, linux-riscv, Paul Walmsley, robh+dt On Fri, 23 Apr 2021 05:31:22 PDT (-0700), atishp@atishpatra.org wrote: > On Fri, Apr 23, 2021 at 1:44 AM <Conor.Dooley@microchip.com> wrote: > >> On 23/04/2021 02:37, Palmer Dabbelt wrote: >> > EXTERNAL EMAIL: Do not click links or open attachments unless you know >> > the content is safe >> > >> > On Thu, 22 Apr 2021 15:33:39 PDT (-0700), atishp@atishpatra.org wrote: >> >> On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@atishpatra.org> >> >> wrote: >> >>> >> >>> On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> >> >>> wrote: >> >>> > >> >>> > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote: >> >>> > > This series adds minimal support for Microchip Polar Fire Soc >> >>> Icicle kit. >> >>> > > It is rebased on v5.12-rc1 and depends on clock support. >> >>> > > Only MMC and ethernet drivers are enabled via this series. >> >>> > > The idea here is to add the foundational patches so that other >> >>> drivers >> >>> > > can be added to on top of this. The device tree may change based on >> >>> > > feedback on bindings of individual driver support patches. >> >>> > > >> >>> > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. >> >>> > > It depends on the updated clock-series[2] and macb fix[3]. >> >>> > > The series is also tested by Lewis from Microchip. >> >>> > > >> >>> > > The series can also be found at. >> >>> > > >> >>> https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 >> >>> > > >> >>> > > [1] >> >>> https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html >> >>> > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html >> >>> > > >> >>> > > Changes from v3->v4: >> >>> > > 1. Fixed few DT specific issues. >> >>> > > 2. Rebased on top of new clock driver. >> >>> > > 3. SD card functionality is verified. >> >>> > > >> >>> > > Changes from v2->v3: >> >>> > > 1. Fixed a typo in dt binding. >> >>> > > 2. Included MAINTAINERS entry for PolarFire SoC. >> >>> > > 3. Improved the dts file by using lowercase clock names and >> >>> keeping phy >> >>> > > details in board specific dts file. >> >>> > > >> >>> > > Changes from v1->v2: >> >>> > > 1. Modified the DT to match the device tree in U-Boot. >> >>> > > 2. Added both eMMC & SDcard entries in DT. However, SD card is >> >>> only enabled >> >>> > > as it allows larger storage option for linux distros. >> >>> > > >> >>> > > Atish Patra (4): >> >>> > > RISC-V: Add Microchip PolarFire SoC kconfig option >> >>> > > dt-bindings: riscv: microchip: Add YAML documentation for the >> >>> > > PolarFire SoC >> >>> > > RISC-V: Initial DTS for Microchip ICICLE board >> >>> > > RISC-V: Enable Microchip PolarFire ICICLE SoC >> >>> > > >> >>> > > Conor Dooley (1): >> >>> > > MAINTAINERS: add microchip polarfire soc support >> >>> > > >> >>> > > .../devicetree/bindings/riscv/microchip.yaml | 27 ++ >> >>> > > MAINTAINERS | 8 + >> >>> > > arch/riscv/Kconfig.socs | 7 + >> >>> > > arch/riscv/boot/dts/Makefile | 1 + >> >>> > > arch/riscv/boot/dts/microchip/Makefile | 2 + >> >>> > > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ >> >>> > > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 >> >>> ++++++++++++++++++ >> >>> > > arch/riscv/configs/defconfig | 4 + >> >>> > > 8 files changed, 450 insertions(+) >> >>> > > create mode 100644 >> >>> Documentation/devicetree/bindings/riscv/microchip.yaml >> >>> > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile >> >>> > > create mode 100644 >> >>> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> >>> > > create mode 100644 >> >>> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> >>> > >> >>> > I had this left in my inbox waiting for either some reviews to >> >>> come in or a v2, >> >>> > but I don't see any. Did I miss something? >> >>> > >> >>> Sorry for the late reply. I am on vacation until May. I think I saw >> >>> all the patches have already been reviewed. >> >>> Let me know if it is not the case. >> >>> >> >> I cross checked and all the patches are reviewed-by. >> >> @palmer: Is it possible to take this series for 5.13 MW ? >> > >> > I still don't see any reviews for the mailbox driver, did it just get >> > lost on the way to me? >> >> the mailbox driver has reviewed-by tags on two of the five patches (rob >> on the dt-binding entries). >> v6 was set on the 23rd but hasn't got any attention on the other three >> patches yet >> however that's not in this patch set, only depends on it >> > > Thanks Conor. > > @palmer: This series adds the basic soc support > for polarfire SoC. With clock driver, we can now boot. > > Mailbox driver series provides additional features. Were you looking for > reviewed-by tags for the clock driver ? Ah, sorry. I get this one mixed up with "Add support for the PolarFire SoC system controller", which I also had in my inbox because I wanted to make sure it didn't get dropped. I guess I just didn't read the whole title and dropped this v4 because I thought the v6 was a newer version of the same patch set. This is now on for-next. Thanks! > > > >> > >> >> >> >>> > _______________________________________________ >> >>> > linux-riscv mailing list >> >>> > linux-riscv@lists.infradead.org >> >>> > http://lists.infradead.org/mailman/listinfo/linux-riscv >> >>> >> >>> >> >>> >> >>> -- >> >>> Regards, >> >>> Atish >> >> >> -- > Regards, > Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 0/5] Add Microchip PolarFire Soc Support @ 2021-03-03 20:02 Atish Patra 2021-03-30 4:17 ` Palmer Dabbelt 0 siblings, 1 reply; 7+ messages in thread From: Atish Patra @ 2021-03-03 20:02 UTC (permalink / raw) To: linux-kernel Cc: Atish Patra, Albert Ou, Alistair Francis, Anup Patel, Björn Töpel, devicetree, linux-riscv, Palmer Dabbelt, Paul Walmsley, Rob Herring, Conor.Dooley, Daire McNamara, Ivan.Griffin, Lewis.Hanly This series adds minimal support for Microchip Polar Fire Soc Icicle kit. It is rebased on v5.12-rc1 and depends on clock support. Only MMC and ethernet drivers are enabled via this series. The idea here is to add the foundational patches so that other drivers can be added to on top of this. The device tree may change based on feedback on bindings of individual driver support patches. This series has been tested on Qemu and Polar Fire Soc Icicle kit. It depends on the updated clock-series[2] and macb fix[3]. The series is also tested by Lewis from Microchip. The series can also be found at. https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html [2] https://www.spinics.net/lists/linux-clk/msg54579.html Changes from v3->v4: 1. Fixed few DT specific issues. 2. Rebased on top of new clock driver. 3. SD card functionality is verified. Changes from v2->v3: 1. Fixed a typo in dt binding. 2. Included MAINTAINERS entry for PolarFire SoC. 3. Improved the dts file by using lowercase clock names and keeping phy details in board specific dts file. Changes from v1->v2: 1. Modified the DT to match the device tree in U-Boot. 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled as it allows larger storage option for linux distros. Atish Patra (4): RISC-V: Add Microchip PolarFire SoC kconfig option dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC RISC-V: Initial DTS for Microchip ICICLE board RISC-V: Enable Microchip PolarFire ICICLE SoC Conor Dooley (1): MAINTAINERS: add microchip polarfire soc support .../devicetree/bindings/riscv/microchip.yaml | 27 ++ MAINTAINERS | 8 + arch/riscv/Kconfig.socs | 7 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/microchip/Makefile | 2 + .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ .../boot/dts/microchip/microchip-mpfs.dtsi | 329 ++++++++++++++++++ arch/riscv/configs/defconfig | 4 + 8 files changed, 450 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml create mode 100644 arch/riscv/boot/dts/microchip/Makefile create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support 2021-03-03 20:02 Atish Patra @ 2021-03-30 4:17 ` Palmer Dabbelt 2021-04-18 3:26 ` Atish Patra 0 siblings, 1 reply; 7+ messages in thread From: Palmer Dabbelt @ 2021-03-30 4:17 UTC (permalink / raw) To: Atish Patra Cc: linux-kernel, Atish Patra, aou, Alistair Francis, Anup Patel, bjorn, devicetree, linux-riscv, Paul Walmsley, robh+dt, Conor.Dooley, daire.mcnamara, Ivan.Griffin, Lewis.Hanly On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote: > This series adds minimal support for Microchip Polar Fire Soc Icicle kit. > It is rebased on v5.12-rc1 and depends on clock support. > Only MMC and ethernet drivers are enabled via this series. > The idea here is to add the foundational patches so that other drivers > can be added to on top of this. The device tree may change based on > feedback on bindings of individual driver support patches. > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. > It depends on the updated clock-series[2] and macb fix[3]. > The series is also tested by Lewis from Microchip. > > The series can also be found at. > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html > [2] https://www.spinics.net/lists/linux-clk/msg54579.html > > Changes from v3->v4: > 1. Fixed few DT specific issues. > 2. Rebased on top of new clock driver. > 3. SD card functionality is verified. > > Changes from v2->v3: > 1. Fixed a typo in dt binding. > 2. Included MAINTAINERS entry for PolarFire SoC. > 3. Improved the dts file by using lowercase clock names and keeping phy > details in board specific dts file. > > Changes from v1->v2: > 1. Modified the DT to match the device tree in U-Boot. > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled > as it allows larger storage option for linux distros. > > Atish Patra (4): > RISC-V: Add Microchip PolarFire SoC kconfig option > dt-bindings: riscv: microchip: Add YAML documentation for the > PolarFire SoC > RISC-V: Initial DTS for Microchip ICICLE board > RISC-V: Enable Microchip PolarFire ICICLE SoC > > Conor Dooley (1): > MAINTAINERS: add microchip polarfire soc support > > .../devicetree/bindings/riscv/microchip.yaml | 27 ++ > MAINTAINERS | 8 + > arch/riscv/Kconfig.socs | 7 + > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/microchip/Makefile | 2 + > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 ++++++++++++++++++ > arch/riscv/configs/defconfig | 4 + > 8 files changed, 450 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml > create mode 100644 arch/riscv/boot/dts/microchip/Makefile > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi I had this left in my inbox waiting for either some reviews to come in or a v2, but I don't see any. Did I miss something? _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support 2021-03-30 4:17 ` Palmer Dabbelt @ 2021-04-18 3:26 ` Atish Patra 2021-04-22 22:33 ` Atish Patra 0 siblings, 1 reply; 7+ messages in thread From: Atish Patra @ 2021-04-18 3:26 UTC (permalink / raw) To: Palmer Dabbelt Cc: Atish Patra, linux-kernel@vger.kernel.org List, Albert Ou, Alistair Francis, Anup Patel, bjorn, devicetree, linux-riscv, Paul Walmsley, Rob Herring, Conor.Dooley, Daire McNamara, Ivan.Griffin, Lewis.Hanly On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> wrote: > > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote: > > This series adds minimal support for Microchip Polar Fire Soc Icicle kit. > > It is rebased on v5.12-rc1 and depends on clock support. > > Only MMC and ethernet drivers are enabled via this series. > > The idea here is to add the foundational patches so that other drivers > > can be added to on top of this. The device tree may change based on > > feedback on bindings of individual driver support patches. > > > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. > > It depends on the updated clock-series[2] and macb fix[3]. > > The series is also tested by Lewis from Microchip. > > > > The series can also be found at. > > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 > > > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html > > > > Changes from v3->v4: > > 1. Fixed few DT specific issues. > > 2. Rebased on top of new clock driver. > > 3. SD card functionality is verified. > > > > Changes from v2->v3: > > 1. Fixed a typo in dt binding. > > 2. Included MAINTAINERS entry for PolarFire SoC. > > 3. Improved the dts file by using lowercase clock names and keeping phy > > details in board specific dts file. > > > > Changes from v1->v2: > > 1. Modified the DT to match the device tree in U-Boot. > > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled > > as it allows larger storage option for linux distros. > > > > Atish Patra (4): > > RISC-V: Add Microchip PolarFire SoC kconfig option > > dt-bindings: riscv: microchip: Add YAML documentation for the > > PolarFire SoC > > RISC-V: Initial DTS for Microchip ICICLE board > > RISC-V: Enable Microchip PolarFire ICICLE SoC > > > > Conor Dooley (1): > > MAINTAINERS: add microchip polarfire soc support > > > > .../devicetree/bindings/riscv/microchip.yaml | 27 ++ > > MAINTAINERS | 8 + > > arch/riscv/Kconfig.socs | 7 + > > arch/riscv/boot/dts/Makefile | 1 + > > arch/riscv/boot/dts/microchip/Makefile | 2 + > > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ > > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 ++++++++++++++++++ > > arch/riscv/configs/defconfig | 4 + > > 8 files changed, 450 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > > I had this left in my inbox waiting for either some reviews to come in or a v2, > but I don't see any. Did I miss something? > Sorry for the late reply. I am on vacation until May. I think I saw all the patches have already been reviewed. Let me know if it is not the case. > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support 2021-04-18 3:26 ` Atish Patra @ 2021-04-22 22:33 ` Atish Patra 2021-04-23 1:37 ` Palmer Dabbelt 0 siblings, 1 reply; 7+ messages in thread From: Atish Patra @ 2021-04-22 22:33 UTC (permalink / raw) To: Palmer Dabbelt Cc: Atish Patra, linux-kernel@vger.kernel.org List, Albert Ou, Alistair Francis, Anup Patel, Björn Töpel, devicetree, linux-riscv, Paul Walmsley, Rob Herring, Conor.Dooley, Daire McNamara, Ivan.Griffin, Lewis.Hanly On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@atishpatra.org> wrote: > > On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> wrote: > > > > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote: > > > This series adds minimal support for Microchip Polar Fire Soc Icicle kit. > > > It is rebased on v5.12-rc1 and depends on clock support. > > > Only MMC and ethernet drivers are enabled via this series. > > > The idea here is to add the foundational patches so that other drivers > > > can be added to on top of this. The device tree may change based on > > > feedback on bindings of individual driver support patches. > > > > > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. > > > It depends on the updated clock-series[2] and macb fix[3]. > > > The series is also tested by Lewis from Microchip. > > > > > > The series can also be found at. > > > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 > > > > > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html > > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html > > > > > > Changes from v3->v4: > > > 1. Fixed few DT specific issues. > > > 2. Rebased on top of new clock driver. > > > 3. SD card functionality is verified. > > > > > > Changes from v2->v3: > > > 1. Fixed a typo in dt binding. > > > 2. Included MAINTAINERS entry for PolarFire SoC. > > > 3. Improved the dts file by using lowercase clock names and keeping phy > > > details in board specific dts file. > > > > > > Changes from v1->v2: > > > 1. Modified the DT to match the device tree in U-Boot. > > > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled > > > as it allows larger storage option for linux distros. > > > > > > Atish Patra (4): > > > RISC-V: Add Microchip PolarFire SoC kconfig option > > > dt-bindings: riscv: microchip: Add YAML documentation for the > > > PolarFire SoC > > > RISC-V: Initial DTS for Microchip ICICLE board > > > RISC-V: Enable Microchip PolarFire ICICLE SoC > > > > > > Conor Dooley (1): > > > MAINTAINERS: add microchip polarfire soc support > > > > > > .../devicetree/bindings/riscv/microchip.yaml | 27 ++ > > > MAINTAINERS | 8 + > > > arch/riscv/Kconfig.socs | 7 + > > > arch/riscv/boot/dts/Makefile | 1 + > > > arch/riscv/boot/dts/microchip/Makefile | 2 + > > > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ > > > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 ++++++++++++++++++ > > > arch/riscv/configs/defconfig | 4 + > > > 8 files changed, 450 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml > > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile > > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > > > > I had this left in my inbox waiting for either some reviews to come in or a v2, > > but I don't see any. Did I miss something? > > > Sorry for the late reply. I am on vacation until May. I think I saw > all the patches have already been reviewed. > Let me know if it is not the case. > I cross checked and all the patches are reviewed-by. @palmer: Is it possible to take this series for 5.13 MW ? > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > > > -- > Regards, > Atish -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support 2021-04-22 22:33 ` Atish Patra @ 2021-04-23 1:37 ` Palmer Dabbelt 2021-04-23 8:44 ` Conor.Dooley 0 siblings, 1 reply; 7+ messages in thread From: Palmer Dabbelt @ 2021-04-23 1:37 UTC (permalink / raw) To: atishp Cc: Atish Patra, linux-kernel, aou, Alistair Francis, Anup Patel, bjorn, devicetree, linux-riscv, Paul Walmsley, robh+dt, Conor.Dooley, daire.mcnamara, Ivan.Griffin, Lewis.Hanly On Thu, 22 Apr 2021 15:33:39 PDT (-0700), atishp@atishpatra.org wrote: > On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@atishpatra.org> wrote: >> >> On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> wrote: >> > >> > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote: >> > > This series adds minimal support for Microchip Polar Fire Soc Icicle kit. >> > > It is rebased on v5.12-rc1 and depends on clock support. >> > > Only MMC and ethernet drivers are enabled via this series. >> > > The idea here is to add the foundational patches so that other drivers >> > > can be added to on top of this. The device tree may change based on >> > > feedback on bindings of individual driver support patches. >> > > >> > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. >> > > It depends on the updated clock-series[2] and macb fix[3]. >> > > The series is also tested by Lewis from Microchip. >> > > >> > > The series can also be found at. >> > > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 >> > > >> > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html >> > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html >> > > >> > > Changes from v3->v4: >> > > 1. Fixed few DT specific issues. >> > > 2. Rebased on top of new clock driver. >> > > 3. SD card functionality is verified. >> > > >> > > Changes from v2->v3: >> > > 1. Fixed a typo in dt binding. >> > > 2. Included MAINTAINERS entry for PolarFire SoC. >> > > 3. Improved the dts file by using lowercase clock names and keeping phy >> > > details in board specific dts file. >> > > >> > > Changes from v1->v2: >> > > 1. Modified the DT to match the device tree in U-Boot. >> > > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled >> > > as it allows larger storage option for linux distros. >> > > >> > > Atish Patra (4): >> > > RISC-V: Add Microchip PolarFire SoC kconfig option >> > > dt-bindings: riscv: microchip: Add YAML documentation for the >> > > PolarFire SoC >> > > RISC-V: Initial DTS for Microchip ICICLE board >> > > RISC-V: Enable Microchip PolarFire ICICLE SoC >> > > >> > > Conor Dooley (1): >> > > MAINTAINERS: add microchip polarfire soc support >> > > >> > > .../devicetree/bindings/riscv/microchip.yaml | 27 ++ >> > > MAINTAINERS | 8 + >> > > arch/riscv/Kconfig.socs | 7 + >> > > arch/riscv/boot/dts/Makefile | 1 + >> > > arch/riscv/boot/dts/microchip/Makefile | 2 + >> > > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ >> > > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 ++++++++++++++++++ >> > > arch/riscv/configs/defconfig | 4 + >> > > 8 files changed, 450 insertions(+) >> > > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml >> > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile >> > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> > >> > I had this left in my inbox waiting for either some reviews to come in or a v2, >> > but I don't see any. Did I miss something? >> > >> Sorry for the late reply. I am on vacation until May. I think I saw >> all the patches have already been reviewed. >> Let me know if it is not the case. >> > I cross checked and all the patches are reviewed-by. > @palmer: Is it possible to take this series for 5.13 MW ? I still don't see any reviews for the mailbox driver, did it just get lost on the way to me? > >> > _______________________________________________ >> > linux-riscv mailing list >> > linux-riscv@lists.infradead.org >> > http://lists.infradead.org/mailman/listinfo/linux-riscv >> >> >> >> -- >> Regards, >> Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support 2021-04-23 1:37 ` Palmer Dabbelt @ 2021-04-23 8:44 ` Conor.Dooley 0 siblings, 0 replies; 7+ messages in thread From: Conor.Dooley @ 2021-04-23 8:44 UTC (permalink / raw) To: palmer, atishp Cc: Atish.Patra, linux-kernel, aou, Alistair.Francis, Anup.Patel, bjorn, devicetree, linux-riscv, paul.walmsley, robh+dt, Daire.McNamara, Ivan.Griffin, Lewis.Hanly On 23/04/2021 02:37, Palmer Dabbelt wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know > the content is safe > > On Thu, 22 Apr 2021 15:33:39 PDT (-0700), atishp@atishpatra.org wrote: >> On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@atishpatra.org> >> wrote: >>> >>> On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> >>> wrote: >>> > >>> > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote: >>> > > This series adds minimal support for Microchip Polar Fire Soc >>> Icicle kit. >>> > > It is rebased on v5.12-rc1 and depends on clock support. >>> > > Only MMC and ethernet drivers are enabled via this series. >>> > > The idea here is to add the foundational patches so that other >>> drivers >>> > > can be added to on top of this. The device tree may change based on >>> > > feedback on bindings of individual driver support patches. >>> > > >>> > > This series has been tested on Qemu and Polar Fire Soc Icicle kit. >>> > > It depends on the updated clock-series[2] and macb fix[3]. >>> > > The series is also tested by Lewis from Microchip. >>> > > >>> > > The series can also be found at. >>> > > >>> https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4 >>> > > >>> > > [1] >>> https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html >>> > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html >>> > > >>> > > Changes from v3->v4: >>> > > 1. Fixed few DT specific issues. >>> > > 2. Rebased on top of new clock driver. >>> > > 3. SD card functionality is verified. >>> > > >>> > > Changes from v2->v3: >>> > > 1. Fixed a typo in dt binding. >>> > > 2. Included MAINTAINERS entry for PolarFire SoC. >>> > > 3. Improved the dts file by using lowercase clock names and >>> keeping phy >>> > > details in board specific dts file. >>> > > >>> > > Changes from v1->v2: >>> > > 1. Modified the DT to match the device tree in U-Boot. >>> > > 2. Added both eMMC & SDcard entries in DT. However, SD card is >>> only enabled >>> > > as it allows larger storage option for linux distros. >>> > > >>> > > Atish Patra (4): >>> > > RISC-V: Add Microchip PolarFire SoC kconfig option >>> > > dt-bindings: riscv: microchip: Add YAML documentation for the >>> > > PolarFire SoC >>> > > RISC-V: Initial DTS for Microchip ICICLE board >>> > > RISC-V: Enable Microchip PolarFire ICICLE SoC >>> > > >>> > > Conor Dooley (1): >>> > > MAINTAINERS: add microchip polarfire soc support >>> > > >>> > > .../devicetree/bindings/riscv/microchip.yaml | 27 ++ >>> > > MAINTAINERS | 8 + >>> > > arch/riscv/Kconfig.socs | 7 + >>> > > arch/riscv/boot/dts/Makefile | 1 + >>> > > arch/riscv/boot/dts/microchip/Makefile | 2 + >>> > > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++ >>> > > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 >>> ++++++++++++++++++ >>> > > arch/riscv/configs/defconfig | 4 + >>> > > 8 files changed, 450 insertions(+) >>> > > create mode 100644 >>> Documentation/devicetree/bindings/riscv/microchip.yaml >>> > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile >>> > > create mode 100644 >>> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >>> > > create mode 100644 >>> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >>> > >>> > I had this left in my inbox waiting for either some reviews to >>> come in or a v2, >>> > but I don't see any. Did I miss something? >>> > >>> Sorry for the late reply. I am on vacation until May. I think I saw >>> all the patches have already been reviewed. >>> Let me know if it is not the case. >>> >> I cross checked and all the patches are reviewed-by. >> @palmer: Is it possible to take this series for 5.13 MW ? > > I still don't see any reviews for the mailbox driver, did it just get > lost on the way to me? the mailbox driver has reviewed-by tags on two of the five patches (rob on the dt-binding entries). v6 was set on the 23rd but hasn't got any attention on the other three patches yet however that's not in this patch set, only depends on it > >> >>> > _______________________________________________ >>> > linux-riscv mailing list >>> > linux-riscv@lists.infradead.org >>> > http://lists.infradead.org/mailman/listinfo/linux-riscv >>> >>> >>> >>> -- >>> Regards, >>> Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-04-23 19:57 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- [not found] <CAOnJCUL5tLzk73GJNVXMmJmBKo_kVcAQ7OYwpi9bjKgTbabhyg@mail.gmail.com> 2021-04-23 19:56 ` [PATCH v4 0/5] Add Microchip PolarFire Soc Support Palmer Dabbelt 2021-03-03 20:02 Atish Patra 2021-03-30 4:17 ` Palmer Dabbelt 2021-04-18 3:26 ` Atish Patra 2021-04-22 22:33 ` Atish Patra 2021-04-23 1:37 ` Palmer Dabbelt 2021-04-23 8:44 ` Conor.Dooley
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