* [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
@ 2023-01-21 11:08 ` Johan Jonker
2023-01-22 13:53 ` Krzysztof Kozlowski
` (2 more replies)
2023-01-21 11:08 ` [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id Johan Jonker
` (9 subsequent siblings)
10 siblings, 3 replies; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:08 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
Mark gpio sub nodes of pinctrl as deprecated.
Gpio nodes are now placed in the root of the device tree.
The relation to pinctrl is now described with the
"gpio-ranges" property.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
.../devicetree/bindings/pinctrl/rockchip,pinctrl.yaml | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml
index d6539723f..45b767986 100644
--- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml
@@ -76,15 +76,13 @@ allOf:
required:
- compatible
- rockchip,grf
- - "#address-cells"
- - "#size-cells"
- - ranges
patternProperties:
"gpio@[0-9a-f]+$":
type: object
$ref: "/schemas/gpio/rockchip,gpio-bank.yaml#"
+ deprecated: true
unevaluatedProperties: false
--
2.20.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
2023-01-21 11:08 ` [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated Johan Jonker
@ 2023-01-22 13:53 ` Krzysztof Kozlowski
2023-01-26 13:45 ` Linus Walleij
2023-02-06 11:26 ` Linus Walleij
2 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-01-22 13:53 UTC (permalink / raw)
To: Johan Jonker, linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
On 21/01/2023 12:08, Johan Jonker wrote:
> Mark gpio sub nodes of pinctrl as deprecated.
> Gpio nodes are now placed in the root of the device tree.
> The relation to pinctrl is now described with the
> "gpio-ranges" property.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
2023-01-21 11:08 ` [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated Johan Jonker
2023-01-22 13:53 ` Krzysztof Kozlowski
@ 2023-01-26 13:45 ` Linus Walleij
2023-02-05 17:20 ` Johan Jonker
2023-02-06 11:26 ` Linus Walleij
2 siblings, 1 reply; 26+ messages in thread
From: Linus Walleij @ 2023-01-26 13:45 UTC (permalink / raw)
To: Johan Jonker
Cc: brgl, robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kever.yang, sjg, philipp.tomsich, john, quentin.schulz
On Sat, Jan 21, 2023 at 12:08 PM Johan Jonker <jbx6244@gmail.com> wrote:
> Mark gpio sub nodes of pinctrl as deprecated.
> Gpio nodes are now placed in the root of the device tree.
> The relation to pinctrl is now described with the
> "gpio-ranges" property.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Do you want me to simply merge this patch to the pinctrl tree?
Yours,
Linus Walleij
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
2023-01-26 13:45 ` Linus Walleij
@ 2023-02-05 17:20 ` Johan Jonker
0 siblings, 0 replies; 26+ messages in thread
From: Johan Jonker @ 2023-02-05 17:20 UTC (permalink / raw)
To: heiko
Cc: Linus Walleij, brgl, robh+dt, krzysztof.kozlowski+dt, linux-gpio,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kever.yang, sjg, philipp.tomsich, john, quentin.schulz
On 1/26/23 14:45, Linus Walleij wrote:
> On Sat, Jan 21, 2023 at 12:08 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
>> Mark gpio sub nodes of pinctrl as deprecated.
>> Gpio nodes are now placed in the root of the device tree.
>> The relation to pinctrl is now described with the
>> "gpio-ranges" property.
>>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>
> Do you want me to simply merge this patch to the pinctrl tree?
Hi Heiko,
Any last minute feedback possible?
If this patch suits then maybe give a ack for Linus?
Johan
>
> Yours,
> Linus Walleij
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
2023-01-21 11:08 ` [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated Johan Jonker
2023-01-22 13:53 ` Krzysztof Kozlowski
2023-01-26 13:45 ` Linus Walleij
@ 2023-02-06 11:26 ` Linus Walleij
2 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2023-02-06 11:26 UTC (permalink / raw)
To: Johan Jonker
Cc: brgl, robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kever.yang, sjg, philipp.tomsich, john, quentin.schulz
On Sat, Jan 21, 2023 at 12:08 PM Johan Jonker <jbx6244@gmail.com> wrote:
> Mark gpio sub nodes of pinctrl as deprecated.
> Gpio nodes are now placed in the root of the device tree.
> The relation to pinctrl is now described with the
> "gpio-ranges" property.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
This patch applied to the pinctrl tree.
Yours,
Linus Walleij
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
2023-01-21 11:08 ` [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated Johan Jonker
@ 2023-01-21 11:08 ` Johan Jonker
2023-01-26 13:47 ` Linus Walleij
2023-03-02 3:29 ` Kever Yang
2023-01-21 11:08 ` [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes Johan Jonker
` (8 subsequent siblings)
10 siblings, 2 replies; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:08 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
Parse the gpio-ranges property in Rockchip gpio nodes to be
independent from aliases and probe order for our bank id.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
drivers/gpio/gpio-rockchip.c | 24 ++++++++++++++++++------
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index e5de15a2a..df74b71aa 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -702,24 +702,36 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
- struct device_node *pctlnp = of_get_parent(np);
+ struct device_node *pctlnp;
struct pinctrl_dev *pctldev = NULL;
struct rockchip_pin_bank *bank = NULL;
struct rockchip_pin_deferred *cfg;
+ struct of_phandle_args args;
static int gpio;
int id, ret;
- if (!np || !pctlnp)
+ if (!np)
+ return -ENODEV;
+
+ ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args);
+ if (ret == 0) {
+ pctlnp = args.np;
+ id = args.args[1] / 32;
+ } else {
+ pctlnp = of_get_parent(np);
+ id = of_alias_get_id(np, "gpio");
+ if (id < 0)
+ id = gpio++;
+ }
+
+ if (!pctlnp)
return -ENODEV;
pctldev = of_pinctrl_get(pctlnp);
+ of_node_put(pctlnp);
if (!pctldev)
return -EPROBE_DEFER;
- id = of_alias_get_id(np, "gpio");
- if (id < 0)
- id = gpio++;
-
bank = rockchip_gpio_find_bank(pctldev, id);
if (!bank)
return -EINVAL;
--
2.20.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id
2023-01-21 11:08 ` [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id Johan Jonker
@ 2023-01-26 13:47 ` Linus Walleij
2023-03-02 3:29 ` Kever Yang
1 sibling, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2023-01-26 13:47 UTC (permalink / raw)
To: Johan Jonker
Cc: brgl, robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kever.yang, sjg, philipp.tomsich, john, quentin.schulz
On Sat, Jan 21, 2023 at 12:08 PM Johan Jonker <jbx6244@gmail.com> wrote:
> Parse the gpio-ranges property in Rockchip gpio nodes to be
> independent from aliases and probe order for our bank id.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
I guess there is no pretty way to do this.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id
2023-01-21 11:08 ` [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id Johan Jonker
2023-01-26 13:47 ` Linus Walleij
@ 2023-03-02 3:29 ` Kever Yang
1 sibling, 0 replies; 26+ messages in thread
From: Kever Yang @ 2023-03-02 3:29 UTC (permalink / raw)
To: Johan Jonker, linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, sjg,
philipp.tomsich, john, quentin.schulz
Hi Johan,
On 2023/1/21 19:08, Johan Jonker wrote:
> Parse the gpio-ranges property in Rockchip gpio nodes to be
> independent from aliases and probe order for our bank id.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Looks good to me.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> drivers/gpio/gpio-rockchip.c | 24 ++++++++++++++++++------
> 1 file changed, 18 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
> index e5de15a2a..df74b71aa 100644
> --- a/drivers/gpio/gpio-rockchip.c
> +++ b/drivers/gpio/gpio-rockchip.c
> @@ -702,24 +702,36 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> struct device_node *np = dev->of_node;
> - struct device_node *pctlnp = of_get_parent(np);
> + struct device_node *pctlnp;
> struct pinctrl_dev *pctldev = NULL;
> struct rockchip_pin_bank *bank = NULL;
> struct rockchip_pin_deferred *cfg;
> + struct of_phandle_args args;
> static int gpio;
> int id, ret;
>
> - if (!np || !pctlnp)
> + if (!np)
> + return -ENODEV;
> +
> + ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args);
> + if (ret == 0) {
> + pctlnp = args.np;
> + id = args.args[1] / 32;
> + } else {
> + pctlnp = of_get_parent(np);
> + id = of_alias_get_id(np, "gpio");
> + if (id < 0)
> + id = gpio++;
> + }
> +
> + if (!pctlnp)
> return -ENODEV;
>
> pctldev = of_pinctrl_get(pctlnp);
> + of_node_put(pctlnp);
> if (!pctldev)
> return -EPROBE_DEFER;
>
> - id = of_alias_get_id(np, "gpio");
> - if (id < 0)
> - id = gpio++;
> -
> bank = rockchip_gpio_find_bank(pctldev, id);
> if (!bank)
> return -EINVAL;
> --
> 2.20.1
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
2023-01-21 11:08 ` [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated Johan Jonker
2023-01-21 11:08 ` [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id Johan Jonker
@ 2023-01-21 11:08 ` Johan Jonker
2023-03-02 6:37 ` Kever Yang
2023-01-21 11:09 ` [PATCH v2 5/8] arm64: " Johan Jonker
` (7 subsequent siblings)
10 siblings, 1 reply; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:08 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
Add a gpio-ranges property to Rockchip gpio nodes to be
independent from aliases and probe order for our bank id.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Number of pins per bank not checked with datasheet.
Use default 32 for now.
---
arch/arm/boot/dts/rk3036.dtsi | 3 +++
arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++
arch/arm/boot/dts/rk3128.dtsi | 4 ++++
arch/arm/boot/dts/rk3188.dtsi | 4 ++++
arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++
arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++
arch/arm/boot/dts/rv1108.dtsi | 4 ++++
arch/arm/boot/dts/rv1126.dtsi | 5 +++++
8 files changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 78686fc72..d99e4ea31 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -582,6 +582,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -595,6 +596,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -608,6 +610,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index de9915d94..6ff392735 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -280,6 +280,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -293,6 +294,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -306,6 +308,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -319,6 +322,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -332,6 +336,7 @@
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -345,6 +350,7 @@
clocks = <&cru PCLK_GPIO6>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 192 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi
index b63bd4ad3..0ea277eb7 100644
--- a/arch/arm/boot/dts/rk3128.dtsi
+++ b/arch/arm/boot/dts/rk3128.dtsi
@@ -476,6 +476,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -487,6 +488,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -498,6 +500,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -509,6 +512,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 44b54af0b..6677e4a10 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -231,6 +231,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -244,6 +245,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -257,6 +259,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -270,6 +273,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index ffc16d6b9..a87db48c5 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -955,10 +955,12 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ rockchip,gpio-controller = <0>;
};
gpio1: gpio@11120000 {
@@ -968,10 +970,12 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ rockchip,gpio-controller = <1>;
};
gpio2: gpio@11130000 {
@@ -981,10 +985,12 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ rockchip,gpio-controller = <2>;
};
gpio3: gpio@11140000 {
@@ -994,10 +1000,12 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ rockchip,gpio-controller = <3>;
};
pcfg_pull_up: pcfg-pull-up {
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2ca76b69a..20567ca98 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1431,6 +1431,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1444,6 +1445,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1457,6 +1459,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1470,6 +1473,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1483,6 +1487,7 @@
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1496,6 +1501,7 @@
clocks = <&cru PCLK_GPIO5>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 160 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1509,6 +1515,7 @@
clocks = <&cru PCLK_GPIO6>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 192 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1522,6 +1529,7 @@
clocks = <&cru PCLK_GPIO7>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 224 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1535,6 +1543,7 @@
clocks = <&cru PCLK_GPIO8>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 256 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index abf3006f0..d12b97ee7 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -602,6 +602,7 @@
clocks = <&cru PCLK_GPIO0_PMU>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -615,6 +616,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -628,6 +630,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -641,6 +644,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 1f07d0a4f..68e820221 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -433,6 +433,7 @@
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -444,6 +445,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -455,6 +457,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -466,6 +469,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -477,6 +481,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.20.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes
2023-01-21 11:08 ` [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes Johan Jonker
@ 2023-03-02 6:37 ` Kever Yang
0 siblings, 0 replies; 26+ messages in thread
From: Kever Yang @ 2023-03-02 6:37 UTC (permalink / raw)
To: Johan Jonker, linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, sjg,
philipp.tomsich, john, quentin.schulz
On 2023/1/21 19:08, Johan Jonker wrote:
> Add a gpio-ranges property to Rockchip gpio nodes to be
> independent from aliases and probe order for our bank id.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Looks good to me, GPIO controller has 32 pin each bank, even if there
may have some empty bits.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
>
> Number of pins per bank not checked with datasheet.
> Use default 32 for now.
> ---
> arch/arm/boot/dts/rk3036.dtsi | 3 +++
> arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++
> arch/arm/boot/dts/rk3128.dtsi | 4 ++++
> arch/arm/boot/dts/rk3188.dtsi | 4 ++++
> arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++
> arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++
> arch/arm/boot/dts/rv1108.dtsi | 4 ++++
> arch/arm/boot/dts/rv1126.dtsi | 5 +++++
> 8 files changed, 43 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index 78686fc72..d99e4ea31 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -582,6 +582,7 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -595,6 +596,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -608,6 +610,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
> index de9915d94..6ff392735 100644
> --- a/arch/arm/boot/dts/rk3066a.dtsi
> +++ b/arch/arm/boot/dts/rk3066a.dtsi
> @@ -280,6 +280,7 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -293,6 +294,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -306,6 +308,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -319,6 +322,7 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -332,6 +336,7 @@
> clocks = <&cru PCLK_GPIO4>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -345,6 +350,7 @@
> clocks = <&cru PCLK_GPIO6>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 192 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi
> index b63bd4ad3..0ea277eb7 100644
> --- a/arch/arm/boot/dts/rk3128.dtsi
> +++ b/arch/arm/boot/dts/rk3128.dtsi
> @@ -476,6 +476,7 @@
> interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO0>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -487,6 +488,7 @@
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -498,6 +500,7 @@
> interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -509,6 +512,7 @@
> interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
> index 44b54af0b..6677e4a10 100644
> --- a/arch/arm/boot/dts/rk3188.dtsi
> +++ b/arch/arm/boot/dts/rk3188.dtsi
> @@ -231,6 +231,7 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -244,6 +245,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -257,6 +259,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -270,6 +273,7 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
> index ffc16d6b9..a87db48c5 100644
> --- a/arch/arm/boot/dts/rk322x.dtsi
> +++ b/arch/arm/boot/dts/rk322x.dtsi
> @@ -955,10 +955,12 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> #interrupt-cells = <2>;
> + rockchip,gpio-controller = <0>;
> };
>
> gpio1: gpio@11120000 {
> @@ -968,10 +970,12 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> #interrupt-cells = <2>;
> + rockchip,gpio-controller = <1>;
> };
>
> gpio2: gpio@11130000 {
> @@ -981,10 +985,12 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> #interrupt-cells = <2>;
> + rockchip,gpio-controller = <2>;
> };
>
> gpio3: gpio@11140000 {
> @@ -994,10 +1000,12 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> #interrupt-cells = <2>;
> + rockchip,gpio-controller = <3>;
> };
>
> pcfg_pull_up: pcfg-pull-up {
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 2ca76b69a..20567ca98 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -1431,6 +1431,7 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1444,6 +1445,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1457,6 +1459,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1470,6 +1473,7 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1483,6 +1487,7 @@
> clocks = <&cru PCLK_GPIO4>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1496,6 +1501,7 @@
> clocks = <&cru PCLK_GPIO5>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 160 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1509,6 +1515,7 @@
> clocks = <&cru PCLK_GPIO6>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 192 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1522,6 +1529,7 @@
> clocks = <&cru PCLK_GPIO7>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 224 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1535,6 +1543,7 @@
> clocks = <&cru PCLK_GPIO8>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 256 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
> index abf3006f0..d12b97ee7 100644
> --- a/arch/arm/boot/dts/rv1108.dtsi
> +++ b/arch/arm/boot/dts/rv1108.dtsi
> @@ -602,6 +602,7 @@
> clocks = <&cru PCLK_GPIO0_PMU>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -615,6 +616,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -628,6 +630,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -641,6 +644,7 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
> index 1f07d0a4f..68e820221 100644
> --- a/arch/arm/boot/dts/rv1126.dtsi
> +++ b/arch/arm/boot/dts/rv1126.dtsi
> @@ -433,6 +433,7 @@
> interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -444,6 +445,7 @@
> interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -455,6 +457,7 @@
> interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -466,6 +469,7 @@
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -477,6 +481,7 @@
> interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> --
> 2.20.1
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 5/8] arm64: dts: rockchip: add gpio-ranges property to gpio nodes
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (2 preceding siblings ...)
2023-01-21 11:08 ` [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes Johan Jonker
@ 2023-01-21 11:09 ` Johan Jonker
2023-03-02 6:38 ` Kever Yang
2023-01-21 11:09 ` [PATCH v2 6/8] ARM: dts: rockchip: replace compatible " Johan Jonker
` (6 subsequent siblings)
10 siblings, 1 reply; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:09 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
Add a gpio-ranges property to Rockchip gpio nodes to be
independent from aliases and probe order for our bank id.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Number of pins per bank not checked with datasheet.
Use default 32 for now.
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++
6 files changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 4f6959eb5..9fcc0d0f3 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1387,6 +1387,7 @@
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1399,6 +1400,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1411,6 +1413,7 @@
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1423,6 +1426,7 @@
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index dd228a256..38976f413 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -798,6 +798,7 @@
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -809,6 +810,7 @@
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -820,6 +822,7 @@
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -831,6 +834,7 @@
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -842,6 +846,7 @@
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 6d7a7bf72..7ba695728 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1051,6 +1051,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1064,6 +1065,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1077,6 +1079,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1090,6 +1093,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a4c5aaf1f..5a008ed18 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -984,6 +984,7 @@
interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -997,6 +998,7 @@
interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -1010,6 +1012,7 @@
interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -1023,6 +1026,7 @@
interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <0x2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 1881b4b71..7eb96fcc6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2091,6 +2091,7 @@
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2104,6 +2105,7 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2117,6 +2119,7 @@
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2130,6 +2133,7 @@
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2143,6 +2147,7 @@
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <0x2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index eed0059a6..870b4d9c6 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1808,6 +1808,7 @@
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1819,6 +1820,7 @@
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1830,6 +1832,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1841,6 +1844,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1852,6 +1856,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.20.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 5/8] arm64: dts: rockchip: add gpio-ranges property to gpio nodes
2023-01-21 11:09 ` [PATCH v2 5/8] arm64: " Johan Jonker
@ 2023-03-02 6:38 ` Kever Yang
0 siblings, 0 replies; 26+ messages in thread
From: Kever Yang @ 2023-03-02 6:38 UTC (permalink / raw)
To: Johan Jonker, linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, sjg,
philipp.tomsich, john, quentin.schulz
On 2023/1/21 19:09, Johan Jonker wrote:
> Add a gpio-ranges property to Rockchip gpio nodes to be
> independent from aliases and probe order for our bank id.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Looks good to me, GPIO controller has 32 pin each bank, even if there
may have some empty bits.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
>
> Number of pins per bank not checked with datasheet.
> Use default 32 for now.
> ---
> arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++
> arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++
> arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++
> 6 files changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
> index 4f6959eb5..9fcc0d0f3 100644
> --- a/arch/arm64/boot/dts/rockchip/px30.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
> @@ -1387,6 +1387,7 @@
> interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&pmucru PCLK_GPIO0_PMU>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1399,6 +1400,7 @@
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1411,6 +1413,7 @@
> interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1423,6 +1426,7 @@
> interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> index dd228a256..38976f413 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> @@ -798,6 +798,7 @@
> interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO0>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -809,6 +810,7 @@
> interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -820,6 +822,7 @@
> interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -831,6 +834,7 @@
> interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -842,6 +846,7 @@
> interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO4>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 6d7a7bf72..7ba695728 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -1051,6 +1051,7 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1064,6 +1065,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1077,6 +1079,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1090,6 +1093,7 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index a4c5aaf1f..5a008ed18 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -984,6 +984,7 @@
> interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -997,6 +998,7 @@
> interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -1010,6 +1012,7 @@
> interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -1023,6 +1026,7 @@
> interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 1881b4b71..7eb96fcc6 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -2091,6 +2091,7 @@
> interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2104,6 +2105,7 @@
> interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2117,6 +2119,7 @@
> interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2130,6 +2133,7 @@
> interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2143,6 +2147,7 @@
> interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index eed0059a6..870b4d9c6 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -1808,6 +1808,7 @@
> interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1819,6 +1820,7 @@
> interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1830,6 +1832,7 @@
> interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1841,6 +1844,7 @@
> interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1852,6 +1856,7 @@
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> --
> 2.20.1
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v2 6/8] ARM: dts: rockchip: replace compatible gpio nodes
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (3 preceding siblings ...)
2023-01-21 11:09 ` [PATCH v2 5/8] arm64: " Johan Jonker
@ 2023-01-21 11:09 ` Johan Jonker
2023-01-21 11:09 ` [PATCH v2 7/8] arm64: " Johan Jonker
` (5 subsequent siblings)
10 siblings, 0 replies; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:09 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/boot/dts/rk3036.dtsi | 6 +++---
arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------
arch/arm/boot/dts/rk3128.dtsi | 8 ++++----
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
arch/arm/boot/dts/rk322x.dtsi | 8 ++++----
arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++---------
arch/arm/boot/dts/rv1108.dtsi | 8 ++++----
arch/arm/boot/dts/rv1126.dtsi | 10 +++++-----
8 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index d99e4ea31..eed21e055 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -576,7 +576,7 @@
ranges;
gpio0: gpio@2007c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -590,7 +590,7 @@
};
gpio1: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -604,7 +604,7 @@
};
gpio2: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 6ff392735..4d7cf6f1b 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -274,7 +274,7 @@
ranges;
gpio0: gpio@20034000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x20034000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -288,7 +288,7 @@
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -302,7 +302,7 @@
};
gpio2: gpio@2003e000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -316,7 +316,7 @@
};
gpio3: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -330,7 +330,7 @@
};
gpio4: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -344,7 +344,7 @@
};
gpio6: gpio@2000a000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi
index 0ea277eb7..221f6d6ca 100644
--- a/arch/arm/boot/dts/rk3128.dtsi
+++ b/arch/arm/boot/dts/rk3128.dtsi
@@ -471,7 +471,7 @@
ranges;
gpio0: gpio@2007c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -483,7 +483,7 @@
};
gpio1: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -495,7 +495,7 @@
};
gpio2: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -507,7 +507,7 @@
};
gpio3: gpio@20088000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x20088000 0x100>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 6677e4a10..22187d4c7 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -239,7 +239,7 @@
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -253,7 +253,7 @@
};
gpio2: gpio@2003e000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -267,7 +267,7 @@
};
gpio3: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index a87db48c5..8dc30e45c 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -949,7 +949,7 @@
ranges;
gpio0: gpio@11110000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11110000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -964,7 +964,7 @@
};
gpio1: gpio@11120000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11120000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -979,7 +979,7 @@
};
gpio2: gpio@11130000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11130000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -994,7 +994,7 @@
};
gpio3: gpio@11140000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11140000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 20567ca98..3aff5955d 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1425,7 +1425,7 @@
ranges;
gpio0: gpio@ff750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1439,7 +1439,7 @@
};
gpio1: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1453,7 +1453,7 @@
};
gpio2: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1467,7 +1467,7 @@
};
gpio3: gpio@ff7a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -1481,7 +1481,7 @@
};
gpio4: gpio@ff7b0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -1495,7 +1495,7 @@
};
gpio5: gpio@ff7c0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO5>;
@@ -1509,7 +1509,7 @@
};
gpio6: gpio@ff7d0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
@@ -1523,7 +1523,7 @@
};
gpio7: gpio@ff7e0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO7>;
@@ -1537,7 +1537,7 @@
};
gpio8: gpio@ff7f0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO8>;
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index d12b97ee7..49c33a393 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -596,7 +596,7 @@
ranges;
gpio0: gpio@20030000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x20030000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0_PMU>;
@@ -610,7 +610,7 @@
};
gpio1: gpio@10310000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x10310000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -624,7 +624,7 @@
};
gpio2: gpio@10320000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x10320000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -638,7 +638,7 @@
};
gpio3: gpio@10330000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x10330000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 68e820221..68759c59a 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -428,7 +428,7 @@
ranges;
gpio0: gpio@ff460000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff460000 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -440,7 +440,7 @@
};
gpio1: gpio@ff620000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff620000 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -452,7 +452,7 @@
};
gpio2: gpio@ff630000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff630000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -464,7 +464,7 @@
};
gpio3: gpio@ff640000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff640000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -476,7 +476,7 @@
};
gpio4: gpio@ff650000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff650000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
--
2.20.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 7/8] arm64: dts: rockchip: replace compatible gpio nodes
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (4 preceding siblings ...)
2023-01-21 11:09 ` [PATCH v2 6/8] ARM: dts: rockchip: replace compatible " Johan Jonker
@ 2023-01-21 11:09 ` Johan Jonker
2023-01-21 11:10 ` [PATCH v2 8/8] ARM: dts: rockchip: rk3066a: move gpio nodes to root Johan Jonker
` (4 subsequent siblings)
10 siblings, 0 replies; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:09 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 +++++-----
7 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 9fcc0d0f3..5f8886623 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1382,7 +1382,7 @@
ranges;
gpio0: gpio@ff040000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff040000 0x0 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
@@ -1395,7 +1395,7 @@
};
gpio1: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1408,7 +1408,7 @@
};
gpio2: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1421,7 +1421,7 @@
};
gpio3: gpio@ff270000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff270000 0x0 0x100>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 38976f413..1e5742441 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -793,7 +793,7 @@
ranges;
gpio0: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -805,7 +805,7 @@
};
gpio1: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -817,7 +817,7 @@
};
gpio2: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -829,7 +829,7 @@
};
gpio3: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -841,7 +841,7 @@
};
gpio4: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 7ba695728..b99bef14f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1045,7 +1045,7 @@
ranges;
gpio0: gpio@ff210000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1059,7 +1059,7 @@
};
gpio1: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1073,7 +1073,7 @@
};
gpio2: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1087,7 +1087,7 @@
};
gpio3: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 5a008ed18..1ece57343 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -978,7 +978,7 @@
ranges;
gpio0: gpio@ff750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
clocks = <&cru PCLK_GPIO0>;
interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
@@ -992,7 +992,7 @@
};
gpio1: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO1>;
interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
@@ -1006,7 +1006,7 @@
};
gpio2: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1020,7 +1020,7 @@
};
gpio3: gpio@ff7a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7eb96fcc6..e60917fff 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2085,7 +2085,7 @@
ranges;
gpio0: gpio@ff720000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff720000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2099,7 +2099,7 @@
};
gpio1: gpio@ff730000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff730000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO1_PMU>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2113,7 +2113,7 @@
};
gpio2: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2127,7 +2127,7 @@
};
gpio3: gpio@ff788000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff788000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2141,7 +2141,7 @@
};
gpio4: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO4>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 870b4d9c6..892afccfd 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1803,7 +1803,7 @@
ranges;
gpio0: gpio@fdd60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfdd60000 0x0 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -1815,7 +1815,7 @@
};
gpio1: gpio@fe740000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe740000 0x0 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1827,7 +1827,7 @@
};
gpio2: gpio@fe750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe750000 0x0 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1839,7 +1839,7 @@
};
gpio3: gpio@fe760000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe760000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1851,7 +1851,7 @@
};
gpio4: gpio@fe770000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe770000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 005cde61b..09bd4a508 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1639,7 +1639,7 @@
#size-cells = <2>;
gpio0: gpio@fd8a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfd8a0000 0x0 0x100>;
interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
@@ -1651,7 +1651,7 @@
};
gpio1: gpio@fec20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec20000 0x0 0x100>;
interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1663,7 +1663,7 @@
};
gpio2: gpio@fec30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec30000 0x0 0x100>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1675,7 +1675,7 @@
};
gpio3: gpio@fec40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec40000 0x0 0x100>;
interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1687,7 +1687,7 @@
};
gpio4: gpio@fec50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec50000 0x0 0x100>;
interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
--
2.20.1
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 8/8] ARM: dts: rockchip: rk3066a: move gpio nodes to root
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (5 preceding siblings ...)
2023-01-21 11:09 ` [PATCH v2 7/8] arm64: " Johan Jonker
@ 2023-01-21 11:10 ` Johan Jonker
2023-01-22 13:52 ` [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Krzysztof Kozlowski
` (3 subsequent siblings)
10 siblings, 0 replies; 26+ messages in thread
From: Johan Jonker @ 2023-01-21 11:10 UTC (permalink / raw)
To: linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
The relation between gpio and pinctrl is now described
by the gpio-ranges property. Move rk3066a gpio nodes to root.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/boot/dts/rk3066a.dtsi | 159 +++++++++++++++------------------
1 file changed, 72 insertions(+), 87 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 4d7cf6f1b..ac329cf14 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -217,6 +217,18 @@
<150000000>, <75000000>;
};
+ gpio6: gpio@2000a000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x2000a000 0x100>;
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO6>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 192 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
timer2: timer@2000e000 {
compatible = "snps,dw-apb-timer";
reg = <0x2000e000 0x100>;
@@ -238,6 +250,18 @@
};
};
+ gpio0: gpio@20034000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x20034000 0x100>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO0>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
timer0: timer@20038000 {
compatible = "snps,dw-apb-timer";
reg = <0x20038000 0x100>;
@@ -254,6 +278,30 @@
clock-names = "timer", "pclk";
};
+ gpio1: gpio@2003c000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x2003c000 0x100>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO1>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@2003e000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x2003e000 0x100>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO2>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
tsadc: tsadc@20060000 {
compatible = "rockchip,rk3066-tsadc";
reg = <0x20060000 0x100>;
@@ -266,96 +314,33 @@
status = "disabled";
};
+ gpio3: gpio@20080000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x20080000 0x100>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO3>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@20084000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x20084000 0x100>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO4>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3066a-pinctrl";
rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio@20034000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x20034000 0x100>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO0>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 0 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@2003c000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x2003c000 0x100>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO1>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 32 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@2003e000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x2003e000 0x100>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO2>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 64 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@20080000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x20080000 0x100>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO3>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 96 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio4: gpio@20084000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x20084000 0x100>;
- interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO4>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 128 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio6: gpio@2000a000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x2000a000 0x100>;
- interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO6>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 192 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
pcfg_pull_default: pcfg-pull-default {
bias-pull-pin-default;
--
2.20.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (6 preceding siblings ...)
2023-01-21 11:10 ` [PATCH v2 8/8] ARM: dts: rockchip: rk3066a: move gpio nodes to root Johan Jonker
@ 2023-01-22 13:52 ` Krzysztof Kozlowski
2023-01-26 13:44 ` Linus Walleij
` (2 subsequent siblings)
10 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-01-22 13:52 UTC (permalink / raw)
To: Johan Jonker, linus.walleij, brgl
Cc: robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
On 21/01/2023 12:06, Johan Jonker wrote:
> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> .../bindings/gpio/rockchip,gpio-bank.yaml | 26 ++++++++++++++++---
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> index affd823c8..a604c3638 100644
> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> @@ -11,9 +11,27 @@ maintainers:
>
> properties:
> compatible:
> - enum:
> - - rockchip,gpio-bank
> - - rockchip,rk3188-gpio-bank0
> + oneOf:
> + - const: rockchip,gpio-bank
> + - const: rockchip,rk3188-gpio-bank0
That's an enum so keep them like that
> + - items:
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (7 preceding siblings ...)
2023-01-22 13:52 ` [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Krzysztof Kozlowski
@ 2023-01-26 13:44 ` Linus Walleij
2023-02-08 11:08 ` Linus Walleij
2023-02-15 21:01 ` [PATCH v3] " Johan Jonker
10 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2023-01-26 13:44 UTC (permalink / raw)
To: Johan Jonker
Cc: brgl, robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kever.yang, sjg, philipp.tomsich, john, quentin.schulz
On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (8 preceding siblings ...)
2023-01-26 13:44 ` Linus Walleij
@ 2023-02-08 11:08 ` Linus Walleij
2023-02-10 20:03 ` Bartosz Golaszewski
2023-02-15 21:01 ` [PATCH v3] " Johan Jonker
10 siblings, 1 reply; 26+ messages in thread
From: Linus Walleij @ 2023-02-08 11:08 UTC (permalink / raw)
To: Johan Jonker
Cc: brgl, robh+dt, krzysztof.kozlowski+dt, heiko, linux-gpio,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kever.yang, sjg, philipp.tomsich, john, quentin.schulz
On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Bartosz can you merge this one patch and keep the rest back
so we get a more defined DT binding baseline?
Yours,
Linus Walleij
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-02-08 11:08 ` Linus Walleij
@ 2023-02-10 20:03 ` Bartosz Golaszewski
2023-02-12 16:14 ` Krzysztof Kozlowski
0 siblings, 1 reply; 26+ messages in thread
From: Bartosz Golaszewski @ 2023-02-10 20:03 UTC (permalink / raw)
To: Linus Walleij, krzysztof.kozlowski+dt
Cc: Johan Jonker, robh+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
>
> > Currently all Rockchip gpio nodes have the same compatible.
> > Compatible strings should be SoC related.
> >
> > Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>
> Bartosz can you merge this one patch and keep the rest back
> so we get a more defined DT binding baseline?
>
> Yours,
> Linus Walleij
Krzysztof, you left your ack but seem to also have pointed out an
issue - do you want me to fix it up somehow before applying? Drop the
oneOf and turn it back into an enum?
Bart
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-02-10 20:03 ` Bartosz Golaszewski
@ 2023-02-12 16:14 ` Krzysztof Kozlowski
2023-02-15 15:02 ` Bartosz Golaszewski
0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-12 16:14 UTC (permalink / raw)
To: Bartosz Golaszewski, Linus Walleij, krzysztof.kozlowski+dt
Cc: Johan Jonker, robh+dt, heiko, linux-gpio, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel, kever.yang, sjg,
philipp.tomsich, john, quentin.schulz
On 10/02/2023 21:03, Bartosz Golaszewski wrote:
> On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>>
>> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
>>
>>> Currently all Rockchip gpio nodes have the same compatible.
>>> Compatible strings should be SoC related.
>>>
>>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>>
>> Bartosz can you merge this one patch and keep the rest back
>> so we get a more defined DT binding baseline?
>>
>> Yours,
>> Linus Walleij
>
> Krzysztof, you left your ack but seem to also have pointed out an
> issue - do you want me to fix it up somehow before applying? Drop the
> oneOf and turn it back into an enum?
Sure, you can apply with my comment fixed but then just please check
with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that
indentation is not mixed up.
Best regards,
Krzysztof
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-02-12 16:14 ` Krzysztof Kozlowski
@ 2023-02-15 15:02 ` Bartosz Golaszewski
2023-02-15 16:14 ` Johan Jonker
0 siblings, 1 reply; 26+ messages in thread
From: Bartosz Golaszewski @ 2023-02-15 15:02 UTC (permalink / raw)
To: Johan Jonker
Cc: Linus Walleij, krzysztof.kozlowski+dt, robh+dt, heiko,
linux-gpio, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, kever.yang, sjg, philipp.tomsich, john,
quentin.schulz, Krzysztof Kozlowski
On Sun, Feb 12, 2023 at 5:14 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 10/02/2023 21:03, Bartosz Golaszewski wrote:
> > On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> >>
> >> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
> >>
> >>> Currently all Rockchip gpio nodes have the same compatible.
> >>> Compatible strings should be SoC related.
> >>>
> >>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> >>
> >> Bartosz can you merge this one patch and keep the rest back
> >> so we get a more defined DT binding baseline?
> >>
> >> Yours,
> >> Linus Walleij
> >
> > Krzysztof, you left your ack but seem to also have pointed out an
> > issue - do you want me to fix it up somehow before applying? Drop the
> > oneOf and turn it back into an enum?
>
>
> Sure, you can apply with my comment fixed but then just please check
> with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that
> indentation is not mixed up.
>
> Best regards,
> Krzysztof
>
I prefer to get your ack on the final version really.
Johan, please address the enum issue and resend just this patch.
Bart
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-02-15 15:02 ` Bartosz Golaszewski
@ 2023-02-15 16:14 ` Johan Jonker
2023-02-15 20:15 ` Krzysztof Kozlowski
0 siblings, 1 reply; 26+ messages in thread
From: Johan Jonker @ 2023-02-15 16:14 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Linus Walleij, krzysztof.kozlowski+dt, robh+dt, heiko,
linux-gpio, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, kever.yang, sjg, philipp.tomsich, john,
quentin.schulz, Krzysztof Kozlowski
On 2/15/23 16:02, Bartosz Golaszewski wrote:
> On Sun, Feb 12, 2023 at 5:14 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 10/02/2023 21:03, Bartosz Golaszewski wrote:
>>> On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>>>>
>>>> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote:
>>>>
>>>>> Currently all Rockchip gpio nodes have the same compatible.
>>>>> Compatible strings should be SoC related.
>>>>>
>>>>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>>>>
>>>> Bartosz can you merge this one patch and keep the rest back
>>>> so we get a more defined DT binding baseline?
>>>>
>>>> Yours,
>>>> Linus Walleij
>>>
>>> Krzysztof, you left your ack but seem to also have pointed out an
>>> issue - do you want me to fix it up somehow before applying? Drop the
>>> oneOf and turn it back into an enum?
>>
>>
>> Sure, you can apply with my comment fixed but then just please check
>> with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that
>> indentation is not mixed up.
>>
>> Best regards,
>> Krzysztof
>>
>
> I prefer to get your ack on the final version really.
>
> Johan, please address the enum issue and resend just this patch.
I changed to oneOf, because with enum I didn't get it working.
With 2 enum's it complains about: is not of type 'string'.
I'm out of ideas...
Maybe it's something simple that I overlook.
Could Krzysztof give an example?
Johan
>
> Bart
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-02-15 16:14 ` Johan Jonker
@ 2023-02-15 20:15 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-15 20:15 UTC (permalink / raw)
To: Johan Jonker, Bartosz Golaszewski
Cc: Linus Walleij, krzysztof.kozlowski+dt, robh+dt, heiko,
linux-gpio, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, kever.yang, sjg, philipp.tomsich, john,
quentin.schulz
On 15/02/2023 17:14, Johan Jonker wrote:
>
>> Johan, please address the enum issue and resend just this patch.
>
> I changed to oneOf, because with enum I didn't get it working.
> With 2 enum's it complains about: is not of type 'string'.
> I'm out of ideas...
> Maybe it's something simple that I overlook.
> Could Krzysztof give an example?
Documentation/devicetree/bindings/arm/l2c2x0.yaml
It should look like this, if my email did not mess up indents:
+ oneOf:
+ - enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+ - items:
+ - enum:
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v3] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
` (9 preceding siblings ...)
2023-02-08 11:08 ` Linus Walleij
@ 2023-02-15 21:01 ` Johan Jonker
2023-02-16 10:41 ` Krzysztof Kozlowski
10 siblings, 1 reply; 26+ messages in thread
From: Johan Jonker @ 2023-02-15 21:01 UTC (permalink / raw)
To: brgl
Cc: linus.walleij, robh+dt, krzysztof.kozlowski+dt, heiko,
linux-gpio, devicetree, linux-kernel, linux-arm-kernel,
linux-rockchip
Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
Changed V3:
Keep enum
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 27 ++++++++++++++++---
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
index affd823c8..2e9a5179c 100644
--- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -11,9 +11,28 @@ maintainers:
properties:
compatible:
- enum:
- - rockchip,gpio-bank
- - rockchip,rk3188-gpio-bank0
+ oneOf:
+ - enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+ - items:
+ - enum:
+ - rockchip,px30-gpio-bank
+ - rockchip,rk3036-gpio-bank
+ - rockchip,rk3066a-gpio-bank
+ - rockchip,rk3128-gpio-bank
+ - rockchip,rk3188-gpio-bank
+ - rockchip,rk3228-gpio-bank
+ - rockchip,rk3288-gpio-bank
+ - rockchip,rk3328-gpio-bank
+ - rockchip,rk3308-gpio-bank
+ - rockchip,rk3368-gpio-bank
+ - rockchip,rk3399-gpio-bank
+ - rockchip,rk3568-gpio-bank
+ - rockchip,rk3588-gpio-bank
+ - rockchip,rv1108-gpio-bank
+ - rockchip,rv1126-gpio-bank
+ - const: rockchip,gpio-bank
reg:
maxItems: 1
@@ -75,7 +94,7 @@ examples:
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 10>;
--
2.20.1
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^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v3] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC
2023-02-15 21:01 ` [PATCH v3] " Johan Jonker
@ 2023-02-16 10:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-16 10:41 UTC (permalink / raw)
To: Johan Jonker, brgl
Cc: linus.walleij, robh+dt, krzysztof.kozlowski+dt, heiko,
linux-gpio, devicetree, linux-kernel, linux-arm-kernel,
linux-rockchip
On 15/02/2023 22:01, Johan Jonker wrote:
> Currently all Rockchip gpio nodes have the same compatible.
> Compatible strings should be SoC related.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 26+ messages in thread