[PATCH v4 0/5] Renesas SCI fixes

[PATCH v4 0/5] Renesas SCI fixes

[Biju Das]

RZ/G2UL SMARC EVK has sci pins exposed through PMOD1 interface.
On testing, found that irq handler, tx and rx is broken.

This series fixes these issues.

v3->v4:
 * Updated the fixes tag for patch#2 and patch#3
 * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift are only needed
   for sh770x/sh7750/sh7760, which don't use DT yet.
 * Dropped is_rz_sci variable from struct sci_port.
 * Removed fixes tag from patch#4, as it is a feature enhancement to make tx
   fully functional on RZ/G2L alike SOCs. With previous patch#3, eventhough
   we get tx interrupts, still it is broken as characters entered on
   uart terminal is not visible except for the first character.
 * Updated commit header sci0 nodes->sci0 node for patch#5 
 * Removed PMOD USBUART reference and connection details as user can connect
   anything on that PMOD1 pins.
 * Renamed r9a07g043-smarc.dtso->r9a07g043-smarc-pmod.dtso
 * Dropped unused header file dt-bindings/gpio/gpio.h
v2->v3:
 * Cced stable@vger.kernel.org
 * Added Rx, Tx and Tx end interrupt handler patch.
v1->v2:
 * Replaced the wrong fixes tag
 * Added a simpler check in sci_init_single() and added a check in
   probe to catch invalid interrupt count.
Tested the SCI0 interface on RZ/G2UL by connecting to PMOD USBUART.
 39:          0     GICv3 437 Level     1004d000.serial:rx err
 40:         12     GICv3 438 Edge      1004d000.serial:rx full
 41:         70     GICv3 439 Edge      1004d000.serial:tx empty
 42:         18     GICv3 440 Level     1004d000.serial:tx end

Biju Das (5):
  tty: serial: sh-sci: Fix transmit end interrupt handler
  tty: serial: sh-sci: Fix Rx on RZ/G2L SCI
  tty: serial: sh-sci: Fix Tx on SCI IP
  tty: serial: sh-sci: Add support for tx end interrupt handling
  arm64: dts: renesas: r9a07g044: Enable sci0 node using dt overlay

 arch/arm64/boot/dts/renesas/Makefile          |  1 +
 .../dts/renesas/r9a07g043-smarc-pmod.dtso     | 42 ++++++++++++
 drivers/tty/serial/sh-sci.c                   | 66 +++++++++++++++++--
 drivers/tty/serial/sh-sci.h                   |  3 +
 4 files changed, 106 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043-smarc-pmod.dtso

-- 
2.25.1

[PATCH v4 1/5] tty: serial: sh-sci: Fix transmit end interrupt handler

[Biju Das]

The fourth interrupt on SCI port is transmit end interrupt compared to
the break interrupt on other port types. So, shuffle the interrupts to fix
the transmit end interrupt handler.

Fixes: e1d0be616186 ("sh-sci: Add h8300 SCI")
Cc: stable@vger.kernel.org
Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v3->v4:
 * No change.
v2->v3:
 * Cced stable@vger.kernel.org
v1->v2:
 * Replaced the wrong fixes tag
 * Added a simpler check in sci_init_single() and added a check in
   probe to catch invalid interrupt count.
Tested the SCI0 interface on RZ/G2UL by connecting to PMOD USBUART.
 39:          0     GICv3 437 Level     1004d000.serial:rx err
 40:         12     GICv3 438 Edge      1004d000.serial:rx full
 41:         70     GICv3 439 Edge      1004d000.serial:tx empty
 42:         18     GICv3 440 Level     1004d000.serial:tx end
---
 drivers/tty/serial/sh-sci.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index af4a7a865764..616041faab55 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -31,6 +31,7 @@
 #include <linux/ioport.h>
 #include <linux/ktime.h>
 #include <linux/major.h>
+#include <linux/minmax.h>
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/of.h>
@@ -2864,6 +2865,13 @@ static int sci_init_single(struct platform_device *dev,
 			sci_port->irqs[i] = platform_get_irq(dev, i);
 	}
 
+	/*
+	 * The fourth interrupt on SCI port is transmit end interrupt, so
+	 * shuffle the interrupts.
+	 */
+	if (p->type == PORT_SCI)
+		swap(sci_port->irqs[SCIx_BRI_IRQ], sci_port->irqs[SCIx_TEI_IRQ]);
+
 	/* The SCI generates several interrupts. They can be muxed together or
 	 * connected to different interrupt lines. In the muxed case only one
 	 * interrupt resource is specified as there is only one interrupt ID.
-- 
2.25.1

Re: [PATCH v4 1/5] tty: serial: sh-sci: Fix transmit end interrupt handler

[Geert Uytterhoeven]

On Tue, Mar 21, 2023 at 12:48 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> The fourth interrupt on SCI port is transmit end interrupt compared to
> the break interrupt on other port types. So, shuffle the interrupts to fix
> the transmit end interrupt handler.
>
> Fixes: e1d0be616186 ("sh-sci: Add h8300 SCI")
> Cc: stable@vger.kernel.org
> Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v3->v4:
>  * No change.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Biju Das]

SCI IP on RZ/G2L alike SoCs do not need regshift compared to other SCI
IPs on the SH platform. Currently, it does regshift and configuring Rx
wrongly. Drop adding regshift for RZ/G2L alike SoCs.

Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift value for SCI ports")
Cc: stable@vger.kernel.org
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v3->v4:
 * Updated the fixes tag
 * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift are only needed
   for sh770x/sh7750/sh7760, which don't use DT yet.
 * Dropped is_rz_sci variable from struct sci_port.
v3:
 * New patch.
---
 drivers/tty/serial/sh-sci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 616041faab55..15954ca3e9dc 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -2937,7 +2937,7 @@ static int sci_init_single(struct platform_device *dev,
 	port->flags		= UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
 	port->fifosize		= sci_port->params->fifosize;
 
-	if (port->type == PORT_SCI) {
+	if (port->type == PORT_SCI && !dev->dev.of_node) {
 		if (sci_port->reg_size >= 0x20)
 			port->regshift = 2;
 		else
-- 
2.25.1

Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Geert Uytterhoeven]

On Tue, Mar 21, 2023 at 12:48 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> SCI IP on RZ/G2L alike SoCs do not need regshift compared to other SCI
> IPs on the SH platform. Currently, it does regshift and configuring Rx
> wrongly. Drop adding regshift for RZ/G2L alike SoCs.
>
> Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift value for SCI ports")
> Cc: stable@vger.kernel.org
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v3->v4:
>  * Updated the fixes tag
>  * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift are only needed
>    for sh770x/sh7750/sh7760, which don't use DT yet.
>  * Dropped is_rz_sci variable from struct sci_port.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

One can wonder how this ever worked on DT-based H8/300...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Biju Das]

Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI
> 
> On Tue, Mar 21, 2023 at 12:48 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > SCI IP on RZ/G2L alike SoCs do not need regshift compared to other SCI
> > IPs on the SH platform. Currently, it does regshift and configuring Rx
> > wrongly. Drop adding regshift for RZ/G2L alike SoCs.
> >
> > Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift value for
> > SCI ports")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > v3->v4:
> >  * Updated the fixes tag
> >  * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift are only
> needed
> >    for sh770x/sh7750/sh7760, which don't use DT yet.
> >  * Dropped is_rz_sci variable from struct sci_port.
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> One can wonder how this ever worked on DT-based H8/300...

Yep, it is interesting to see whether SCI ever worked on DT-based H8/300
Assuming it has same register layout as RZ/G2L SoC.

Cheers,
Biju

Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Greg Kroah-Hartman]

On Tue, Mar 28, 2023 at 11:32:38AM +0000, Biju Das wrote:
> Hi Geert,
> 
> Thanks for the feedback.
> 
> > Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI
> > 
> > On Tue, Mar 21, 2023 at 12:48 PM Biju Das <biju.das.jz@bp.renesas.com>
> > wrote:
> > > SCI IP on RZ/G2L alike SoCs do not need regshift compared to other SCI
> > > IPs on the SH platform. Currently, it does regshift and configuring Rx
> > > wrongly. Drop adding regshift for RZ/G2L alike SoCs.
> > >
> > > Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift value for
> > > SCI ports")
> > > Cc: stable@vger.kernel.org
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > ---
> > > v3->v4:
> > >  * Updated the fixes tag
> > >  * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift are only
> > needed
> > >    for sh770x/sh7750/sh7760, which don't use DT yet.
> > >  * Dropped is_rz_sci variable from struct sci_port.
> > 
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > 
> > One can wonder how this ever worked on DT-based H8/300...
> 
> Yep, it is interesting to see whether SCI ever worked on DT-based H8/300
> Assuming it has same register layout as RZ/G2L SoC.

This is already in Linus's tree now, right?

confused,

greg k-h

RE: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Biju Das]

Hi Greg,

Thanks for the feedback.

> Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI
> 
> On Tue, Mar 28, 2023 at 11:32:38AM +0000, Biju Das wrote:
> > Hi Geert,
> >
> > Thanks for the feedback.
> >
> > > Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L
> > > SCI
> > >
> > > On Tue, Mar 21, 2023 at 12:48 PM Biju Das
> > > <biju.das.jz@bp.renesas.com>
> > > wrote:
> > > > SCI IP on RZ/G2L alike SoCs do not need regshift compared to other
> > > > SCI IPs on the SH platform. Currently, it does regshift and
> > > > configuring Rx wrongly. Drop adding regshift for RZ/G2L alike SoCs.
> > > >
> > > > Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift value
> > > > for SCI ports")
> > > > Cc: stable@vger.kernel.org
> > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > ---
> > > > v3->v4:
> > > >  * Updated the fixes tag
> > > >  * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift
> > > > are only
> > > needed
> > > >    for sh770x/sh7750/sh7760, which don't use DT yet.
> > > >  * Dropped is_rz_sci variable from struct sci_port.
> > >
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > >
> > > One can wonder how this ever worked on DT-based H8/300...
> >
> > Yep, it is interesting to see whether SCI ever worked on DT-based
> > H8/300 Assuming it has same register layout as RZ/G2L SoC.
> 
> This is already in Linus's tree now, right?

As per the discussion with Geert, It is been removed since 2022. Yes, It is present in backports.

Geert, please correct me If I am wrong.

Cheers,
Biju

Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Greg Kroah-Hartman]

On Wed, Mar 29, 2023 at 09:06:43AM +0000, Biju Das wrote:
> Hi Greg,
> 
> Thanks for the feedback.
> 
> > Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI
> > 
> > On Tue, Mar 28, 2023 at 11:32:38AM +0000, Biju Das wrote:
> > > Hi Geert,
> > >
> > > Thanks for the feedback.
> > >
> > > > Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L
> > > > SCI
> > > >
> > > > On Tue, Mar 21, 2023 at 12:48 PM Biju Das
> > > > <biju.das.jz@bp.renesas.com>
> > > > wrote:
> > > > > SCI IP on RZ/G2L alike SoCs do not need regshift compared to other
> > > > > SCI IPs on the SH platform. Currently, it does regshift and
> > > > > configuring Rx wrongly. Drop adding regshift for RZ/G2L alike SoCs.
> > > > >
> > > > > Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift value
> > > > > for SCI ports")
> > > > > Cc: stable@vger.kernel.org
> > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > > ---
> > > > > v3->v4:
> > > > >  * Updated the fixes tag
> > > > >  * Replaced sci_port->is_rz_sci with dev->dev.of_node as regshift
> > > > > are only
> > > > needed
> > > > >    for sh770x/sh7750/sh7760, which don't use DT yet.
> > > > >  * Dropped is_rz_sci variable from struct sci_port.
> > > >
> > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > >
> > > > One can wonder how this ever worked on DT-based H8/300...
> > >
> > > Yep, it is interesting to see whether SCI ever worked on DT-based
> > > H8/300 Assuming it has same register layout as RZ/G2L SoC.
> > 
> > This is already in Linus's tree now, right?
> 
> As per the discussion with Geert, It is been removed since 2022. Yes, It is present in backports.
> 
> Geert, please correct me If I am wrong.

Seems to not apply against 6.3-rc3 :(

RE: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI

[Biju Das]

Hi Greg,

> Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L SCI
> 
> On Wed, Mar 29, 2023 at 09:06:43AM +0000, Biju Das wrote:
> > Hi Greg,
> >
> > Thanks for the feedback.
> >
> > > Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on RZ/G2L
> > > SCI
> > >
> > > On Tue, Mar 28, 2023 at 11:32:38AM +0000, Biju Das wrote:
> > > > Hi Geert,
> > > >
> > > > Thanks for the feedback.
> > > >
> > > > > Subject: Re: [PATCH v4 2/5] tty: serial: sh-sci: Fix Rx on
> > > > > RZ/G2L SCI
> > > > >
> > > > > On Tue, Mar 21, 2023 at 12:48 PM Biju Das
> > > > > <biju.das.jz@bp.renesas.com>
> > > > > wrote:
> > > > > > SCI IP on RZ/G2L alike SoCs do not need regshift compared to
> > > > > > other SCI IPs on the SH platform. Currently, it does regshift
> > > > > > and configuring Rx wrongly. Drop adding regshift for RZ/G2L alike
> SoCs.
> > > > > >
> > > > > > Fixes: dfc80387aefb ("serial: sh-sci: Compute the regshift
> > > > > > value for SCI ports")
> > > > > > Cc: stable@vger.kernel.org
> > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > > > ---
> > > > > > v3->v4:
> > > > > >  * Updated the fixes tag
> > > > > >  * Replaced sci_port->is_rz_sci with dev->dev.of_node as
> > > > > > regshift are only
> > > > > needed
> > > > > >    for sh770x/sh7750/sh7760, which don't use DT yet.
> > > > > >  * Dropped is_rz_sci variable from struct sci_port.
> > > > >
> > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > >
> > > > > One can wonder how this ever worked on DT-based H8/300...
> > > >
> > > > Yep, it is interesting to see whether SCI ever worked on DT-based
> > > > H8/300 Assuming it has same register layout as RZ/G2L SoC.
> > >
> > > This is already in Linus's tree now, right?
> >
> > As per the discussion with Geert, It is been removed since 2022. Yes, It
> is present in backports.
> >
> > Geert, please correct me If I am wrong.
> 
> Seems to not apply against 6.3-rc3 :(

OK, Only H8/300 support is removed in 2022. But we have RZ/G2L alike SoCs that
needs this fix. SCI support for RZ/G2L SoCs in DT[1] are present since 5.17 +.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g044.dtsi?h=linux-5.17.y#n393

Cheers,
Biju

[PATCH v4 3/5] tty: serial: sh-sci: Fix Tx on SCI IP

[Biju Das]

For SCI, the TE (transmit enable) must be set after setting TIE (transmit
interrupt enable) or in the same instruction to start the transmission.
Set TE bit in sci_start_tx() instead of set_termios() for SCI and clear
TE bit, if circular buffer is empty in sci_transmit_chars().

Fixes: 93bcefd4c6ba ("serial: sh-sci: Fix setting SCSCR_TIE while transferring data")
Cc: stable@vger.kernel.org
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v3->v4:
 * Updated fixes tag.
v3:
 * New patch
---
 drivers/tty/serial/sh-sci.c | 25 +++++++++++++++++++++++--
 1 file changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 15954ca3e9dc..bcc4152ce043 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -596,6 +596,15 @@ static void sci_start_tx(struct uart_port *port)
 	if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
 		/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
 		ctrl = serial_port_in(port, SCSCR);
+
+		/*
+		 * For SCI, TE (transmit enable) must be set after setting TIE
+		 * (transmit interrupt enable) or in the same instruction to start
+		 * the transmit process.
+		 */
+		if (port->type == PORT_SCI)
+			ctrl |= SCSCR_TE;
+
 		serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
 	}
 }
@@ -834,6 +843,12 @@ static void sci_transmit_chars(struct uart_port *port)
 			c = xmit->buf[xmit->tail];
 			xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 		} else {
+			if (port->type == PORT_SCI) {
+				ctrl = serial_port_in(port, SCSCR);
+				ctrl &= ~SCSCR_TE;
+				serial_port_out(port, SCSCR, ctrl);
+				return;
+			}
 			break;
 		}
 
@@ -2580,8 +2595,14 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
 		sci_set_mctrl(port, port->mctrl);
 	}
 
-	scr_val |= SCSCR_RE | SCSCR_TE |
-		   (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
+	/*
+	 * For SCI, TE (transmit enable) must be set after setting TIE
+	 * (transmit interrupt enable) or in the same instruction to
+	 * start the transmitting process. So skip setting TE here for SCI.
+	 */
+	if (port->type != PORT_SCI)
+		scr_val |= SCSCR_TE;
+	scr_val |= SCSCR_RE | (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
 	serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
 	if ((srr + 1 == 5) &&
 	    (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) {
-- 
2.25.1

RE: [PATCH v4 3/5] tty: serial: sh-sci: Fix Tx on SCI IP

[Biju Das]

Hi All,

I split this patch into 2([1] & [2]) after fixing commit message
and merged with the series[3] to avoid any dependencies.

[1] https://lore.kernel.org/linux-renesas-soc/20230331113346.170602-4-biju.das.jz@bp.renesas.com/T/#u
[2] https://lore.kernel.org/linux-renesas-soc/20230331113346.170602-4-biju.das.jz@bp.renesas.com/T/#md8ae156345aed10bdeba764dcf2253f00b02e38c

[3] https://lore.kernel.org/linux-renesas-soc/20230331113346.170602-4-biju.das.jz@bp.renesas.com/T/#me7f60560fbf24bf361d70ccb6ba223e92a60de9b

Cheers,
Biju


> Subject: [PATCH v4 3/5] tty: serial: sh-sci: Fix Tx on SCI IP
> 
> For SCI, the TE (transmit enable) must be set after setting TIE (transmit
> interrupt enable) or in the same instruction to start the transmission.
> Set TE bit in sci_start_tx() instead of set_termios() for SCI and clear TE
> bit, if circular buffer is empty in sci_transmit_chars().
> 
> Fixes: 93bcefd4c6ba ("serial: sh-sci: Fix setting SCSCR_TIE while
> transferring data")
> Cc: stable@vger.kernel.org
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v3->v4:
>  * Updated fixes tag.
> v3:
>  * New patch
> ---
>  drivers/tty/serial/sh-sci.c | 25 +++++++++++++++++++++++--
>  1 file changed, 23 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index
> 15954ca3e9dc..bcc4152ce043 100644
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -596,6 +596,15 @@ static void sci_start_tx(struct uart_port *port)
>  	if (!s->chan_tx || port->type == PORT_SCIFA || port->type ==
> PORT_SCIFB) {
>  		/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
>  		ctrl = serial_port_in(port, SCSCR);
> +
> +		/*
> +		 * For SCI, TE (transmit enable) must be set after setting TIE
> +		 * (transmit interrupt enable) or in the same instruction to
> start
> +		 * the transmit process.
> +		 */
> +		if (port->type == PORT_SCI)
> +			ctrl |= SCSCR_TE;
> +
>  		serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
>  	}
>  }
> @@ -834,6 +843,12 @@ static void sci_transmit_chars(struct uart_port *port)
>  			c = xmit->buf[xmit->tail];
>  			xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
>  		} else {
> +			if (port->type == PORT_SCI) {
> +				ctrl = serial_port_in(port, SCSCR);
> +				ctrl &= ~SCSCR_TE;
> +				serial_port_out(port, SCSCR, ctrl);
> +				return;
> +			}
>  			break;
>  		}
> 
> @@ -2580,8 +2595,14 @@ static void sci_set_termios(struct uart_port *port,
> struct ktermios *termios,
>  		sci_set_mctrl(port, port->mctrl);
>  	}
> 
> -	scr_val |= SCSCR_RE | SCSCR_TE |
> -		   (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
> +	/*
> +	 * For SCI, TE (transmit enable) must be set after setting TIE
> +	 * (transmit interrupt enable) or in the same instruction to
> +	 * start the transmitting process. So skip setting TE here for SCI.
> +	 */
> +	if (port->type != PORT_SCI)
> +		scr_val |= SCSCR_TE;
> +	scr_val |= SCSCR_RE | (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
>  	serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
>  	if ((srr + 1 == 5) &&
>  	    (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) {
> --
> 2.25.1

[PATCH v4 4/5] tty: serial: sh-sci: Add support for tx end interrupt handling

[Biju Das]

As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentioned
that, set the SCR.TIE bit to 0 and SCR.TEIE bit to 1, after the last
data to be transmitted are written to the TDR.

This will generate tx end interrupt and in the handler set SCR.TE and
SCR.TEIE to 0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v3->v4:
 * Removed fixes tag, as it is a feature enhancement to make tx fully
   functional on RZ/G2L alike SOCs. With previous patch#3, eventhough
   we get tx interrupts, still it is broken as characters entered on
   uart terminal is not visible except for the first character.
v3:
 * New patch
---
 drivers/tty/serial/sh-sci.c | 31 ++++++++++++++++++++++++++++---
 drivers/tty/serial/sh-sci.h |  3 +++
 2 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index bcc4152ce043..da7eb7a3ca6f 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -861,9 +861,16 @@ static void sci_transmit_chars(struct uart_port *port)
 
 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 		uart_write_wakeup(port);
-	if (uart_circ_empty(xmit))
-		sci_stop_tx(port);
+	if (uart_circ_empty(xmit)) {
+		if (port->type == PORT_SCI) {
+			ctrl = serial_port_in(port, SCSCR);
+			ctrl &= ~SCSCR_TIE;
+			ctrl |= SCSCR_TEIE;
+			serial_port_out(port, SCSCR, ctrl);
+		}
 
+		sci_stop_tx(port);
+	}
 }
 
 static void sci_receive_chars(struct uart_port *port)
@@ -1752,6 +1759,24 @@ static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
 	return IRQ_HANDLED;
 }
 
+static irqreturn_t sci_tx_end_interrupt(int irq, void *ptr)
+{
+	struct uart_port *port = ptr;
+	unsigned long flags;
+	unsigned short ctrl;
+
+	if (port->type != PORT_SCI)
+		return sci_tx_interrupt(irq, ptr);
+
+	spin_lock_irqsave(&port->lock, flags);
+	ctrl = serial_port_in(port, SCSCR);
+	ctrl &= ~(SCSCR_TE | SCSCR_TEIE);
+	serial_port_out(port, SCSCR, ctrl);
+	spin_unlock_irqrestore(&port->lock, flags);
+
+	return IRQ_HANDLED;
+}
+
 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
 {
 	struct uart_port *port = ptr;
@@ -1888,7 +1913,7 @@ static const struct sci_irq_desc {
 
 	[SCIx_TEI_IRQ] = {
 		.desc = "tx end",
-		.handler = sci_tx_interrupt,
+		.handler = sci_tx_end_interrupt,
 	},
 
 	/*
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index c0ae78632dda..0b65563c4e9e 100644
--- a/drivers/tty/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
@@ -59,6 +59,9 @@ enum {
 #define SCSMR_SRC_19	0x0600	/* Sampling rate 1/19 */
 #define SCSMR_SRC_27	0x0700	/* Sampling rate 1/27 */
 
+/* Serial Control Register, SCI only bits */
+#define SCSCR_TEIE	BIT(2)  /* Transmit End Interrupt Enable */
+
 /* Serial Control Register, SCIFA/SCIFB only bits */
 #define SCSCR_TDRQE	BIT(15)	/* Tx Data Transfer Request Enable */
 #define SCSCR_RDRQE	BIT(14)	/* Rx Data Transfer Request Enable */
-- 
2.25.1