From: John Garry <john.garry@huawei.com>
To: <broonie@kernel.org>, <marek.vasut@gmail.com>,
<tudor.ambarus@microchip.com>
Cc: <linuxarm@huawei.com>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <linux-spi@vger.kernel.org>,
<xuejiancheng@hisilicon.com>, <fengsheng5@huawei.com>,
<chenxiang66@hisilicon.com>
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Thu, 9 Jan 2020 15:54:00 +0000 [thread overview]
Message-ID: <0dc5cb2e-b765-9e13-b05e-9e3c835c5985@huawei.com> (raw)
In-Reply-To: <1575900490-74467-3-git-send-email-john.garry@huawei.com>
On 09/12/2019 14:08, John Garry wrote:
> + if (ret)
> + return ret;
> +
> + if (op->data.dir == SPI_MEM_DATA_IN)
> + hisi_sfc_v3xx_read_databuf(host, op->data.buf.in, len);
> +
> + return 0;
> +}
> +
> +static int hisi_sfc_v3xx_exec_op(struct spi_mem *mem,
> + const struct spi_mem_op *op)
> +{
> + struct hisi_sfc_v3xx_host *host;
> + struct spi_device *spi = mem->spi;
> + u8 chip_select = spi->chip_select;
> +
> + host = spi_controller_get_devdata(spi->master);
> +
> + return hisi_sfc_v3xx_generic_exec_op(host, op, chip_select);
> +}
> +
> +static const struct spi_controller_mem_ops hisi_sfc_v3xx_mem_ops = {
> + .adjust_op_size = hisi_sfc_v3xx_adjust_op_size,
> + .exec_op = hisi_sfc_v3xx_exec_op,
> +};
> +
> +static int hisi_sfc_v3xx_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct hisi_sfc_v3xx_host *host;
> + struct spi_controller *ctlr;
> + u32 version;
> + int ret;
> +
> + ctlr = spi_alloc_master(&pdev->dev, sizeof(*host));
> + if (!ctlr)
> + return -ENOMEM;
> +
Hi Mark,
> + ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD |
> + SPI_TX_DUAL | SPI_TX_QUAD;
I have an issue with dual/quad support. I naively thought that setting
these bits would give me the highest protocol available.
However, now I notice that spi_device.mode needs to be set for supported
protocols for the slave - I'm using the generic spi mem ops to check if
protocols are supported based on this value.
From checking acpi_spi_add_resource() or anywhere else, I cannot see
how SPI_RX_DUAL or the others are set for spi_device.mode. What am I
missing? Are these just not supported yet for ACPI? Or should the
spi-nor code not be relying on this since we should be able to get this
info from the SPI NOR part?
Cheers,
John
> +
> + host = spi_controller_get_devdata(ctlr);
> + host->dev = dev;
> +
> + platform_set_drvdata(pdev, host);
> +
> + host->regbase = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(host->regbase)) {
> + ret = PTR_ERR(host->regbase);
> + goto err_put_master;
next prev parent reply other threads:[~2020-01-09 15:54 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2020-01-16 11:03 ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2020-01-09 15:54 ` John Garry [this message]
2020-01-09 21:28 ` Mark Brown
[not found] ` <20200109212842.GK3702-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-10 11:55 ` John Garry
[not found] ` <df67b562-7d82-19f6-7581-680190a7772d-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 14:07 ` Mark Brown
2020-01-10 14:58 ` John Garry
2020-01-10 15:12 ` Mark Brown
2020-01-10 16:09 ` John Garry
[not found] ` <6db83881-927c-d11c-9c77-23a45892ddab-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 19:31 ` Andy Shevchenko
2020-01-13 10:09 ` John Garry
2020-01-13 11:42 ` Mark Brown
2020-01-13 13:01 ` John Garry
2020-01-13 14:06 ` Mark Brown
[not found] ` <20200113140627.GJ3897-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-13 14:17 ` Andy Shevchenko
[not found] ` <CAHp75VfepiiVFLLmCwdBS0Z6tmR+XKBaOLg1qPPuz1McLjS=4Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-13 14:27 ` Mark Brown
[not found] ` <20200113142754.GL3897-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-13 14:34 ` Andy Shevchenko
2020-01-31 10:08 ` John Garry
[not found] ` <0252a76d-7e2b-2c70-8b1b-0d041d972098-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-31 11:39 ` Andy Shevchenko
[not found] ` <CAHp75Ve=ZwJe2XV8Y1UN6sMe1ZHOBwUtRUD=aGqhR4Gc7BNUcg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-31 12:03 ` John Garry
[not found] ` <136bd652-dcb9-3efa-a92f-2263cbf840ad-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-31 15:46 ` Andy Shevchenko
[not found] ` <CAHp75Vd=TY0tPfSHMSLTh1Pgg-E7MCP5Gym1yjpLgH0Tx-2xSg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-31 16:26 ` John Garry
2020-02-01 11:34 ` Mark Brown
2020-02-01 11:32 ` Mark Brown
2020-01-10 19:59 ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
[not found] ` <1575900490-74467-4-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 19:59 ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:56 ` Mark Brown
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0dc5cb2e-b765-9e13-b05e-9e3c835c5985@huawei.com \
--to=john.garry@huawei.com \
--cc=broonie@kernel.org \
--cc=chenxiang66@hisilicon.com \
--cc=fengsheng5@huawei.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=marek.vasut@gmail.com \
--cc=tudor.ambarus@microchip.com \
--cc=xuejiancheng@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).