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From: Mark Brown <broonie@kernel.org>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: John Garry <john.garry@huawei.com>,
	chenxiang66@hisilicon.com,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	liusimin4@huawei.com, Linuxarm <linuxarm@huawei.com>,
	linux-spi <linux-spi@vger.kernel.org>,
	Marek Vasut <marek.vasut@gmail.com>,
	"open list:MEMORY TECHNOLOGY..." <linux-mtd@lists.infradead.org>,
	tudor.ambarus@microchip.com,
	Jiancheng Xue <xuejiancheng@hisilicon.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	fengsheng5@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Sat, 1 Feb 2020 11:32:50 +0000	[thread overview]
Message-ID: <20200201113250.GT3897@sirena.org.uk> (raw)
In-Reply-To: <CAHp75Vd=TY0tPfSHMSLTh1Pgg-E7MCP5Gym1yjpLgH0Tx-2xSg@mail.gmail.com>

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On Fri, Jan 31, 2020 at 05:46:39PM +0200, Andy Shevchenko wrote:
> On Fri, Jan 31, 2020 at 2:03 PM John Garry <john.garry@huawei.com> wrote:
> > On 31/01/2020 11:39, Andy Shevchenko wrote:

> > > DataBitLength is the size, in bits, of the smallest transfer unit for
> > > this connection. _LEN is automatically
> > > created to refer to this portion of the resource descriptor.

> > > Is it what you are looking for? (As far as I know most of the
> > > firmwares simple abuse this field among others)

> > I didn't think so - I thought that there was a distinction between width
> > and length in SPI terms.

> My interpretation of this field is a data width of the slave.
> Basically what we have as transfer->size inside SPI in the Linux
> kernel.

This discussion is about the number of data lines, SPI_TX_QUAD
and friends.

>      1 SpiSerialBusV2(0x0000,PolarityLow,FourWireMode,0x08,
>     36 SpiSerialBusV2(0x0000,PolarityLow,FourWireMode,0x10,
>     35 SpiSerialBusV2(0x0000,PolarityLow,FourWireMode,0x18,
>     35 SpiSerialBusV2(0x0000,PolarityLow,FourWireMode,0x20,
>      1 SpiSerialBusV2(0x0000,PolarityLow,ThreeWireMode,0x10,
>      8 SpiSerialBusV2(0x0001,PolarityLow,FourWireMode,0x08,
>      1 SpiSerialBusV2(0x0001,PolarityLow,FourWireMode,0x10,

> So, it seems I stand corrected, the field is in right use, although
> cases like 0x10 and 0x20 should be carefully checked.

Those look like they're mainly controlling SPI_3WIRE so it does
look like a reasonable fit, yes.

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  parent reply	other threads:[~2020-02-01 11:32 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2020-01-16 11:03   ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2020-01-09 15:54   ` John Garry
2020-01-09 21:28     ` Mark Brown
     [not found]       ` <20200109212842.GK3702-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-10 11:55         ` John Garry
     [not found]           ` <df67b562-7d82-19f6-7581-680190a7772d-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 14:07             ` Mark Brown
2020-01-10 14:58               ` John Garry
2020-01-10 15:12                 ` Mark Brown
2020-01-10 16:09                   ` John Garry
     [not found]                 ` <6db83881-927c-d11c-9c77-23a45892ddab-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 19:31                   ` Andy Shevchenko
2020-01-13 10:09                     ` John Garry
2020-01-13 11:42                       ` Mark Brown
2020-01-13 13:01                         ` John Garry
2020-01-13 14:06                           ` Mark Brown
     [not found]                             ` <20200113140627.GJ3897-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-13 14:17                               ` Andy Shevchenko
     [not found]                                 ` <CAHp75VfepiiVFLLmCwdBS0Z6tmR+XKBaOLg1qPPuz1McLjS=4Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-13 14:27                                   ` Mark Brown
     [not found]                                     ` <20200113142754.GL3897-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-01-13 14:34                                       ` Andy Shevchenko
2020-01-31 10:08                                         ` John Garry
     [not found]                                           ` <0252a76d-7e2b-2c70-8b1b-0d041d972098-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-31 11:39                                             ` Andy Shevchenko
     [not found]                                               ` <CAHp75Ve=ZwJe2XV8Y1UN6sMe1ZHOBwUtRUD=aGqhR4Gc7BNUcg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-31 12:03                                                 ` John Garry
     [not found]                                                   ` <136bd652-dcb9-3efa-a92f-2263cbf840ad-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-31 15:46                                                     ` Andy Shevchenko
     [not found]                                                       ` <CAHp75Vd=TY0tPfSHMSLTh1Pgg-E7MCP5Gym1yjpLgH0Tx-2xSg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-01-31 16:26                                                         ` John Garry
2020-02-01 11:34                                                           ` Mark Brown
2020-02-01 11:32                                                       ` Mark Brown [this message]
2020-01-10 19:59   ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
     [not found]   ` <1575900490-74467-4-git-send-email-john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-01-10 19:59     ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:56   ` Mark Brown

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