[PATCH 00/49] spi: davinci: re-write existing driver

[PATCH 00/49] spi: davinci: re-write existing driver

[Sekhar Nori]

This patch series represents a break-up into reviewable portions
of the work originally done by Brian and posted here:

https://patchwork.kernel.org/patch/114924/

While this series does not exactly add up to what Brian's patch
is, it is pretty close functionally.

This series was tested by me on OMAP-L138, OMAP-L137, DM365 and DM355
EVMs and on their OMAP-L138 boards (not EVMs) by Brian and Michael.

The patch series applies to latest of Linus's tree in hope that
it will be considered for merge in 2.6.37 since the series is
about bug fixes and clean-up.

This series along with some patches to add SPI platform support
to OMAP-L1x EVMs and Mity-DSP board is also available here:

http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/davinci-spi-rewrite

Brian Niebuhr (42):
  spi: davinci: fix checkpatch errors
  spi: davinci: whitespace cleanup
  spi: davinci: remove unused variable 'pdata'
  spi: davinci: set chip-select mode in SPIDEF only once
  spi: davinci: enable both activation and deactivation of chip-selects
  spi: davinci: remove unnecessary data transmit on CS disable
  spi: davinci: enable GPIO lines to be used as chip selects
  spi: davinci: simplify prescalar calculation
  spi: davinci: remove 'wait_enable' platform data member
  spi: davinci: make chip-slect specific parameters really chip-select
    specific
  spi: davinci: consolidate setup of SPIFMTn in one function
  spi: davinci: setup chip-select timers values only if timer enabled
  spi: davinci: add support for wait enable timeouts
  spi: davinci: remove unused members of davinci_spi_slave
  spi: davinci: eliminate the single member structure davinci_spi_slave
  spi: davinci: eliminate unnecessary update of davinci_spi->count
  spi: davinci: simplify calculation of edma acount value
  spi: davinci: check for NULL buffer pointer before using it
  spi: davinci: remove unnecessary disable of SPI
  spi: davinci: remove unnecessary 'count' variable in driver private
    data
  spi: davinci: remove unnecessary completion variable initialization
  spi: davinci: remove non-useful interrupt mode support
  spi: davinci: simplify poll mode transfers
  spi: davinci: add support for interrupt mode
  spi: davinci: configure the invariable bits in spipc0 only once
  spi: davinci: remove unnecessary function davinci_spi_bufs_prep()
  spi: davinci: remove unnecessary call to davinci_spi_setup_transfer()
  spi: davinci: do not store DMA channel information per chip select
  spi: davinci: always start transmit DMA
  spi: davinci: do not use temporary buffer if no transmit data
    provided
  spi: davinci: always start receive DMA
  spi: davinci: use edma_write_slot() to setup EDMA PaRAM slot
  spi: davinci: fix DMA event generation stoppage
  spi: davinci: fix EDMA CC errors at end of transfers
  spi: davinci: handle DMA completion errors correctly
  spi: davinci: remove usage of additional completion variables for DMA
  spi: davinci: let DMA operation be specified on per-device basis
  spi: davinci: remove non-useful "clk_internal" platform data
  spi: davinci: enable and power-up SPI only when required
  spi: davinci: setup the driver owner
  spi: davinci: add additional comments
  spi: davinci: add EF Johnson Technologies copyright

Sekhar Nori (7):
  spi: davinci: removed unused #defines
  spi: davinci: remove unnecessary typecast
  spi: davinci: do not treat Tx interrupt being set as error
  spi: davinci: do not allocate DMA channels during SPI device setup
  spi: davinci: remove unnecessary private data member 'region_size'
  spi: davinci: shorten variable names
  spi: davinci: kconfig: add manufacturer name to prompt string

 arch/arm/mach-davinci/dm355.c            |    7 +-
 arch/arm/mach-davinci/dm365.c            |    6 -
 arch/arm/mach-davinci/include/mach/spi.h |   52 +-
 drivers/spi/Kconfig                      |    7 +-
 drivers/spi/davinci_spi.c                | 1314 ++++++++++++------------------
 5 files changed, 587 insertions(+), 799 deletions(-)

-- 
1.7.3.2

[PATCH 01/49] spi: davinci: fix checkpatch errors

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Fix the following checkpatch error:

WARNING: unnecessary whitespace before a quoted newline
+       dev_info(&pdev->dev, "Controller at 0x%p \n", davinci_spi->base);

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index b85090c..6b04762 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -1184,7 +1184,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	if (ret)
 		goto free_clk;
 
-	dev_info(&pdev->dev, "Controller at 0x%p \n", davinci_spi->base);
+	dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base);
 
 	if (!pdata->poll_mode)
 		dev_info(&pdev->dev, "Operating in interrupt mode"
-- 
1.7.3.2

[PATCH 02/49] spi: davinci: whitespace cleanup

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Cleanup unnecessary white space from various
parts of the file.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   22 ++++++++++------------
 1 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 6b04762..2fa5bec 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -175,7 +175,7 @@ struct davinci_spi {
 	u8			*tmp_buf;
 	int			count;
 	struct davinci_spi_dma	*dma_channels;
-	struct			davinci_spi_platform_data *pdata;
+	struct davinci_spi_platform_data *pdata;
 
 	void			(*get_rx)(u32 rx_data, struct davinci_spi *);
 	u32			(*get_tx)(struct davinci_spi *);
@@ -435,7 +435,6 @@ static int davinci_spi_request_dma(struct spi_device *spi)
  *
  * This functions sets the default transfer method.
  */
-
 static int davinci_spi_setup(struct spi_device *spi)
 {
 	int retval;
@@ -1096,7 +1095,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	}
 	clk_enable(davinci_spi->clk);
 
-
 	master->bus_num = pdev->id;
 	master->num_chipselect = pdata->num_chipselect;
 	master->setup = davinci_spi_setup;
@@ -1113,15 +1111,15 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		davinci_spi->bitbang.flags |= SPI_READY;
 
 	if (use_dma) {
-			r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
-			if (r)
-				dma_rx_chan = r->start;
-			r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
-			if (r)
-				dma_tx_chan = r->start;
-			r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
-			if (r)
-				dma_eventq = r->start;
+		r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+		if (r)
+			dma_rx_chan = r->start;
+		r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+		if (r)
+			dma_tx_chan = r->start;
+		r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
+		if (r)
+			dma_eventq = r->start;
 	}
 
 	if (!use_dma ||
-- 
1.7.3.2

[PATCH 03/49] spi: davinci: remove unused variable 'pdata'

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The 'pdata' variable is unused in couple of routines.

Remove such occurences.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    8 --------
 1 files changed, 0 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 2fa5bec..a92f507 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -299,12 +299,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 {
 
 	struct davinci_spi *davinci_spi;
-	struct davinci_spi_platform_data *pdata;
 	u8 bits_per_word = 0;
 	u32 hz = 0, prescale = 0, clkspeed;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
 
 	if (t) {
 		bits_per_word = t->bits_per_word;
@@ -357,11 +355,9 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
 	struct spi_device *spi = (struct spi_device *)data;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
-	struct davinci_spi_platform_data *pdata;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]);
-	pdata = davinci_spi->pdata;
 
 	if (ch_status == DMA_COMPLETE)
 		edma_stop(davinci_spi_dma->dma_rx_channel);
@@ -378,11 +374,9 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
 	struct spi_device *spi = (struct spi_device *)data;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
-	struct davinci_spi_platform_data *pdata;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]);
-	pdata = davinci_spi->pdata;
 
 	if (ch_status == DMA_COMPLETE)
 		edma_stop(davinci_spi_dma->dma_tx_channel);
@@ -398,13 +392,11 @@ static int davinci_spi_request_dma(struct spi_device *spi)
 {
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
-	struct davinci_spi_platform_data *pdata;
 	struct device *sdev;
 	int r;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
-	pdata = davinci_spi->pdata;
 	sdev = davinci_spi->bitbang.master->dev.parent;
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev,
-- 
1.7.3.2

[PATCH 04/49] spi: davinci: removed unused #defines

[Sekhar Nori]

Remove unused defines from code which should help
in easy reading of code.

Also, use the opportuinity to keep the SPIGCR1
register defines together.

Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   33 ++-------------------------------
 1 files changed, 2 insertions(+), 31 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index a92f507..7bd0a55 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -54,16 +54,12 @@
 #define SPIFMT_WDELAY_SHIFT	24
 #define SPIFMT_CHARLEN_MASK	0x0000001Fu
 
-/* SPIGCR1 */
-#define SPIGCR1_SPIENA_MASK	0x01000000u
 
 /* SPIPC0 */
 #define SPIPC0_DIFUN_MASK	BIT(11)		/* MISO */
 #define SPIPC0_DOFUN_MASK	BIT(10)		/* MOSI */
 #define SPIPC0_CLKFUN_MASK	BIT(9)		/* CLK */
 #define SPIPC0_SPIENA_MASK	BIT(8)		/* nREADY */
-#define SPIPC0_EN1FUN_MASK	BIT(1)
-#define SPIPC0_EN0FUN_MASK	BIT(0)
 
 #define SPIINT_MASKALL		0x0101035F
 #define SPI_INTLVL_1		0x000001FFu
@@ -75,6 +71,7 @@
 #define SPIGCR1_CLKMOD_MASK	BIT(1)
 #define SPIGCR1_MASTER_MASK     BIT(0)
 #define SPIGCR1_LOOPBACK_MASK	BIT(16)
+#define SPIGCR1_SPIENA_MASK	BIT(24)
 
 /* SPIBUF */
 #define SPIBUF_TXFULL_MASK	BIT(29)
@@ -90,23 +87,12 @@
 #define SPIFLG_RX_INTR_MASK		BIT(8)
 #define SPIFLG_TX_INTR_MASK		BIT(9)
 #define SPIFLG_BUF_INIT_ACTIVE_MASK	BIT(24)
-#define SPIFLG_MASK			(SPIFLG_DLEN_ERR_MASK \
-				| SPIFLG_TIMEOUT_MASK | SPIFLG_PARERR_MASK \
-				| SPIFLG_DESYNC_MASK | SPIFLG_BITERR_MASK \
-				| SPIFLG_OVRRUN_MASK | SPIFLG_RX_INTR_MASK \
-				| SPIFLG_TX_INTR_MASK \
-				| SPIFLG_BUF_INIT_ACTIVE_MASK)
-
-#define SPIINT_DLEN_ERR_INTR	BIT(0)
-#define SPIINT_TIMEOUT_INTR	BIT(1)
-#define SPIINT_PARERR_INTR	BIT(2)
-#define SPIINT_DESYNC_INTR	BIT(3)
+
 #define SPIINT_BITERR_INTR	BIT(4)
 #define SPIINT_OVRRUN_INTR	BIT(6)
 #define SPIINT_RX_INTR		BIT(8)
 #define SPIINT_TX_INTR		BIT(9)
 #define SPIINT_DMA_REQ_EN	BIT(16)
-#define SPIINT_ENABLE_HIGHZ	BIT(24)
 
 #define SPI_T2CDELAY_SHIFT	16
 #define SPI_C2TDELAY_SHIFT	24
@@ -118,26 +104,11 @@
 #define SPILVL		0x0c
 #define SPIFLG		0x10
 #define SPIPC0		0x14
-#define SPIPC1		0x18
-#define SPIPC2		0x1c
-#define SPIPC3		0x20
-#define SPIPC4		0x24
-#define SPIPC5		0x28
-#define SPIPC6		0x2c
-#define SPIPC7		0x30
-#define SPIPC8		0x34
-#define SPIDAT0		0x38
 #define SPIDAT1		0x3c
 #define SPIBUF		0x40
-#define SPIEMU		0x44
 #define SPIDELAY	0x48
 #define SPIDEF		0x4c
 #define SPIFMT0		0x50
-#define SPIFMT1		0x54
-#define SPIFMT2		0x58
-#define SPIFMT3		0x5c
-#define TGINTVEC0	0x60
-#define TGINTVEC1	0x64
 
 struct davinci_spi_slave {
 	u32	cmd_to_write;
-- 
1.7.3.2

[PATCH 05/49] spi: davinci: remove unnecessary typecast

[Sekhar Nori]

The typecasting of SPI base address to davinci_spi_reg is
unused.

Remove it.

Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 7bd0a55..76decda 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -1020,8 +1020,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		goto free_master;
 	}
 
-	davinci_spi->base = (struct davinci_spi_reg __iomem *)
-			ioremap(r->start, davinci_spi->region_size);
+	davinci_spi->base = ioremap(r->start, davinci_spi->region_size);
 	if (davinci_spi->base == NULL) {
 		ret = -ENOMEM;
 		goto release_region;
-- 
1.7.3.2

[PATCH 06/49] spi: davinci: set chip-select mode in SPIDEF only once

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Quit writing the same constant value determining the chip-select
mode when no transmissions are in progress in davinci_spi_chipelect().

Instead just setup the SPIDEF register once during probe.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 76decda..d6b6a49 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -245,8 +245,6 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 	 * line for the controller
 	 */
 	if (value == BITBANG_CS_INACTIVE) {
-		set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);
-
 		data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
 		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
 
@@ -1132,6 +1130,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		clear_io_bits(davinci_spi->base + SPIGCR1,
 				SPIGCR1_CLKMOD_MASK);
 
+	iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
+
 	/* master mode default */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
 
-- 
1.7.3.2

[PATCH 07/49] spi: davinci: enable both activation and deactivation of chip-selects

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Let davinci_spi_chipselect() perform both activation and
deactivation of chip selects. This lets spi_bitbang fully
control chip select activation, as intended by the SPI API.

With this change, the chip select activation code need not
be duplicated in davinci_spi_bufs_{pio|dma}().

Also, keeping chip select active control is removed as a
platform data and simply controlled using information from
spi_bitbang on whether chip slect should be activated or
de-activated.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/dm355.c            |    1 -
 arch/arm/mach-davinci/dm365.c            |    1 -
 arch/arm/mach-davinci/include/mach/spi.h |    1 -
 drivers/spi/davinci_spi.c                |   53 ++++++++++-------------------
 4 files changed, 18 insertions(+), 38 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 9be261b..6a76dfa 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -413,7 +413,6 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.cs_hold	= 1,
 	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 	.c2tdelay	= 0,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a12065e..cd623db 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -626,7 +626,6 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.cs_hold	= 1,
 	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 	.c2tdelay	= 0,
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 910efbf..2cb326e 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -33,7 +33,6 @@ struct davinci_spi_platform_data {
 	u8	wait_enable;
 	u8	timer_disable;
 	u8	clk_internal;
-	u8	cs_hold;
 	u8	intr_level;
 	u8	poll_mode;
 	u8	use_dma;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index d6b6a49..105c686 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -66,7 +66,7 @@
 #define SPI_INTLVL_0		0x00000000u
 
 /* SPIDAT1 */
-#define SPIDAT1_CSHOLD_SHIFT	28
+#define SPIDAT1_CSHOLD_MASK	BIT(28)
 #define SPIDAT1_CSNR_SHIFT	16
 #define SPIGCR1_CLKMOD_MASK	BIT(1)
 #define SPIGCR1_MASTER_MASK     BIT(0)
@@ -235,7 +235,8 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 {
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_platform_data *pdata;
-	u32 data1_reg_val = 0;
+	u32 data1_reg_val;
+	u8 chip_sel = spi->chip_select;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
@@ -244,14 +245,17 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 	 * Board specific chip select logic decides the polarity and cs
 	 * line for the controller
 	 */
-	if (value == BITBANG_CS_INACTIVE) {
-		data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
-		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
-
-		while ((ioread32(davinci_spi->base + SPIBUF)
-					& SPIBUF_RXEMPTY_MASK) == 0)
-			cpu_relax();
+	data1_reg_val = CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
+	if (value == BITBANG_CS_ACTIVE) {
+		data1_reg_val |= SPIDAT1_CSHOLD_MASK;
+		data1_reg_val &= ~((0x1 << chip_sel) << SPIDAT1_CSNR_SHIFT);
 	}
+
+	iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+	while ((ioread32(davinci_spi->base + SPIBUF)
+				& SPIBUF_RXEMPTY_MASK) == 0)
+		cpu_relax();
+
 }
 
 /**
@@ -632,7 +636,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
 	int int_status, count, ret;
-	u8 conv, tmp;
+	u8 conv;
 	u32 tx_data, data1_reg_val;
 	u32 buf_val, flg_val;
 	struct davinci_spi_platform_data *pdata;
@@ -647,6 +651,8 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	conv = davinci_spi->slave[spi->chip_select].bytes_per_word;
 	davinci_spi->count = t->len / conv;
 
+	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
+
 	INIT_COMPLETION(davinci_spi->done);
 
 	ret = davinci_spi_bufs_prep(spi, davinci_spi);
@@ -661,16 +667,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 			davinci_spi->base + SPIDELAY);
 
 	count = davinci_spi->count;
-	data1_reg_val = pdata->cs_hold << SPIDAT1_CSHOLD_SHIFT;
-	tmp = ~(0x1 << spi->chip_select);
-
-	clear_io_bits(davinci_spi->base + SPIDEF, ~tmp);
-
-	data1_reg_val |= tmp << SPIDAT1_CSNR_SHIFT;
-
-	while ((ioread32(davinci_spi->base + SPIBUF)
-				& SPIBUF_RXEMPTY_MASK) == 0)
-		cpu_relax();
 
 	/* Determine the command to execute READ or WRITE */
 	if (t->tx_buf) {
@@ -770,7 +766,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	int int_status = 0;
 	int count, temp_count;
 	u8 conv = 1;
-	u8 tmp;
 	u32 data1_reg_val;
 	struct davinci_spi_dma *davinci_spi_dma;
 	int word_len, data_type, ret;
@@ -794,6 +789,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	conv = davinci_spi->slave[spi->chip_select].bytes_per_word;
 	davinci_spi->count = t->len / conv;
 
+	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
+
 	INIT_COMPLETION(davinci_spi->done);
 
 	init_completion(&davinci_spi_dma->dma_rx_completion);
@@ -820,28 +817,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 			davinci_spi->base + SPIDELAY);
 
 	count = davinci_spi->count;	/* the number of elements */
-	data1_reg_val = pdata->cs_hold << SPIDAT1_CSHOLD_SHIFT;
-
-	/* CS default = 0xFF */
-	tmp = ~(0x1 << spi->chip_select);
-
-	clear_io_bits(davinci_spi->base + SPIDEF, ~tmp);
-
-	data1_reg_val |= tmp << SPIDAT1_CSNR_SHIFT;
 
 	/* disable all interrupts for dma transfers */
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
 	/* Disable SPI to write configuration bits in SPIDAT */
 	clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
-	iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	while ((ioread32(davinci_spi->base + SPIBUF)
-				& SPIBUF_RXEMPTY_MASK) == 0)
-		cpu_relax();
-
-
 	if (t->tx_buf) {
 		t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count,
 				DMA_TO_DEVICE);
-- 
1.7.3.2

[PATCH 08/49] spi: davinci: remove unnecessary data transmit on CS disable

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

On TI DaVinci's SPI controller, the SPIDAT1 register which
controls the chip slect status, also has data transmit register
in the lower 16 bits. Writing to the whole 32-bits triggers
an additional data transmit every time the chip select is disabled.

While most SPI slaves cope-up with this, some cannot. This
patch fixes this by doing a 16-bit write on the upper half
of the SPIDAT1 register

While at it, group the SPIGCR1 register related defines seperately
from SPIDAT1 register defines.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   20 ++++++++------------
 1 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 105c686..82dddf8 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -65,9 +65,10 @@
 #define SPI_INTLVL_1		0x000001FFu
 #define SPI_INTLVL_0		0x00000000u
 
-/* SPIDAT1 */
-#define SPIDAT1_CSHOLD_MASK	BIT(28)
-#define SPIDAT1_CSNR_SHIFT	16
+/* SPIDAT1 (upper 16 bit defines) */
+#define SPIDAT1_CSHOLD_MASK	BIT(12)
+
+/* SPIGCR1 */
 #define SPIGCR1_CLKMOD_MASK	BIT(1)
 #define SPIGCR1_MASTER_MASK     BIT(0)
 #define SPIGCR1_LOOPBACK_MASK	BIT(16)
@@ -235,8 +236,8 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 {
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_platform_data *pdata;
-	u32 data1_reg_val;
 	u8 chip_sel = spi->chip_select;
+	u16 spidat1_cfg = CS_DEFAULT;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
@@ -245,17 +246,12 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 	 * Board specific chip select logic decides the polarity and cs
 	 * line for the controller
 	 */
-	data1_reg_val = CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
 	if (value == BITBANG_CS_ACTIVE) {
-		data1_reg_val |= SPIDAT1_CSHOLD_MASK;
-		data1_reg_val &= ~((0x1 << chip_sel) << SPIDAT1_CSNR_SHIFT);
+		spidat1_cfg |= SPIDAT1_CSHOLD_MASK;
+		spidat1_cfg &= ~(0x1 << chip_sel);
 	}
 
-	iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
-	while ((ioread32(davinci_spi->base + SPIBUF)
-				& SPIBUF_RXEMPTY_MASK) == 0)
-		cpu_relax();
-
+	iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2);
 }
 
 /**
-- 
1.7.3.2

[PATCH 09/49] spi: davinci: enable GPIO lines to be used as chip selects

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Sometimes, the chip selects provided by SPI module are
muxed with other functionality and cannot be used in
some designs. In such cases, it becomes convenient to use
an available GPIO line as chip select.

This patch enables the DaVinci SPI driver to treat specific
GPIO lines as chip selects based on information provided in
platform data.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |    3 ++
 drivers/spi/davinci_spi.c                |   39 ++++++++++++++++++++++++-----
 2 files changed, 35 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 2cb326e..734d1fb 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -19,6 +19,8 @@
 #ifndef __ARCH_ARM_DAVINCI_SPI_H
 #define __ARCH_ARM_DAVINCI_SPI_H
 
+#define SPI_INTERN_CS	0xFF
+
 enum {
 	SPI_VERSION_1, /* For DM355/DM365/DM6467 */
 	SPI_VERSION_2, /* For DA8xx */
@@ -38,6 +40,7 @@ struct davinci_spi_platform_data {
 	u8	use_dma;
 	u8	c2tdelay;
 	u8	t2cdelay;
+	u8	*chip_sel;
 };
 
 #endif	/* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 82dddf8..d5d7014 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -238,20 +238,32 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 	struct davinci_spi_platform_data *pdata;
 	u8 chip_sel = spi->chip_select;
 	u16 spidat1_cfg = CS_DEFAULT;
+	bool gpio_chipsel = false;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
 
+	if (pdata->chip_sel && chip_sel < pdata->num_chipselect &&
+				pdata->chip_sel[chip_sel] != SPI_INTERN_CS)
+		gpio_chipsel = true;
+
 	/*
 	 * Board specific chip select logic decides the polarity and cs
 	 * line for the controller
 	 */
-	if (value == BITBANG_CS_ACTIVE) {
-		spidat1_cfg |= SPIDAT1_CSHOLD_MASK;
-		spidat1_cfg &= ~(0x1 << chip_sel);
-	}
+	if (gpio_chipsel) {
+		if (value == BITBANG_CS_ACTIVE)
+			gpio_set_value(pdata->chip_sel[chip_sel], 0);
+		else
+			gpio_set_value(pdata->chip_sel[chip_sel], 1);
+	} else {
+		if (value == BITBANG_CS_ACTIVE) {
+			spidat1_cfg |= SPIDAT1_CSHOLD_MASK;
+			spidat1_cfg &= ~(0x1 << chip_sel);
+		}
 
-	iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2);
+		iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2);
+	}
 }
 
 /**
@@ -546,6 +558,7 @@ static void davinci_spi_cleanup(struct spi_device *spi)
 static int davinci_spi_bufs_prep(struct spi_device *spi,
 				 struct davinci_spi *davinci_spi)
 {
+	struct davinci_spi_platform_data *pdata;
 	int op_mode = 0;
 
 	/*
@@ -558,8 +571,12 @@ static int davinci_spi_bufs_prep(struct spi_device *spi,
 	op_mode = SPIPC0_DIFUN_MASK
 		| SPIPC0_DOFUN_MASK
 		| SPIPC0_CLKFUN_MASK;
-	if (!(spi->mode & SPI_NO_CS))
-		op_mode |= 1 << spi->chip_select;
+	if (!(spi->mode & SPI_NO_CS)) {
+		pdata = davinci_spi->pdata;
+		if (!pdata->chip_sel ||
+		     pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)
+			op_mode |= 1 << spi->chip_select;
+	}
 	if (spi->mode & SPI_READY)
 		op_mode |= SPIPC0_SPIENA_MASK;
 
@@ -1101,6 +1118,14 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	udelay(100);
 	iowrite32(1, davinci_spi->base + SPIGCR0);
 
+	/* initialize chip selects */
+	if (pdata->chip_sel) {
+		for (i = 0; i < pdata->num_chipselect; i++) {
+			if (pdata->chip_sel[i] != SPI_INTERN_CS)
+				gpio_direction_output(pdata->chip_sel[i], 1);
+		}
+	}
+
 	/* Clock internal */
 	if (davinci_spi->pdata->clk_internal)
 		set_io_bits(davinci_spi->base + SPIGCR1,
-- 
1.7.3.2

[PATCH 10/49] spi: davinci: simplify prescalar calculation

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Simplify pre-scalar calculation and move it into a seprate
function.

Refuse to correct invalid pre-scalar values silently as this
might lead to unexpected bugs and lower performance. Instead
an error will force users to dig into the root-cause of the
issue.

While at it, remove some device specific checks on the maximum
SPI frequency. As the driver supports the SPI interface
implemented on various devices, it should only take care of core
SPI limitations and leave the device specific handling to platform
code.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   53 ++++++++++++++++++++++++++------------------
 1 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index d5d7014..17269ad 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -53,6 +53,7 @@
 #define SPIFMT_WDELAY_MASK	0x3f000000u
 #define SPIFMT_WDELAY_SHIFT	24
 #define SPIFMT_CHARLEN_MASK	0x0000001Fu
+#define SPIFMT_PRESCALE_SHIFT	8
 
 
 /* SPIPC0 */
@@ -267,6 +268,29 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 }
 
 /**
+ * davinci_spi_get_prescale - Calculates the correct prescale value
+ * @maxspeed_hz: the maximum rate the SPI clock can run at
+ *
+ * This function calculates the prescale value that generates a clock rate
+ * less than or equal to the specified maximum.
+ *
+ * Returns: calculated prescale - 1 for easy programming into SPI registers
+ * or negative error number if valid prescalar cannot be updated.
+ */
+static inline int davinci_spi_get_prescale(struct davinci_spi *davinci_spi,
+							u32 max_speed_hz)
+{
+	int ret;
+
+	ret = DIV_ROUND_UP(clk_get_rate(davinci_spi->clk), max_speed_hz);
+
+	if (ret < 3 || ret > 256)
+		return -EINVAL;
+
+	return ret - 1;
+}
+
+/**
  * davinci_spi_setup_transfer - This functions will determine transfer method
  * @spi: spi device on which data transfer to be done
  * @t: spi transfer in which transfer info is filled
@@ -281,7 +305,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 
 	struct davinci_spi *davinci_spi;
 	u8 bits_per_word = 0;
-	u32 hz = 0, prescale = 0, clkspeed;
+	u32 hz = 0, prescale = 0;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 
@@ -312,21 +336,18 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 	if (!hz)
 		hz = spi->max_speed_hz;
 
+	prescale = davinci_spi_get_prescale(davinci_spi, hz);
+	if (prescale < 0)
+		return prescale;
+
 	clear_fmt_bits(davinci_spi->base, SPIFMT_CHARLEN_MASK,
 			spi->chip_select);
 	set_fmt_bits(davinci_spi->base, bits_per_word & 0x1f,
 			spi->chip_select);
 
-	clkspeed = clk_get_rate(davinci_spi->clk);
-	if (hz > clkspeed / 2)
-		prescale = 1 << 8;
-	if (hz < clkspeed / 256)
-		prescale = 255 << 8;
-	if (!prescale)
-		prescale = ((clkspeed / hz - 1) << 8) & 0x0000ff00;
-
 	clear_fmt_bits(davinci_spi->base, 0x0000ff00, spi->chip_select);
-	set_fmt_bits(davinci_spi->base, prescale, spi->chip_select);
+	set_fmt_bits(davinci_spi->base,
+			prescale << SPIFMT_PRESCALE_SHIFT, spi->chip_select);
 
 	return 0;
 }
@@ -413,10 +434,8 @@ static int davinci_spi_setup(struct spi_device *spi)
 	int retval;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
-	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	sdev = davinci_spi->bitbang.master->dev.parent;
 
 	/* if bits per word length is zero then set it default 8 */
 	if (!spi->bits_per_word)
@@ -436,16 +455,6 @@ static int davinci_spi_setup(struct spi_device *spi)
 	}
 
 	/*
-	 * SPI in DaVinci and DA8xx operate between
-	 * 600 KHz and 50 MHz
-	 */
-	if (spi->max_speed_hz < 600000 || spi->max_speed_hz > 50000000) {
-		dev_dbg(sdev, "Operating frequency is not in acceptable "
-				"range\n");
-		return -EINVAL;
-	}
-
-	/*
 	 * Set up SPIFMTn register, unique to this chipselect.
 	 *
 	 * NOTE: we could do all of these with one write.  Also, some
-- 
1.7.3.2

[PATCH 11/49] spi: davinci: remove 'wait_enable' platform data member

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The SPI_READY bit of struct spi_device:mode serves the purpose
of letting the SPI master know if the slave can signal if it is
ready for transfer or not.

The 'wait_enable' platform data was duplicating this functionality.
Use the framework provided method of indicating this capability.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |    1 -
 drivers/spi/davinci_spi.c                |    2 +-
 2 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 734d1fb..fe699140 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -32,7 +32,6 @@ struct davinci_spi_platform_data {
 	u8	wdelay;
 	u8	odd_parity;
 	u8	parity_enable;
-	u8	wait_enable;
 	u8	timer_disable;
 	u8	clk_internal;
 	u8	intr_level;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 17269ad..5480857 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -522,7 +522,7 @@ static int davinci_spi_setup(struct spi_device *spi)
 					SPIFMT_PARITYENA_MASK,
 					spi->chip_select);
 
-		if (davinci_spi->pdata->wait_enable)
+		if (spi->mode & SPI_READY)
 			set_fmt_bits(davinci_spi->base,
 					SPIFMT_WAITENA_MASK,
 					spi->chip_select);
-- 
1.7.3.2

[PATCH 12/49] spi: davinci: make chip-slect specific parameters really chip-select specific

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Some chip-select specific paramterers like wdelay, parity, usage of
chip-select timers (and the actual timer values) are included in
platform data forcing the same behaviour across all chip-selects.

Create a new davinci_spi_config data structure which can be passed
along using controller_data member of spi_device data structure
on a per-device basis.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/dm355.c            |    3 -
 arch/arm/mach-davinci/dm365.c            |    3 -
 arch/arm/mach-davinci/include/mach/spi.h |   13 ++++--
 drivers/spi/davinci_spi.c                |   67 ++++++++++++++++-------------
 4 files changed, 45 insertions(+), 41 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 6a76dfa..a6d9b72 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -413,10 +413,7 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
-	.c2tdelay	= 0,
-	.t2cdelay	= 0,
 };
 static struct platform_device dm355_spi0_device = {
 	.name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index cd623db..80dd159 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -626,10 +626,7 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
-	.c2tdelay	= 0,
-	.t2cdelay	= 0,
 };
 
 static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index fe699140..29c19c4 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -29,17 +29,20 @@ enum {
 struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
-	u8	wdelay;
-	u8	odd_parity;
-	u8	parity_enable;
-	u8	timer_disable;
 	u8	clk_internal;
 	u8	intr_level;
 	u8	poll_mode;
 	u8	use_dma;
+	u8	*chip_sel;
+};
+
+struct davinci_spi_config {
+	u8	wdelay;
+	u8	odd_parity;
+	u8	parity_enable;
+	u8	timer_disable;
 	u8	c2tdelay;
 	u8	t2cdelay;
-	u8	*chip_sel;
 };
 
 #endif	/* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 5480857..d4320f7 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -156,6 +156,8 @@ struct davinci_spi {
 	struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT];
 };
 
+static struct davinci_spi_config davinci_spi_default_cfg;
+
 static unsigned use_dma;
 
 static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
@@ -434,8 +436,12 @@ static int davinci_spi_setup(struct spi_device *spi)
 	int retval;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
+	struct davinci_spi_config *spicfg;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	/* if bits per word length is zero then set it default 8 */
 	if (!spi->bits_per_word)
@@ -496,31 +502,34 @@ static int davinci_spi_setup(struct spi_device *spi)
 	 */
 
 	if (davinci_spi->version == SPI_VERSION_2) {
+
 		clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK,
-				spi->chip_select);
+							spi->chip_select);
 		set_fmt_bits(davinci_spi->base,
-				(davinci_spi->pdata->wdelay
-						<< SPIFMT_WDELAY_SHIFT)
-					& SPIFMT_WDELAY_MASK,
-				spi->chip_select);
+				(spicfg->wdelay << SPIFMT_WDELAY_SHIFT) &
+				SPIFMT_WDELAY_MASK, spi->chip_select);
 
-		if (davinci_spi->pdata->odd_parity)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_ODD_PARITY_MASK,
-					spi->chip_select);
+		if (spicfg->odd_parity)
+			set_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK,
+							spi->chip_select);
 		else
 			clear_fmt_bits(davinci_spi->base,
 					SPIFMT_ODD_PARITY_MASK,
 					spi->chip_select);
 
-		if (davinci_spi->pdata->parity_enable)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_PARITYENA_MASK,
-					spi->chip_select);
+		if (spicfg->parity_enable)
+			set_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK,
+							spi->chip_select);
 		else
-			clear_fmt_bits(davinci_spi->base,
-					SPIFMT_PARITYENA_MASK,
-					spi->chip_select);
+			clear_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK,
+							spi->chip_select);
+
+		if (spicfg->timer_disable)
+			set_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK,
+							spi->chip_select);
+		else
+			clear_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK,
+							spi->chip_select);
 
 		if (spi->mode & SPI_READY)
 			set_fmt_bits(davinci_spi->base,
@@ -531,14 +540,6 @@ static int davinci_spi_setup(struct spi_device *spi)
 					SPIFMT_WAITENA_MASK,
 					spi->chip_select);
 
-		if (davinci_spi->pdata->timer_disable)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_DISTIMER_MASK,
-					spi->chip_select);
-		else
-			clear_fmt_bits(davinci_spi->base,
-					SPIFMT_DISTIMER_MASK,
-					spi->chip_select);
 	}
 
 	retval = davinci_spi_setup_transfer(spi, NULL);
@@ -662,9 +663,13 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	u32 tx_data, data1_reg_val;
 	u32 buf_val, flg_val;
 	struct davinci_spi_platform_data *pdata;
+	struct davinci_spi_config *spicfg;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
@@ -684,8 +689,8 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) |
-			(pdata->t2cdelay << SPI_T2CDELAY_SHIFT),
+	iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
+			(spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
 			davinci_spi->base + SPIDELAY);
 
 	count = davinci_spi->count;
@@ -792,12 +797,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	struct davinci_spi_dma *davinci_spi_dma;
 	int word_len, data_type, ret;
 	unsigned long tx_reg, rx_reg;
-	struct davinci_spi_platform_data *pdata;
+	struct davinci_spi_config *spicfg;
 	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
 	sdev = davinci_spi->bitbang.master->dev.parent;
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
 
@@ -834,8 +841,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 		return ret;
 
 	/* Put delay val if required */
-	iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) |
-			(pdata->t2cdelay << SPI_T2CDELAY_SHIFT),
+	iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
+			(spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
 			davinci_spi->base + SPIDELAY);
 
 	count = davinci_spi->count;	/* the number of elements */
-- 
1.7.3.2

[PATCH 13/49] spi: davinci: consolidate setup of SPIFMTn in one function

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Consolidate the setup of SPIFMTn register under
davinci_spi_setup_transfer() simplifying the code
and avoiding unnecessary reads and writes to the
register.

The two inline functions {set|clear}_fmt_bits() can
be eliminated because of this.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |  154 ++++++++++++++------------------------------
 1 files changed, 49 insertions(+), 105 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index d4320f7..34b28fe 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -52,7 +52,6 @@
 #define SPIFMT_ODD_PARITY_MASK	BIT(23)
 #define SPIFMT_WDELAY_MASK	0x3f000000u
 #define SPIFMT_WDELAY_SHIFT	24
-#define SPIFMT_CHARLEN_MASK	0x0000001Fu
 #define SPIFMT_PRESCALE_SHIFT	8
 
 
@@ -212,16 +211,6 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits)
 	iowrite32(v, addr);
 }
 
-static inline void set_fmt_bits(void __iomem *addr, u32 bits, int cs_num)
-{
-	set_io_bits(addr + SPIFMT0 + (0x4 * cs_num), bits);
-}
-
-static inline void clear_fmt_bits(void __iomem *addr, u32 bits, int cs_num)
-{
-	clear_io_bits(addr + SPIFMT0 + (0x4 * cs_num), bits);
-}
-
 static void davinci_spi_set_dma_req(const struct spi_device *spi, int enable)
 {
 	struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master);
@@ -306,10 +295,14 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 {
 
 	struct davinci_spi *davinci_spi;
+	struct davinci_spi_config *spicfg;
 	u8 bits_per_word = 0;
-	u32 hz = 0, prescale = 0;
+	u32 hz = 0, spifmt = 0, prescale = 0;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	if (t) {
 		bits_per_word = t->bits_per_word;
@@ -338,18 +331,55 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 	if (!hz)
 		hz = spi->max_speed_hz;
 
+	/* Set up SPIFMTn register, unique to this chipselect. */
+
 	prescale = davinci_spi_get_prescale(davinci_spi, hz);
 	if (prescale < 0)
 		return prescale;
 
-	clear_fmt_bits(davinci_spi->base, SPIFMT_CHARLEN_MASK,
-			spi->chip_select);
-	set_fmt_bits(davinci_spi->base, bits_per_word & 0x1f,
-			spi->chip_select);
+	spifmt = (prescale << SPIFMT_PRESCALE_SHIFT) | (bits_per_word & 0x1f);
+
+	if (spi->mode & SPI_LSB_FIRST)
+		spifmt |= SPIFMT_SHIFTDIR_MASK;
+
+	if (spi->mode & SPI_CPOL)
+		spifmt |= SPIFMT_POLARITY_MASK;
+
+	if (!(spi->mode & SPI_CPHA))
+		spifmt |= SPIFMT_PHASE_MASK;
+
+	/*
+	 * Version 1 hardware supports two basic SPI modes:
+	 *  - Standard SPI mode uses 4 pins, with chipselect
+	 *  - 3 pin SPI is a 4 pin variant without CS (SPI_NO_CS)
+	 *	(distinct from SPI_3WIRE, with just one data wire;
+	 *	or similar variants without MOSI or without MISO)
+	 *
+	 * Version 2 hardware supports an optional handshaking signal,
+	 * so it can support two more modes:
+	 *  - 5 pin SPI variant is standard SPI plus SPI_READY
+	 *  - 4 pin with enable is (SPI_READY | SPI_NO_CS)
+	 */
+
+	if (davinci_spi->version == SPI_VERSION_2) {
+
+		spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT)
+							& SPIFMT_WDELAY_MASK);
 
-	clear_fmt_bits(davinci_spi->base, 0x0000ff00, spi->chip_select);
-	set_fmt_bits(davinci_spi->base,
-			prescale << SPIFMT_PRESCALE_SHIFT, spi->chip_select);
+		if (spicfg->odd_parity)
+			spifmt |= SPIFMT_ODD_PARITY_MASK;
+
+		if (spicfg->parity_enable)
+			spifmt |= SPIFMT_PARITYENA_MASK;
+
+		if (spicfg->timer_disable)
+			spifmt |= SPIFMT_DISTIMER_MASK;
+
+		if (spi->mode & SPI_READY)
+			spifmt |= SPIFMT_WAITENA_MASK;
+	}
+
+	iowrite32(spifmt, davinci_spi->base + SPIFMT0);
 
 	return 0;
 }
@@ -436,12 +466,8 @@ static int davinci_spi_setup(struct spi_device *spi)
 	int retval;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
-	struct davinci_spi_config *spicfg;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	spicfg = (struct davinci_spi_config *)spi->controller_data;
-	if (!spicfg)
-		spicfg = &davinci_spi_default_cfg;
 
 	/* if bits per word length is zero then set it default 8 */
 	if (!spi->bits_per_word)
@@ -460,88 +486,6 @@ static int davinci_spi_setup(struct spi_device *spi)
 		}
 	}
 
-	/*
-	 * Set up SPIFMTn register, unique to this chipselect.
-	 *
-	 * NOTE: we could do all of these with one write.  Also, some
-	 * of the "version 2" features are found in chips that don't
-	 * support all of them...
-	 */
-	if (spi->mode & SPI_LSB_FIRST)
-		set_fmt_bits(davinci_spi->base, SPIFMT_SHIFTDIR_MASK,
-				spi->chip_select);
-	else
-		clear_fmt_bits(davinci_spi->base, SPIFMT_SHIFTDIR_MASK,
-				spi->chip_select);
-
-	if (spi->mode & SPI_CPOL)
-		set_fmt_bits(davinci_spi->base, SPIFMT_POLARITY_MASK,
-				spi->chip_select);
-	else
-		clear_fmt_bits(davinci_spi->base, SPIFMT_POLARITY_MASK,
-				spi->chip_select);
-
-	if (!(spi->mode & SPI_CPHA))
-		set_fmt_bits(davinci_spi->base, SPIFMT_PHASE_MASK,
-				spi->chip_select);
-	else
-		clear_fmt_bits(davinci_spi->base, SPIFMT_PHASE_MASK,
-				spi->chip_select);
-
-	/*
-	 * Version 1 hardware supports two basic SPI modes:
-	 *  - Standard SPI mode uses 4 pins, with chipselect
-	 *  - 3 pin SPI is a 4 pin variant without CS (SPI_NO_CS)
-	 *	(distinct from SPI_3WIRE, with just one data wire;
-	 *	or similar variants without MOSI or without MISO)
-	 *
-	 * Version 2 hardware supports an optional handshaking signal,
-	 * so it can support two more modes:
-	 *  - 5 pin SPI variant is standard SPI plus SPI_READY
-	 *  - 4 pin with enable is (SPI_READY | SPI_NO_CS)
-	 */
-
-	if (davinci_spi->version == SPI_VERSION_2) {
-
-		clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK,
-							spi->chip_select);
-		set_fmt_bits(davinci_spi->base,
-				(spicfg->wdelay << SPIFMT_WDELAY_SHIFT) &
-				SPIFMT_WDELAY_MASK, spi->chip_select);
-
-		if (spicfg->odd_parity)
-			set_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK,
-							spi->chip_select);
-		else
-			clear_fmt_bits(davinci_spi->base,
-					SPIFMT_ODD_PARITY_MASK,
-					spi->chip_select);
-
-		if (spicfg->parity_enable)
-			set_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK,
-							spi->chip_select);
-		else
-			clear_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK,
-							spi->chip_select);
-
-		if (spicfg->timer_disable)
-			set_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK,
-							spi->chip_select);
-		else
-			clear_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK,
-							spi->chip_select);
-
-		if (spi->mode & SPI_READY)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_WAITENA_MASK,
-					spi->chip_select);
-		else
-			clear_fmt_bits(davinci_spi->base,
-					SPIFMT_WAITENA_MASK,
-					spi->chip_select);
-
-	}
-
 	retval = davinci_spi_setup_transfer(spi, NULL);
 
 	return retval;
-- 
1.7.3.2

[PATCH 14/49] spi: davinci: setup chip-select timers values only if timer enabled

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Setup chip-select timers values only if timer is enabled
(timer_disbled in spi configuration is false).

As a nice side effect, this patch removes code duplicated in
davinci_spi_bufs_pio() and davinci_spi_bufs_dma().

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   21 ++++-----------------
 1 files changed, 4 insertions(+), 17 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 34b28fe..d09b63c 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -374,6 +374,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 
 		if (spicfg->timer_disable)
 			spifmt |= SPIFMT_DISTIMER_MASK;
+		else
+			iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
+				  (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
+				  davinci_spi->base + SPIDELAY);
 
 		if (spi->mode & SPI_READY)
 			spifmt |= SPIFMT_WAITENA_MASK;
@@ -607,13 +611,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	u32 tx_data, data1_reg_val;
 	u32 buf_val, flg_val;
 	struct davinci_spi_platform_data *pdata;
-	struct davinci_spi_config *spicfg;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
-	spicfg = (struct davinci_spi_config *)spi->controller_data;
-	if (!spicfg)
-		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
@@ -633,10 +633,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
-			(spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
-			davinci_spi->base + SPIDELAY);
-
 	count = davinci_spi->count;
 
 	/* Determine the command to execute READ or WRITE */
@@ -741,14 +737,10 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	struct davinci_spi_dma *davinci_spi_dma;
 	int word_len, data_type, ret;
 	unsigned long tx_reg, rx_reg;
-	struct davinci_spi_config *spicfg;
 	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	sdev = davinci_spi->bitbang.master->dev.parent;
-	spicfg = (struct davinci_spi_config *)spi->controller_data;
-	if (!spicfg)
-		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
 
@@ -784,11 +776,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	if (ret)
 		return ret;
 
-	/* Put delay val if required */
-	iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
-			(spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
-			davinci_spi->base + SPIDELAY);
-
 	count = davinci_spi->count;	/* the number of elements */
 
 	/* disable all interrupts for dma transfers */
-- 
1.7.3.2

[PATCH 15/49] spi: davinci: add support for wait enable timeouts

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Just enabling WAITENA in SPIFMTn register waits for the
enable signal from the slave indefinitely. Allow support
for finite waiting by adding support for c2e delay
(maximum time for addressed slave to respond) and t2e
delay (maximum time for slave to respond after transmit
data finished).

While at it, modify the T2C and C2T defines by prepending
the register name as is the convention followed for other
register field elsewhere in the driver.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |    2 +
 drivers/spi/davinci_spi.c                |   36 ++++++++++++++++++++++-------
 2 files changed, 29 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 29c19c4..483b055 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -43,6 +43,8 @@ struct davinci_spi_config {
 	u8	timer_disable;
 	u8	c2tdelay;
 	u8	t2cdelay;
+	u8	t2edelay;
+	u8	c2edelay;
 };
 
 #endif	/* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index d09b63c..e94c638 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -78,6 +78,16 @@
 #define SPIBUF_TXFULL_MASK	BIT(29)
 #define SPIBUF_RXEMPTY_MASK	BIT(31)
 
+/* SPIDELAY */
+#define SPIDELAY_C2TDELAY_SHIFT 24
+#define SPIDELAY_C2TDELAY_MASK  (0xFF << SPIDELAY_C2TDELAY_SHIFT)
+#define SPIDELAY_T2CDELAY_SHIFT 16
+#define SPIDELAY_T2CDELAY_MASK  (0xFF << SPIDELAY_T2CDELAY_SHIFT)
+#define SPIDELAY_T2EDELAY_SHIFT 8
+#define SPIDELAY_T2EDELAY_MASK  (0xFF << SPIDELAY_T2EDELAY_SHIFT)
+#define SPIDELAY_C2EDELAY_SHIFT 0
+#define SPIDELAY_C2EDELAY_MASK  0xFF
+
 /* Error Masks */
 #define SPIFLG_DLEN_ERR_MASK		BIT(0)
 #define SPIFLG_TIMEOUT_MASK		BIT(1)
@@ -95,9 +105,6 @@
 #define SPIINT_TX_INTR		BIT(9)
 #define SPIINT_DMA_REQ_EN	BIT(16)
 
-#define SPI_T2CDELAY_SHIFT	16
-#define SPI_C2TDELAY_SHIFT	24
-
 /* SPI Controller registers */
 #define SPIGCR0		0x00
 #define SPIGCR1		0x04
@@ -363,6 +370,8 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 
 	if (davinci_spi->version == SPI_VERSION_2) {
 
+		u32 delay = 0;
+
 		spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT)
 							& SPIFMT_WDELAY_MASK);
 
@@ -372,15 +381,24 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 		if (spicfg->parity_enable)
 			spifmt |= SPIFMT_PARITYENA_MASK;
 
-		if (spicfg->timer_disable)
+		if (spicfg->timer_disable) {
 			spifmt |= SPIFMT_DISTIMER_MASK;
-		else
-			iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
-				  (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
-				  davinci_spi->base + SPIDELAY);
+		} else {
+			delay |= (spicfg->c2tdelay << SPIDELAY_C2TDELAY_SHIFT)
+						& SPIDELAY_C2TDELAY_MASK;
+			delay |= (spicfg->t2cdelay << SPIDELAY_T2CDELAY_SHIFT)
+						& SPIDELAY_T2CDELAY_MASK;
+		}
 
-		if (spi->mode & SPI_READY)
+		if (spi->mode & SPI_READY) {
 			spifmt |= SPIFMT_WAITENA_MASK;
+			delay |= (spicfg->t2edelay << SPIDELAY_T2EDELAY_SHIFT)
+						& SPIDELAY_T2EDELAY_MASK;
+			delay |= (spicfg->c2edelay << SPIDELAY_C2EDELAY_SHIFT)
+						& SPIDELAY_C2EDELAY_MASK;
+		}
+
+		iowrite32(delay, davinci_spi->base + SPIDELAY);
 	}
 
 	iowrite32(spifmt, davinci_spi->base + SPIFMT0);
-- 
1.7.3.2

[PATCH 16/49] spi: davinci: remove unused members of davinci_spi_slave

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Several members of struct davinci_spi_slave are unused in code.
Remove such members.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    5 -----
 1 files changed, 0 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index e94c638..31b9c22 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -119,10 +119,7 @@
 #define SPIFMT0		0x50
 
 struct davinci_spi_slave {
-	u32	cmd_to_write;
-	u32	clk_ctrl_to_write;
 	u32	bytes_per_word;
-	u8	active_cs;
 };
 
 /* We have 2 DMA channels per CS, one for RX and one for TX */
@@ -495,8 +492,6 @@ static int davinci_spi_setup(struct spi_device *spi)
 	if (!spi->bits_per_word)
 		spi->bits_per_word = 8;
 
-	davinci_spi->slave[spi->chip_select].cmd_to_write = 0;
-
 	if (use_dma && davinci_spi->dma_channels) {
 		davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
 
-- 
1.7.3.2

[PATCH 17/49] spi: davinci: eliminate the single member structure davinci_spi_slave

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The struct davinci_spi_slave has a single member. Eliminate it
and store the per-chipselect data in struct davinci_spi directly.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   14 +++++---------
 1 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 31b9c22..3dac2038 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -118,10 +118,6 @@
 #define SPIDEF		0x4c
 #define SPIFMT0		0x50
 
-struct davinci_spi_slave {
-	u32	bytes_per_word;
-};
-
 /* We have 2 DMA channels per CS, one for RX and one for TX */
 struct davinci_spi_dma {
 	int			dma_tx_channel;
@@ -156,7 +152,7 @@ struct davinci_spi {
 	void			(*get_rx)(u32 rx_data, struct davinci_spi *);
 	u32			(*get_tx)(struct davinci_spi *);
 
-	struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT];
+	u8			bytes_per_word[SPI_MAX_CHIPSELECT];
 };
 
 static struct davinci_spi_config davinci_spi_default_cfg;
@@ -324,11 +320,11 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 	if (bits_per_word <= 8 && bits_per_word >= 2) {
 		davinci_spi->get_rx = davinci_spi_rx_buf_u8;
 		davinci_spi->get_tx = davinci_spi_tx_buf_u8;
-		davinci_spi->slave[spi->chip_select].bytes_per_word = 1;
+		davinci_spi->bytes_per_word[spi->chip_select] = 1;
 	} else if (bits_per_word <= 16 && bits_per_word >= 2) {
 		davinci_spi->get_rx = davinci_spi_rx_buf_u16;
 		davinci_spi->get_tx = davinci_spi_tx_buf_u16;
-		davinci_spi->slave[spi->chip_select].bytes_per_word = 2;
+		davinci_spi->bytes_per_word[spi->chip_select] = 2;
 	} else
 		return -EINVAL;
 
@@ -632,7 +628,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	davinci_spi->rx = t->rx_buf;
 
 	/* convert len to words based on bits_per_word */
-	conv = davinci_spi->slave[spi->chip_select].bytes_per_word;
+	conv = davinci_spi->bytes_per_word[spi->chip_select];
 	davinci_spi->count = t->len / conv;
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
@@ -764,7 +760,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	davinci_spi->rx = t->rx_buf;
 
 	/* convert len to words based on bits_per_word */
-	conv = davinci_spi->slave[spi->chip_select].bytes_per_word;
+	conv = davinci_spi->bytes_per_word[spi->chip_select];
 	davinci_spi->count = t->len / conv;
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
-- 
1.7.3.2

[PATCH 18/49] spi: davinci: eliminate unnecessary update of davinci_spi->count

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The count member of davinci_spi is internal to the driver and
is not shared with framework. Eliminate its unnecessary update.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 3dac2038..f1c3502 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -726,9 +726,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	if (ret != 0)
 		return ret;
 
-	/* SPI Framework maintains the count only in bytes so convert back */
-	davinci_spi->count *= conv;
-
 	return t->len;
 }
 
@@ -880,9 +877,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	if (ret != 0)
 		return ret;
 
-	/* SPI Framework maintains the count only in bytes so convert back */
-	davinci_spi->count *= conv;
-
 	return t->len;
 }
 
-- 
1.7.3.2

[PATCH 19/49] spi: davinci: simplify calculation of edma acount value

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The EDMA acount (called data_type in davinci_spi_bufs_dma())
is simply the bytes_per_word obtained in the transfer setup
function. The current code calculates the acount value from
bytes_per_word in a convoluted manner. Simplify the code.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   25 +++----------------------
 1 files changed, 3 insertions(+), 22 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index f1c3502..b0b338f 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -39,9 +39,6 @@
 #define CS_DEFAULT	0xFF
 
 #define SPI_BUFSIZ	(SMP_CACHE_BYTES + 1)
-#define DAVINCI_DMA_DATA_TYPE_S8	0x01
-#define DAVINCI_DMA_DATA_TYPE_S16	0x02
-#define DAVINCI_DMA_DATA_TYPE_S32	0x04
 
 #define SPIFMT_PHASE_MASK	BIT(16)
 #define SPIFMT_POLARITY_MASK	BIT(17)
@@ -729,19 +726,14 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	return t->len;
 }
 
-#define DAVINCI_DMA_DATA_TYPE_S8	0x01
-#define DAVINCI_DMA_DATA_TYPE_S16	0x02
-#define DAVINCI_DMA_DATA_TYPE_S32	0x04
-
 static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
 	int int_status = 0;
 	int count, temp_count;
-	u8 conv = 1;
 	u32 data1_reg_val;
 	struct davinci_spi_dma *davinci_spi_dma;
-	int word_len, data_type, ret;
+	int data_type, ret;
 	unsigned long tx_reg, rx_reg;
 	struct device *sdev;
 
@@ -757,8 +749,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	davinci_spi->rx = t->rx_buf;
 
 	/* convert len to words based on bits_per_word */
-	conv = davinci_spi->bytes_per_word[spi->chip_select];
-	davinci_spi->count = t->len / conv;
+	data_type = davinci_spi->bytes_per_word[spi->chip_select];
+	davinci_spi->count = t->len / data_type;
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
@@ -767,17 +759,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	init_completion(&davinci_spi_dma->dma_rx_completion);
 	init_completion(&davinci_spi_dma->dma_tx_completion);
 
-	word_len = conv * 8;
-
-	if (word_len <= 8)
-		data_type = DAVINCI_DMA_DATA_TYPE_S8;
-	else if (word_len <= 16)
-		data_type = DAVINCI_DMA_DATA_TYPE_S16;
-	else if (word_len <= 32)
-		data_type = DAVINCI_DMA_DATA_TYPE_S32;
-	else
-		return -EINVAL;
-
 	ret = davinci_spi_bufs_prep(spi, davinci_spi);
 	if (ret)
 		return ret;
-- 
1.7.3.2

[PATCH 20/49] spi: davinci: check for NULL buffer pointer before using it

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

In the davinci_spi_{tx|rx}_u{8|16}() functions, check for
buffer pointer being valid before using it. While providing
for better error checking, this change will help simplify
code in the caller.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   40 ++++++++++++++++++++++------------------
 1 files changed, 22 insertions(+), 18 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index b0b338f..10b0a08 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -158,37 +158,41 @@ static unsigned use_dma;
 
 static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
 {
-	u8 *rx = davinci_spi->rx;
-
-	*rx++ = (u8)data;
-	davinci_spi->rx = rx;
+	if (davinci_spi->rx) {
+		u8 *rx = davinci_spi->rx;
+		*rx++ = (u8)data;
+		davinci_spi->rx = rx;
+	}
 }
 
 static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *davinci_spi)
 {
-	u16 *rx = davinci_spi->rx;
-
-	*rx++ = (u16)data;
-	davinci_spi->rx = rx;
+	if (davinci_spi->rx) {
+		u16 *rx = davinci_spi->rx;
+		*rx++ = (u16)data;
+		davinci_spi->rx = rx;
+	}
 }
 
 static u32 davinci_spi_tx_buf_u8(struct davinci_spi *davinci_spi)
 {
-	u32 data;
-	const u8 *tx = davinci_spi->tx;
-
-	data = *tx++;
-	davinci_spi->tx = tx;
+	u32 data = 0;
+	if (davinci_spi->tx) {
+		const u8 *tx = davinci_spi->tx;
+		data = *tx++;
+		davinci_spi->tx = tx;
+	}
 	return data;
 }
 
 static u32 davinci_spi_tx_buf_u16(struct davinci_spi *davinci_spi)
 {
-	u32 data;
-	const u16 *tx = davinci_spi->tx;
-
-	data = *tx++;
-	davinci_spi->tx = tx;
+	u32 data = 0;
+	if (davinci_spi->tx) {
+		const u16 *tx = davinci_spi->tx;
+		data = *tx++;
+		davinci_spi->tx = tx;
+	}
 	return data;
 }
 
-- 
1.7.3.2

[PATCH 21/49] spi: davinci: remove unnecessary disable of SPI

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

In the davinci_spi_bufs_dma() function, SPI is briefly disabled
before enabling it immediately back again.

Remove this unnecessary disable.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 10b0a08..1169e8e 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -771,8 +771,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	/* disable all interrupts for dma transfers */
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
-	/* Disable SPI to write configuration bits in SPIDAT */
-	clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-- 
1.7.3.2

[PATCH 22/49] spi: davinci: remove unnecessary 'count' variable in driver private data

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The variable count in DaVinci SPI driver's private data is
largely unused and its minor use can easily be eliminated.

Remove the variable.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   10 +++-------
 1 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 1169e8e..ad814f2 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -142,7 +142,6 @@ struct davinci_spi {
 	const void		*tx;
 	void			*rx;
 	u8			*tmp_buf;
-	int			count;
 	struct davinci_spi_dma	*dma_channels;
 	struct davinci_spi_platform_data *pdata;
 
@@ -630,8 +629,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 
 	/* convert len to words based on bits_per_word */
 	conv = davinci_spi->bytes_per_word[spi->chip_select];
-	davinci_spi->count = t->len / conv;
-
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
 	INIT_COMPLETION(davinci_spi->done);
@@ -643,7 +640,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	count = davinci_spi->count;
+	count = t->len / conv;
 
 	/* Determine the command to execute READ or WRITE */
 	if (t->tx_buf) {
@@ -699,7 +696,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 		} else {	/* Receive in Interrupt mode */
 			int i;
 
-			for (i = 0; i < davinci_spi->count; i++) {
+			for (i = 0; i < count; i++) {
 				set_io_bits(davinci_spi->base + SPIINT,
 						SPIINT_BITERR_INTR
 						| SPIINT_OVRRUN_INTR
@@ -754,7 +751,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	/* convert len to words based on bits_per_word */
 	data_type = davinci_spi->bytes_per_word[spi->chip_select];
-	davinci_spi->count = t->len / data_type;
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
@@ -767,7 +763,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	if (ret)
 		return ret;
 
-	count = davinci_spi->count;	/* the number of elements */
+	count = t->len / data_type;	/* the number of elements */
 
 	/* disable all interrupts for dma transfers */
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
-- 
1.7.3.2


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[PATCH 23/49] spi: davinci: do not treat Tx interrupt being set as error

[Sekhar Nori]

In davinci_spi_check_error(), Tx interrupt being set is
treated as error. This function is only meant to flag
bus error conditions and Tx interrupt being set at that
point is not a bus error but rather a driver bug.

Stop checking for Tx interrupt and flagging that as an
IO error.

Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index ad814f2..a60a65c 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -590,10 +590,6 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 			dev_dbg(sdev, "SPI Data Overrun error\n");
 			return -EIO;
 		}
-		if (int_status & SPIFLG_TX_INTR_MASK) {
-			dev_dbg(sdev, "SPI TX intr bit set\n");
-			return -EIO;
-		}
 		if (int_status & SPIFLG_BUF_INIT_ACTIVE_MASK) {
 			dev_dbg(sdev, "SPI Buffer Init Active\n");
 			return -EBUSY;
-- 
1.7.3.2

[PATCH 24/49] spi: davinci: remove unnecessary completion variable initialization

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The completion variable 'done' is unnecessarly initialized by
the function davinci_spi_bufs_dma() where as it is not used
for DMA transfers at all.

Remove the unnecessary initialization.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index a60a65c..54d06f4 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -750,8 +750,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
-	INIT_COMPLETION(davinci_spi->done);
-
 	init_completion(&davinci_spi_dma->dma_rx_completion);
 	init_completion(&davinci_spi_dma->dma_tx_completion);
 
-- 
1.7.3.2

[PATCH 25/49] spi: davinci: remove non-useful interrupt mode support

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The interrupt mode support as it stands is another version
of poll mode. Even when interrupt mode is selected, the code
tight loops on interrupt status register, rendering it totally
useless. A completion variable is initialized, but never used.

Remove this fake interrupt mode since users can anyway use
poll mode with no functional difference. A usefully implemented
interrupt mode support can be added later.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/dm355.c            |    1 -
 arch/arm/mach-davinci/dm365.c            |    1 -
 arch/arm/mach-davinci/include/mach/spi.h |    2 -
 drivers/spi/davinci_spi.c                |  126 +++++-------------------------
 4 files changed, 19 insertions(+), 111 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a6d9b72..e311f29 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -413,7 +413,6 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 };
 static struct platform_device dm355_spi0_device = {
 	.name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 80dd159..1e5012e 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -626,7 +626,6 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 };
 
 static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 483b055..e68afe2 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -30,8 +30,6 @@ struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
 	u8	clk_internal;
-	u8	intr_level;
-	u8	poll_mode;
 	u8	use_dma;
 	u8	*chip_sel;
 };
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 54d06f4..198f062 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -59,8 +59,6 @@
 #define SPIPC0_SPIENA_MASK	BIT(8)		/* nREADY */
 
 #define SPIINT_MASKALL		0x0101035F
-#define SPI_INTLVL_1		0x000001FFu
-#define SPI_INTLVL_0		0x00000000u
 
 /* SPIDAT1 (upper 16 bit defines) */
 #define SPIDAT1_CSHOLD_MASK	BIT(12)
@@ -92,14 +90,8 @@
 #define SPIFLG_DESYNC_MASK		BIT(3)
 #define SPIFLG_BITERR_MASK		BIT(4)
 #define SPIFLG_OVRRUN_MASK		BIT(6)
-#define SPIFLG_RX_INTR_MASK		BIT(8)
-#define SPIFLG_TX_INTR_MASK		BIT(9)
 #define SPIFLG_BUF_INIT_ACTIVE_MASK	BIT(24)
 
-#define SPIINT_BITERR_INTR	BIT(4)
-#define SPIINT_OVRRUN_INTR	BIT(6)
-#define SPIINT_RX_INTR		BIT(8)
-#define SPIINT_TX_INTR		BIT(9)
 #define SPIINT_DMA_REQ_EN	BIT(16)
 
 /* SPI Controller registers */
@@ -136,8 +128,6 @@ struct davinci_spi {
 	resource_size_t		pbase;
 	void __iomem		*base;
 	size_t			region_size;
-	u32			irq;
-	struct completion	done;
 
 	const void		*tx;
 	void			*rx;
@@ -611,7 +601,7 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
-	int int_status, count, ret;
+	int status, count, ret;
 	u8 conv;
 	u32 tx_data, data1_reg_val;
 	u32 buf_val, flg_val;
@@ -627,8 +617,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	conv = davinci_spi->bytes_per_word[spi->chip_select];
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
-	INIT_COMPLETION(davinci_spi->done);
-
 	ret = davinci_spi_bufs_prep(spi, davinci_spi);
 	if (ret)
 		return ret;
@@ -638,9 +626,10 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 
 	count = t->len / conv;
 
+	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
+
 	/* Determine the command to execute READ or WRITE */
 	if (t->tx_buf) {
-		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
 
 		while (1) {
 			tx_data = davinci_spi->get_tx(davinci_spi);
@@ -668,45 +657,25 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 				break;
 		}
 	} else {
-		if (pdata->poll_mode) {
-			while (1) {
-				/* keeps the serial clock going */
-				if ((ioread32(davinci_spi->base + SPIBUF)
-						& SPIBUF_TXFULL_MASK) == 0)
-					iowrite32(data1_reg_val,
-						davinci_spi->base + SPIDAT1);
+		while (1) {
+			/* keeps the serial clock going */
+			if ((ioread32(davinci_spi->base + SPIBUF)
+					& SPIBUF_TXFULL_MASK) == 0)
+				iowrite32(data1_reg_val,
+					davinci_spi->base + SPIDAT1);
 
 				while (ioread32(davinci_spi->base + SPIBUF) &
-						SPIBUF_RXEMPTY_MASK)
+							SPIBUF_RXEMPTY_MASK)
 					cpu_relax();
 
-				flg_val = ioread32(davinci_spi->base + SPIFLG);
-				buf_val = ioread32(davinci_spi->base + SPIBUF);
-
-				davinci_spi->get_rx(buf_val, davinci_spi);
-
-				count--;
-				if (count <= 0)
-					break;
-			}
-		} else {	/* Receive in Interrupt mode */
-			int i;
-
-			for (i = 0; i < count; i++) {
-				set_io_bits(davinci_spi->base + SPIINT,
-						SPIINT_BITERR_INTR
-						| SPIINT_OVRRUN_INTR
-						| SPIINT_RX_INTR);
+			flg_val = ioread32(davinci_spi->base + SPIFLG);
+			buf_val = ioread32(davinci_spi->base + SPIBUF);
 
-				iowrite32(data1_reg_val,
-						davinci_spi->base + SPIDAT1);
+			davinci_spi->get_rx(buf_val, davinci_spi);
 
-				while (ioread32(davinci_spi->base + SPIINT) &
-						SPIINT_RX_INTR)
-					cpu_relax();
-			}
-			iowrite32((data1_reg_val & 0x0ffcffff),
-					davinci_spi->base + SPIDAT1);
+			count--;
+			if (count <= 0)
+				break;
 		}
 	}
 
@@ -714,9 +683,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
 	 */
-	int_status = ioread32(davinci_spi->base + SPIFLG);
+	status = ioread32(davinci_spi->base + SPIFLG);
 
-	ret = davinci_spi_check_error(davinci_spi, int_status);
+	ret = davinci_spi_check_error(davinci_spi, status);
 	if (ret != 0)
 		return ret;
 
@@ -854,38 +823,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 }
 
 /**
- * davinci_spi_irq - IRQ handler for DaVinci SPI
- * @irq: IRQ number for this SPI Master
- * @context_data: structure for SPI Master controller davinci_spi
- */
-static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
-{
-	struct davinci_spi *davinci_spi = context_data;
-	u32 int_status, rx_data = 0;
-	irqreturn_t ret = IRQ_NONE;
-
-	int_status = ioread32(davinci_spi->base + SPIFLG);
-
-	while ((int_status & SPIFLG_RX_INTR_MASK)) {
-		if (likely(int_status & SPIFLG_RX_INTR_MASK)) {
-			ret = IRQ_HANDLED;
-
-			rx_data = ioread32(davinci_spi->base + SPIBUF);
-			davinci_spi->get_rx(rx_data, davinci_spi);
-
-			/* Disable Receive Interrupt */
-			iowrite32(~(SPIINT_RX_INTR | SPIINT_TX_INTR),
-					davinci_spi->base + SPIINT);
-		} else
-			(void)davinci_spi_check_error(davinci_spi, int_status);
-
-		int_status = ioread32(davinci_spi->base + SPIFLG);
-	}
-
-	return ret;
-}
-
-/**
  * davinci_spi_probe - probe function for SPI Master Controller
  * @pdev: platform_device structure which contains plateform specific data
  */
@@ -943,22 +880,11 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		goto release_region;
 	}
 
-	davinci_spi->irq = platform_get_irq(pdev, 0);
-	if (davinci_spi->irq <= 0) {
-		ret = -EINVAL;
-		goto unmap_io;
-	}
-
-	ret = request_irq(davinci_spi->irq, davinci_spi_irq, IRQF_DISABLED,
-			  dev_name(&pdev->dev), davinci_spi);
-	if (ret)
-		goto unmap_io;
-
 	/* Allocate tmp_buf for tx_buf */
 	davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL);
 	if (davinci_spi->tmp_buf == NULL) {
 		ret = -ENOMEM;
-		goto irq_free;
+		goto unmap_io;
 	}
 
 	davinci_spi->bitbang.master = spi_master_get(master);
@@ -1034,8 +960,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	davinci_spi->get_rx = davinci_spi_rx_buf_u8;
 	davinci_spi->get_tx = davinci_spi_tx_buf_u8;
 
-	init_completion(&davinci_spi->done);
-
 	/* Reset In/OUT SPI module */
 	iowrite32(0, davinci_spi->base + SPIGCR0);
 	udelay(100);
@@ -1062,21 +986,12 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	/* master mode default */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
 
-	if (davinci_spi->pdata->intr_level)
-		iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
-	else
-		iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL);
-
 	ret = spi_bitbang_start(&davinci_spi->bitbang);
 	if (ret)
 		goto free_clk;
 
 	dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base);
 
-	if (!pdata->poll_mode)
-		dev_info(&pdev->dev, "Operating in interrupt mode"
-			" using IRQ %d\n", davinci_spi->irq);
-
 	return ret;
 
 free_clk:
@@ -1086,8 +1001,6 @@ put_master:
 	spi_master_put(master);
 free_tmp_buf:
 	kfree(davinci_spi->tmp_buf);
-irq_free:
-	free_irq(davinci_spi->irq, davinci_spi);
 unmap_io:
 	iounmap(davinci_spi->base);
 release_region:
@@ -1121,7 +1034,6 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 	clk_put(davinci_spi->clk);
 	spi_master_put(master);
 	kfree(davinci_spi->tmp_buf);
-	free_irq(davinci_spi->irq, davinci_spi);
 	iounmap(davinci_spi->base);
 	release_mem_region(davinci_spi->pbase, davinci_spi->region_size);
 
-- 
1.7.3.2

[PATCH 26/49] spi: davinci: simplify poll mode transfers

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Use the fact that the get_tx and get_rx can now cope with
NULL buffer pointers to simplify the poll mode transfer
code.

While at it, check for SPI errors every transfer rather than
at the end of the whole transfer.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   96 +++++++++++++++++++--------------------------
 1 files changed, 41 insertions(+), 55 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 198f062..cd37697 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -91,6 +91,10 @@
 #define SPIFLG_BITERR_MASK		BIT(4)
 #define SPIFLG_OVRRUN_MASK		BIT(6)
 #define SPIFLG_BUF_INIT_ACTIVE_MASK	BIT(24)
+#define SPIFLG_ERROR_MASK		(SPIFLG_DLEN_ERR_MASK \
+				| SPIFLG_TIMEOUT_MASK | SPIFLG_PARERR_MASK \
+				| SPIFLG_DESYNC_MASK | SPIFLG_BITERR_MASK \
+				| SPIFLG_OVRRUN_MASK)
 
 #define SPIINT_DMA_REQ_EN	BIT(16)
 
@@ -601,10 +605,10 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
-	int status, count, ret;
-	u8 conv;
+	int ret;
+	int rcount, wcount;
 	u32 tx_data, data1_reg_val;
-	u32 buf_val, flg_val;
+	u32 errors = 0;
 	struct davinci_spi_platform_data *pdata;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
@@ -612,70 +616,51 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
-
-	/* convert len to words based on bits_per_word */
-	conv = davinci_spi->bytes_per_word[spi->chip_select];
-	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
+	wcount = t->len / davinci_spi->bytes_per_word[spi->chip_select];
+	rcount = wcount;
 
 	ret = davinci_spi_bufs_prep(spi, davinci_spi);
 	if (ret)
 		return ret;
 
+	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
+
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	count = t->len / conv;
-
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
 
-	/* Determine the command to execute READ or WRITE */
-	if (t->tx_buf) {
+	/* start the transfer */
+	wcount--;
+	tx_data = davinci_spi->get_tx(davinci_spi);
+	data1_reg_val &= 0xFFFF0000;
+	data1_reg_val |= tx_data & 0xFFFF;
+	iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
 
-		while (1) {
-			tx_data = davinci_spi->get_tx(davinci_spi);
+	while (rcount > 0 || wcount > 0) {
 
-			data1_reg_val &= ~(0xFFFF);
-			data1_reg_val |= (0xFFFF & tx_data);
-
-			buf_val = ioread32(davinci_spi->base + SPIBUF);
-			if ((buf_val & SPIBUF_TXFULL_MASK) == 0) {
-				iowrite32(data1_reg_val,
-						davinci_spi->base + SPIDAT1);
-
-				count--;
-			}
-			while (ioread32(davinci_spi->base + SPIBUF)
-					& SPIBUF_RXEMPTY_MASK)
-				cpu_relax();
-
-			/* getting the returned byte */
-			if (t->rx_buf) {
-				buf_val = ioread32(davinci_spi->base + SPIBUF);
-				davinci_spi->get_rx(buf_val, davinci_spi);
-			}
-			if (count <= 0)
-				break;
-		}
-	} else {
-		while (1) {
-			/* keeps the serial clock going */
-			if ((ioread32(davinci_spi->base + SPIBUF)
-					& SPIBUF_TXFULL_MASK) == 0)
-				iowrite32(data1_reg_val,
-					davinci_spi->base + SPIDAT1);
+		u32 buf, status;
 
-				while (ioread32(davinci_spi->base + SPIBUF) &
-							SPIBUF_RXEMPTY_MASK)
-					cpu_relax();
+		buf = ioread32(davinci_spi->base + SPIBUF);
 
-			flg_val = ioread32(davinci_spi->base + SPIFLG);
-			buf_val = ioread32(davinci_spi->base + SPIBUF);
+		if (!(buf & SPIBUF_RXEMPTY_MASK)) {
+			davinci_spi->get_rx(buf & 0xFFFF, davinci_spi);
+			rcount--;
+		}
 
-			davinci_spi->get_rx(buf_val, davinci_spi);
+		status = ioread32(davinci_spi->base + SPIFLG);
 
-			count--;
-			if (count <= 0)
-				break;
+		if (unlikely(status & SPIFLG_ERROR_MASK)) {
+			errors = status & SPIFLG_ERROR_MASK;
+			break;
+		}
+
+		if (wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) {
+			wcount--;
+			tx_data = davinci_spi->get_tx(davinci_spi);
+			data1_reg_val &= ~0xFFFF;
+			data1_reg_val |= 0xFFFF & tx_data;
+			iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
 		}
 	}
 
@@ -683,11 +668,12 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
 	 */
-	status = ioread32(davinci_spi->base + SPIFLG);
-
-	ret = davinci_spi_check_error(davinci_spi, status);
-	if (ret != 0)
+	if (errors) {
+		ret = davinci_spi_check_error(davinci_spi, errors);
+		WARN(!ret, "%s: error reported but no error found!\n",
+							dev_name(&spi->dev));
 		return ret;
+	}
 
 	return t->len;
 }
-- 
1.7.3.2

[PATCH 27/49] spi: davinci: add support for interrupt mode

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Add support for SPI interrupt mode operation.

Define a per chip-select "io type" variable which
specifies if the transfers on this chip-select should
happen in interrupt mode or polled mode.

Introduce a new function davinci_spi_process_events()
to help consolidate the code between interrupt mode
processing and polled mode processing.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |    4 +
 drivers/spi/davinci_spi.c                |  145 +++++++++++++++++++++++------
 2 files changed, 119 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index e68afe2..ab45b89 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -30,6 +30,7 @@ struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
 	u8	clk_internal;
+	u8	intr_line;
 	u8	use_dma;
 	u8	*chip_sel;
 };
@@ -38,6 +39,9 @@ struct davinci_spi_config {
 	u8	wdelay;
 	u8	odd_parity;
 	u8	parity_enable;
+#define SPI_IO_TYPE_INTR	0
+#define SPI_IO_TYPE_POLL	1
+	u8	io_type;
 	u8	timer_disable;
 	u8	c2tdelay;
 	u8	t2cdelay;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index cd37697..45cc1a7 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -59,6 +59,9 @@
 #define SPIPC0_SPIENA_MASK	BIT(8)		/* nREADY */
 
 #define SPIINT_MASKALL		0x0101035F
+#define SPIINT_MASKINT		0x0000015F
+#define SPI_INTLVL_1		0x000001FF
+#define SPI_INTLVL_0		0x00000000
 
 /* SPIDAT1 (upper 16 bit defines) */
 #define SPIDAT1_CSHOLD_MASK	BIT(12)
@@ -132,10 +135,14 @@ struct davinci_spi {
 	resource_size_t		pbase;
 	void __iomem		*base;
 	size_t			region_size;
+	u32			irq;
+	struct completion	done;
 
 	const void		*tx;
 	void			*rx;
 	u8			*tmp_buf;
+	int			rcount;
+	int			wcount;
 	struct davinci_spi_dma	*dma_channels;
 	struct davinci_spi_platform_data *pdata;
 
@@ -594,6 +601,43 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 }
 
 /**
+ * davinci_spi_process_events - check for and handle any SPI controller events
+ * @davinci_spi: the controller data
+ *
+ * This function will check the SPIFLG register and handle any events that are
+ * detected there
+ */
+static int davinci_spi_process_events(struct davinci_spi *davinci_spi)
+{
+	u32 buf, status, errors = 0, data1_reg_val;
+
+	buf = ioread32(davinci_spi->base + SPIBUF);
+
+	if (davinci_spi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) {
+		davinci_spi->get_rx(buf & 0xFFFF, davinci_spi);
+		davinci_spi->rcount--;
+	}
+
+	status = ioread32(davinci_spi->base + SPIFLG);
+
+	if (unlikely(status & SPIFLG_ERROR_MASK)) {
+		errors = status & SPIFLG_ERROR_MASK;
+		goto out;
+	}
+
+	if (davinci_spi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) {
+		data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
+		davinci_spi->wcount--;
+		data1_reg_val &= ~0xFFFF;
+		data1_reg_val |= 0xFFFF & davinci_spi->get_tx(davinci_spi);
+		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+	}
+
+out:
+	return errors;
+}
+
+/**
  * davinci_spi_bufs - functions which will handle transfer data
  * @spi: spi device on which data transfer to be done
  * @t: spi transfer in which transfer info is filled
@@ -606,18 +650,22 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
 	int ret;
-	int rcount, wcount;
 	u32 tx_data, data1_reg_val;
 	u32 errors = 0;
+	struct davinci_spi_config *spicfg;
 	struct davinci_spi_platform_data *pdata;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
-	wcount = t->len / davinci_spi->bytes_per_word[spi->chip_select];
-	rcount = wcount;
+	davinci_spi->wcount = t->len /
+				davinci_spi->bytes_per_word[spi->chip_select];
+	davinci_spi->rcount = davinci_spi->wcount;
 
 	ret = davinci_spi_bufs_prep(spi, davinci_spi);
 	if (ret)
@@ -628,42 +676,32 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
+	if (spicfg->io_type == SPI_IO_TYPE_INTR) {
+		set_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT);
+		INIT_COMPLETION(davinci_spi->done);
+	}
 
 	/* start the transfer */
-	wcount--;
+	davinci_spi->wcount--;
 	tx_data = davinci_spi->get_tx(davinci_spi);
 	data1_reg_val &= 0xFFFF0000;
 	data1_reg_val |= tx_data & 0xFFFF;
 	iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
 
-	while (rcount > 0 || wcount > 0) {
-
-		u32 buf, status;
-
-		buf = ioread32(davinci_spi->base + SPIBUF);
-
-		if (!(buf & SPIBUF_RXEMPTY_MASK)) {
-			davinci_spi->get_rx(buf & 0xFFFF, davinci_spi);
-			rcount--;
-		}
-
-		status = ioread32(davinci_spi->base + SPIFLG);
-
-		if (unlikely(status & SPIFLG_ERROR_MASK)) {
-			errors = status & SPIFLG_ERROR_MASK;
-			break;
-		}
-
-		if (wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) {
-			wcount--;
-			tx_data = davinci_spi->get_tx(davinci_spi);
-			data1_reg_val &= ~0xFFFF;
-			data1_reg_val |= 0xFFFF & tx_data;
-			iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+	/* Wait for the transfer to complete */
+	if (spicfg->io_type == SPI_IO_TYPE_INTR) {
+		wait_for_completion_interruptible(&(davinci_spi->done));
+	} else {
+		while (davinci_spi->rcount > 0 || davinci_spi->wcount > 0) {
+			errors = davinci_spi_process_events(davinci_spi);
+			if (errors)
+				break;
+			cpu_relax();
 		}
 	}
 
+	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
+
 	/*
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
@@ -678,6 +716,32 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	return t->len;
 }
 
+/**
+ * davinci_spi_irq - Interrupt handler for SPI Master Controller
+ * @irq: IRQ number for this SPI Master
+ * @context_data: structure for SPI Master controller davinci_spi
+ *
+ * ISR will determine that interrupt arrives either for READ or WRITE command.
+ * According to command it will do the appropriate action. It will check
+ * transfer length and if it is not zero then dispatch transfer command again.
+ * If transfer length is zero then it will indicate the COMPLETION so that
+ * davinci_spi_bufs function can go ahead.
+ */
+static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
+{
+	struct davinci_spi *davinci_spi = context_data;
+	int status;
+
+	status = davinci_spi_process_events(davinci_spi);
+	if (unlikely(status != 0))
+		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT);
+
+	if ((!davinci_spi->rcount && !davinci_spi->wcount) || status)
+		complete(&davinci_spi->done);
+
+	return IRQ_HANDLED;
+}
+
 static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
@@ -866,11 +930,22 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		goto release_region;
 	}
 
+	davinci_spi->irq = platform_get_irq(pdev, 0);
+	if (davinci_spi->irq <= 0) {
+		ret = -EINVAL;
+		goto unmap_io;
+	}
+
+	ret = request_irq(davinci_spi->irq, davinci_spi_irq, 0,
+					dev_name(&pdev->dev), davinci_spi);
+	if (ret)
+		goto unmap_io;
+
 	/* Allocate tmp_buf for tx_buf */
 	davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL);
 	if (davinci_spi->tmp_buf == NULL) {
 		ret = -ENOMEM;
-		goto unmap_io;
+		goto irq_free;
 	}
 
 	davinci_spi->bitbang.master = spi_master_get(master);
@@ -946,6 +1021,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	davinci_spi->get_rx = davinci_spi_rx_buf_u8;
 	davinci_spi->get_tx = davinci_spi_tx_buf_u8;
 
+	init_completion(&davinci_spi->done);
+
 	/* Reset In/OUT SPI module */
 	iowrite32(0, davinci_spi->base + SPIGCR0);
 	udelay(100);
@@ -967,6 +1044,11 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		clear_io_bits(davinci_spi->base + SPIGCR1,
 				SPIGCR1_CLKMOD_MASK);
 
+	if (pdata->intr_line)
+		iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
+	else
+		iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL);
+
 	iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
 
 	/* master mode default */
@@ -987,6 +1069,8 @@ put_master:
 	spi_master_put(master);
 free_tmp_buf:
 	kfree(davinci_spi->tmp_buf);
+irq_free:
+	free_irq(davinci_spi->irq, davinci_spi);
 unmap_io:
 	iounmap(davinci_spi->base);
 release_region:
@@ -1020,6 +1104,7 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 	clk_put(davinci_spi->clk);
 	spi_master_put(master);
 	kfree(davinci_spi->tmp_buf);
+	free_irq(davinci_spi->irq, davinci_spi);
 	iounmap(davinci_spi->base);
 	release_mem_region(davinci_spi->pbase, davinci_spi->region_size);
 
-- 
1.7.3.2

[PATCH 28/49] spi: davinci: configure the invariable bits in spipc0 only once

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Configure the data-in, data-out and clock functionality pins
in SPIPC0 register only once during probe. No need to set these
bits for each transfer.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 45cc1a7..6f279c5 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -536,9 +536,6 @@ static int davinci_spi_bufs_prep(struct spi_device *spi,
 	 * optimize for both flags staying cleared.
 	 */
 
-	op_mode = SPIPC0_DIFUN_MASK
-		| SPIPC0_DOFUN_MASK
-		| SPIPC0_CLKFUN_MASK;
 	if (!(spi->mode & SPI_NO_CS)) {
 		pdata = davinci_spi->pdata;
 		if (!pdata->chip_sel ||
@@ -886,6 +883,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	resource_size_t	dma_tx_chan = SPI_NO_RESOURCE;
 	resource_size_t	dma_eventq = SPI_NO_RESOURCE;
 	int i = 0, ret = 0;
+	u32 spipc0;
 
 	pdata = pdev->dev.platform_data;
 	if (pdata == NULL) {
@@ -1028,6 +1026,10 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	udelay(100);
 	iowrite32(1, davinci_spi->base + SPIGCR0);
 
+	/* Set up SPIPC0.  CS and ENA init is done in davinci_spi_bufs_prep */
+	spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK;
+	iowrite32(spipc0, davinci_spi->base + SPIPC0);
+
 	/* initialize chip selects */
 	if (pdata->chip_sel) {
 		for (i = 0; i < pdata->num_chipselect; i++) {
-- 
1.7.3.2

[PATCH 29/49] spi: davinci: remove unnecessary function davinci_spi_bufs_prep()

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The function davinci_spi_bufs_prep() is doing stuff that
davinci_spi_setup() is doing. Eliminate it and move the work
to davinci_spi_setup()

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   64 ++++++++++++++------------------------------
 1 files changed, 21 insertions(+), 43 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 6f279c5..05b6145 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -482,13 +482,33 @@ static int davinci_spi_setup(struct spi_device *spi)
 	int retval;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
+	struct davinci_spi_platform_data *pdata;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
+	pdata = davinci_spi->pdata;
 
 	/* if bits per word length is zero then set it default 8 */
 	if (!spi->bits_per_word)
 		spi->bits_per_word = 8;
 
+	if (!(spi->mode & SPI_NO_CS)) {
+		if ((pdata->chip_sel == NULL) ||
+		    (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS))
+			set_io_bits(davinci_spi->base + SPIPC0,
+					1 << spi->chip_select);
+
+	}
+
+	if (spi->mode & SPI_READY)
+		set_io_bits(davinci_spi->base + SPIPC0, SPIPC0_SPIENA_MASK);
+
+	if (spi->mode & SPI_LOOP)
+		set_io_bits(davinci_spi->base + SPIGCR1,
+				SPIGCR1_LOOPBACK_MASK);
+	else
+		clear_io_bits(davinci_spi->base + SPIGCR1,
+				SPIGCR1_LOOPBACK_MASK);
+
 	if (use_dma && davinci_spi->dma_channels) {
 		davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
 
@@ -523,40 +543,6 @@ static void davinci_spi_cleanup(struct spi_device *spi)
 	}
 }
 
-static int davinci_spi_bufs_prep(struct spi_device *spi,
-				 struct davinci_spi *davinci_spi)
-{
-	struct davinci_spi_platform_data *pdata;
-	int op_mode = 0;
-
-	/*
-	 * REVISIT  unless devices disagree about SPI_LOOP or
-	 * SPI_READY (SPI_NO_CS only allows one device!), this
-	 * should not need to be done before each message...
-	 * optimize for both flags staying cleared.
-	 */
-
-	if (!(spi->mode & SPI_NO_CS)) {
-		pdata = davinci_spi->pdata;
-		if (!pdata->chip_sel ||
-		     pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)
-			op_mode |= 1 << spi->chip_select;
-	}
-	if (spi->mode & SPI_READY)
-		op_mode |= SPIPC0_SPIENA_MASK;
-
-	iowrite32(op_mode, davinci_spi->base + SPIPC0);
-
-	if (spi->mode & SPI_LOOP)
-		set_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_LOOPBACK_MASK);
-	else
-		clear_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_LOOPBACK_MASK);
-
-	return 0;
-}
-
 static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 				   int int_status)
 {
@@ -664,10 +650,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 				davinci_spi->bytes_per_word[spi->chip_select];
 	davinci_spi->rcount = davinci_spi->wcount;
 
-	ret = davinci_spi_bufs_prep(spi, davinci_spi);
-	if (ret)
-		return ret;
-
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
 	/* Enable SPI */
@@ -769,10 +751,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	init_completion(&davinci_spi_dma->dma_rx_completion);
 	init_completion(&davinci_spi_dma->dma_tx_completion);
 
-	ret = davinci_spi_bufs_prep(spi, davinci_spi);
-	if (ret)
-		return ret;
-
 	count = t->len / data_type;	/* the number of elements */
 
 	/* disable all interrupts for dma transfers */
@@ -1026,7 +1004,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	udelay(100);
 	iowrite32(1, davinci_spi->base + SPIGCR0);
 
-	/* Set up SPIPC0.  CS and ENA init is done in davinci_spi_bufs_prep */
+	/* Set up SPIPC0.  CS and ENA init is done in davinci_spi_setup */
 	spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK;
 	iowrite32(spipc0, davinci_spi->base + SPIPC0);
 
-- 
1.7.3.2

[PATCH 30/49] spi: davinci: remove unnecessary call to davinci_spi_setup_transfer()

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Remove unnecessary call to davinci_spi_setup_transfer() at the end
of davinci_spi_setup().

davinci_spi_setup_transfer() is registered as the setup_transfer
callback for the bitbang layer and is called independently by
the bitbang layer to setup the transfer before it begins.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   11 +++--------
 1 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 05b6145..77109dc 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -479,7 +479,7 @@ static int davinci_spi_request_dma(struct spi_device *spi)
  */
 static int davinci_spi_setup(struct spi_device *spi)
 {
-	int retval;
+	int retval = 0;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
 	struct davinci_spi_platform_data *pdata;
@@ -512,16 +512,11 @@ static int davinci_spi_setup(struct spi_device *spi)
 	if (use_dma && davinci_spi->dma_channels) {
 		davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
 
-		if ((davinci_spi_dma->dma_rx_channel == -1)
-				|| (davinci_spi_dma->dma_tx_channel == -1)) {
+		if ((davinci_spi_dma->dma_rx_channel == -1) ||
+		    (davinci_spi_dma->dma_tx_channel == -1))
 			retval = davinci_spi_request_dma(spi);
-			if (retval < 0)
-				return retval;
-		}
 	}
 
-	retval = davinci_spi_setup_transfer(spi, NULL);
-
 	return retval;
 }
 
-- 
1.7.3.2


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[PATCH 31/49] spi: davinci: do not store DMA channel information per chip select

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Do not store DMA channel related information per chip-select since
that information does not depend on the chip select.

The same DMA channels can be used for transfers on all chip-selects
since the transfer happens one-at-a-time.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   47 +++++++++++++++++---------------------------
 1 files changed, 18 insertions(+), 29 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 77109dc..4aa5221 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -143,7 +143,7 @@ struct davinci_spi {
 	u8			*tmp_buf;
 	int			rcount;
 	int			wcount;
-	struct davinci_spi_dma	*dma_channels;
+	struct davinci_spi_dma	dma_channels;
 	struct davinci_spi_platform_data *pdata;
 
 	void			(*get_rx)(u32 rx_data, struct davinci_spi *);
@@ -407,7 +407,7 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
 	struct davinci_spi_dma *davinci_spi_dma;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]);
+	davinci_spi_dma = &davinci_spi->dma_channels;
 
 	if (ch_status == DMA_COMPLETE)
 		edma_stop(davinci_spi_dma->dma_rx_channel);
@@ -426,7 +426,7 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
 	struct davinci_spi_dma *davinci_spi_dma;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]);
+	davinci_spi_dma = &davinci_spi->dma_channels;
 
 	if (ch_status == DMA_COMPLETE)
 		edma_stop(davinci_spi_dma->dma_tx_channel);
@@ -446,7 +446,7 @@ static int davinci_spi_request_dma(struct spi_device *spi)
 	int r;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+	davinci_spi_dma = &davinci_spi->dma_channels;
 	sdev = davinci_spi->bitbang.master->dev.parent;
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev,
@@ -509,8 +509,8 @@ static int davinci_spi_setup(struct spi_device *spi)
 		clear_io_bits(davinci_spi->base + SPIGCR1,
 				SPIGCR1_LOOPBACK_MASK);
 
-	if (use_dma && davinci_spi->dma_channels) {
-		davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+	if (use_dma) {
+		davinci_spi_dma = &davinci_spi->dma_channels;
 
 		if ((davinci_spi_dma->dma_rx_channel == -1) ||
 		    (davinci_spi_dma->dma_tx_channel == -1))
@@ -522,13 +522,11 @@ static int davinci_spi_setup(struct spi_device *spi)
 
 static void davinci_spi_cleanup(struct spi_device *spi)
 {
-	struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master);
-	struct davinci_spi_dma *davinci_spi_dma;
-
-	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
-
-	if (use_dma && davinci_spi->dma_channels) {
-		davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+	if (use_dma) {
+		struct davinci_spi *davinci_spi =
+					spi_master_get_devdata(spi->master);
+		struct davinci_spi_dma *davinci_spi_dma =
+					&davinci_spi->dma_channels;
 
 		if ((davinci_spi_dma->dma_rx_channel != -1)
 				&& (davinci_spi_dma->dma_tx_channel != -1)) {
@@ -730,7 +728,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	davinci_spi = spi_master_get_devdata(spi->master);
 	sdev = davinci_spi->bitbang.master->dev.parent;
 
-	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+	davinci_spi_dma = &davinci_spi->dma_channels;
 
 	tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
 	rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
@@ -967,22 +965,13 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		use_dma = 0;
 	} else {
 		davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
-		davinci_spi->dma_channels = kzalloc(master->num_chipselect
-				* sizeof(struct davinci_spi_dma), GFP_KERNEL);
-		if (davinci_spi->dma_channels == NULL) {
-			ret = -ENOMEM;
-			goto free_clk;
-		}
 
-		for (i = 0; i < master->num_chipselect; i++) {
-			davinci_spi->dma_channels[i].dma_rx_channel = -1;
-			davinci_spi->dma_channels[i].dma_rx_sync_dev =
-				dma_rx_chan;
-			davinci_spi->dma_channels[i].dma_tx_channel = -1;
-			davinci_spi->dma_channels[i].dma_tx_sync_dev =
-				dma_tx_chan;
-			davinci_spi->dma_channels[i].eventq = dma_eventq;
-		}
+		davinci_spi->dma_channels.dma_rx_channel = -1;
+		davinci_spi->dma_channels.dma_rx_sync_dev = dma_rx_chan;
+		davinci_spi->dma_channels.dma_tx_channel = -1;
+		davinci_spi->dma_channels.dma_tx_sync_dev = dma_tx_chan;
+		davinci_spi->dma_channels.eventq = dma_eventq;
+
 		dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n"
 				"Using RX channel = %d , TX channel = %d and "
 				"event queue = %d", dma_rx_chan, dma_tx_chan,
-- 
1.7.3.2

[PATCH 32/49] spi: davinci: always start transmit DMA

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Due to the full duplex nature of the SPI bus, the SPI master
on DaVinci needs transmit to be active even if the tranfer is
only meant to collect receive data.

The current code achieves this by using a temporary zeroed buffer
to provide DMA data in case the transfer does not have a transmit
buffer provided.

However, the transmit DMA is started only if transmit buffer is
provided rendering the temporary buffer unused. Instead the code
relies on a write to SPIDAT1 register to trigger transmit operation.
This however only sends two bytes of data.

Fix this by starting transmit DMA always.

This changes exposes a bug on DM355 where the CSHOLD bit in
SPIDAT1 needs to be written to in between transfers. Handle
that by introducing a "cshold_bug" platform data which is
set to true for DM355.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/dm355.c            |    1 +
 arch/arm/mach-davinci/include/mach/spi.h |    1 +
 drivers/spi/davinci_spi.c                |   22 +++++++++-------------
 3 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index e311f29..27ee870 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -413,6 +413,7 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
+	.cshold_bug	= true,
 };
 static struct platform_device dm355_spi0_device = {
 	.name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index ab45b89..68db6d5 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -33,6 +33,7 @@ struct davinci_spi_platform_data {
 	u8	intr_line;
 	u8	use_dma;
 	u8	*chip_sel;
+	bool	cshold_bug;
 };
 
 struct davinci_spi_config {
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 4aa5221..a5f03dd 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -719,13 +719,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	struct davinci_spi *davinci_spi;
 	int int_status = 0;
 	int count, temp_count;
-	u32 data1_reg_val;
 	struct davinci_spi_dma *davinci_spi_dma;
 	int data_type, ret;
 	unsigned long tx_reg, rx_reg;
+	struct davinci_spi_platform_data *pdata;
 	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
+	pdata = davinci_spi->pdata;
 	sdev = davinci_spi->bitbang.master->dev.parent;
 
 	davinci_spi_dma = &davinci_spi->dma_channels;
@@ -739,8 +740,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	/* convert len to words based on bits_per_word */
 	data_type = davinci_spi->bytes_per_word[spi->chip_select];
 
-	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
-
 	init_completion(&davinci_spi_dma->dma_rx_completion);
 	init_completion(&davinci_spi_dma->dma_tx_completion);
 
@@ -781,9 +780,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0);
 
 	if (t->rx_buf) {
-		/* initiate transaction */
-		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
-
 		t->rx_dma = dma_map_single(&spi->dev, (void *)t->rx_buf, count,
 				DMA_FROM_DEVICE);
 		if (dma_mapping_error(&spi->dev, t->rx_dma)) {
@@ -805,18 +801,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 				data_type, 0);
 	}
 
-	if ((t->tx_buf) || (t->rx_buf))
-		edma_start(davinci_spi_dma->dma_tx_channel);
+	if (pdata->cshold_bug) {
+		u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2);
+		iowrite16(spidat1, davinci_spi->base + SPIDAT1 + 2);
+	}
 
 	if (t->rx_buf)
 		edma_start(davinci_spi_dma->dma_rx_channel);
 
-	if ((t->rx_buf) || (t->tx_buf))
-		davinci_spi_set_dma_req(spi, 1);
+	edma_start(davinci_spi_dma->dma_tx_channel);
+	davinci_spi_set_dma_req(spi, 1);
 
-	if (t->tx_buf)
-		wait_for_completion_interruptible(
-				&davinci_spi_dma->dma_tx_completion);
+	wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion);
 
 	if (t->rx_buf)
 		wait_for_completion_interruptible(
-- 
1.7.3.2

[PATCH 33/49] spi: davinci: do not use temporary buffer if no transmit data provided

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Remove usage of temporary buffer when no transmit data is provided.
Instead, use the transmit register itself as the source of data.

By choosing the transmit register itself as the source of data, this
patch helps remove unnecessary accesses to memory when no real data
is being transmitted.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   52 ++++++++++++++++++--------------------------
 1 files changed, 21 insertions(+), 31 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index a5f03dd..f512939 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -38,8 +38,6 @@
 
 #define CS_DEFAULT	0xFF
 
-#define SPI_BUFSIZ	(SMP_CACHE_BYTES + 1)
-
 #define SPIFMT_PHASE_MASK	BIT(16)
 #define SPIFMT_POLARITY_MASK	BIT(17)
 #define SPIFMT_DISTIMER_MASK	BIT(18)
@@ -140,7 +138,6 @@ struct davinci_spi {
 
 	const void		*tx;
 	void			*rx;
-	u8			*tmp_buf;
 	int			rcount;
 	int			wcount;
 	struct davinci_spi_dma	dma_channels;
@@ -718,7 +715,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
 	int int_status = 0;
-	int count, temp_count;
+	int count;
 	struct davinci_spi_dma *davinci_spi_dma;
 	int data_type, ret;
 	unsigned long tx_reg, rx_reg;
@@ -750,6 +747,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
+	/*
+	 * Transmit DMA setup
+	 *
+	 * If there is transmit data, map the transmit buffer, set it as the
+	 * source of data and set the source B index to data size.
+	 * If there is no transmit data, set the transmit register as the
+	 * source of data, and set the source B index to zero.
+	 *
+	 * The destination is always the transmit register itself. And the
+	 * destination never increments.
+	 */
+
 	if (t->tx_buf) {
 		t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count,
 				DMA_TO_DEVICE);
@@ -758,25 +767,15 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 				" TX buffer\n", count);
 			return -ENOMEM;
 		}
-		temp_count = count;
-	} else {
-		/* We need TX clocking for RX transaction */
-		t->tx_dma = dma_map_single(&spi->dev,
-				(void *)davinci_spi->tmp_buf, count + 1,
-				DMA_TO_DEVICE);
-		if (dma_mapping_error(&spi->dev, t->tx_dma)) {
-			dev_dbg(sdev, "Unable to DMA map a %d bytes"
-				" TX tmp buffer\n", count);
-			return -ENOMEM;
-		}
-		temp_count = count + 1;
 	}
 
 	edma_set_transfer_params(davinci_spi_dma->dma_tx_channel,
-					data_type, temp_count, 1, 0, ASYNC);
+					data_type, count, 1, 0, ASYNC);
 	edma_set_dest(davinci_spi_dma->dma_tx_channel, tx_reg, INCR, W8BIT);
-	edma_set_src(davinci_spi_dma->dma_tx_channel, t->tx_dma, INCR, W8BIT);
-	edma_set_src_index(davinci_spi_dma->dma_tx_channel, data_type, 0);
+	edma_set_src(davinci_spi_dma->dma_tx_channel,
+			t->tx_buf ? t->tx_dma : tx_reg, INCR, W8BIT);
+	edma_set_src_index(davinci_spi_dma->dma_tx_channel,
+			t->tx_buf ? data_type : 0, 0);
 	edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0);
 
 	if (t->rx_buf) {
@@ -818,7 +817,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 		wait_for_completion_interruptible(
 				&davinci_spi_dma->dma_rx_completion);
 
-	dma_unmap_single(NULL, t->tx_dma, temp_count, DMA_TO_DEVICE);
+	if (t->tx_buf)
+		dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
 
 	if (t->rx_buf)
 		dma_unmap_single(NULL, t->rx_dma, count, DMA_FROM_DEVICE);
@@ -906,17 +906,10 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	if (ret)
 		goto unmap_io;
 
-	/* Allocate tmp_buf for tx_buf */
-	davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL);
-	if (davinci_spi->tmp_buf == NULL) {
-		ret = -ENOMEM;
-		goto irq_free;
-	}
-
 	davinci_spi->bitbang.master = spi_master_get(master);
 	if (davinci_spi->bitbang.master == NULL) {
 		ret = -ENODEV;
-		goto free_tmp_buf;
+		goto irq_free;
 	}
 
 	davinci_spi->clk = clk_get(&pdev->dev, NULL);
@@ -1027,8 +1020,6 @@ free_clk:
 	clk_put(davinci_spi->clk);
 put_master:
 	spi_master_put(master);
-free_tmp_buf:
-	kfree(davinci_spi->tmp_buf);
 irq_free:
 	free_irq(davinci_spi->irq, davinci_spi);
 unmap_io:
@@ -1063,7 +1054,6 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 	clk_disable(davinci_spi->clk);
 	clk_put(davinci_spi->clk);
 	spi_master_put(master);
-	kfree(davinci_spi->tmp_buf);
 	free_irq(davinci_spi->irq, davinci_spi);
 	iounmap(davinci_spi->base);
 	release_mem_region(davinci_spi->pbase, davinci_spi->region_size);
-- 
1.7.3.2

[PATCH 34/49] spi: davinci: always start receive DMA

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

In keeping with the full duplex nature of the SPI bus. Always
start receive DMA along with transmit DMA.

If there is no receive buffer provided with the transfer, use
a temporary buffer to receive the data to be thrown away.

[michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org: receive DMA size should
be same as transfer length to avoid hang-up when transfer length
is smaller than temporary rx buffer size (rx buffer not provided)]

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   70 +++++++++++++++++++++++++++------------------
 1 files changed, 42 insertions(+), 28 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index f512939..705d006 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -138,6 +138,8 @@ struct davinci_spi {
 
 	const void		*tx;
 	void			*rx;
+#define SPI_TMP_BUFSZ	(SMP_CACHE_BYTES + 1)
+	u8			rx_tmp_buf[SPI_TMP_BUFSZ];
 	int			rcount;
 	int			wcount;
 	struct davinci_spi_dma	dma_channels;
@@ -716,10 +718,12 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	struct davinci_spi *davinci_spi;
 	int int_status = 0;
 	int count;
+	unsigned rx_buf_count;
 	struct davinci_spi_dma *davinci_spi_dma;
 	int data_type, ret;
 	unsigned long tx_reg, rx_reg;
 	struct davinci_spi_platform_data *pdata;
+	void *rx_buf;
 	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
@@ -778,50 +782,60 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 			t->tx_buf ? data_type : 0, 0);
 	edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0);
 
+	/*
+	 * Receive DMA setup
+	 *
+	 * If there is receive buffer, use it to receive data. If there
+	 * is none provided, use a temporary receive buffer. Set the
+	 * destination B index to 0 so effectively only one byte is used
+	 * in the temporary buffer (address does not increment).
+	 *
+	 * The source of receive data is the receive data register. The
+	 * source address never increments.
+	 */
+
 	if (t->rx_buf) {
-		t->rx_dma = dma_map_single(&spi->dev, (void *)t->rx_buf, count,
-				DMA_FROM_DEVICE);
-		if (dma_mapping_error(&spi->dev, t->rx_dma)) {
-			dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
-					count);
-			if (t->tx_buf != NULL)
-				dma_unmap_single(NULL, t->tx_dma,
-						 count, DMA_TO_DEVICE);
-			return -ENOMEM;
-		}
-		edma_set_transfer_params(davinci_spi_dma->dma_rx_channel,
-				data_type, count, 1, 0, ASYNC);
-		edma_set_src(davinci_spi_dma->dma_rx_channel,
-				rx_reg, INCR, W8BIT);
-		edma_set_dest(davinci_spi_dma->dma_rx_channel,
-				t->rx_dma, INCR, W8BIT);
-		edma_set_src_index(davinci_spi_dma->dma_rx_channel, 0, 0);
-		edma_set_dest_index(davinci_spi_dma->dma_rx_channel,
-				data_type, 0);
+		rx_buf = t->rx_buf;
+		rx_buf_count = count;
+	} else {
+		rx_buf = davinci_spi->rx_tmp_buf;
+		rx_buf_count = sizeof(davinci_spi->rx_tmp_buf);
+	}
+
+	t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count,
+							DMA_FROM_DEVICE);
+	if (dma_mapping_error(&spi->dev, t->rx_dma)) {
+		dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
+								rx_buf_count);
+		if (t->tx_buf)
+			dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
+		return -ENOMEM;
 	}
 
+	edma_set_transfer_params(davinci_spi_dma->dma_rx_channel, data_type,
+							count, 1, 0, ASYNC);
+	edma_set_src(davinci_spi_dma->dma_rx_channel, rx_reg, INCR, W8BIT);
+	edma_set_dest(davinci_spi_dma->dma_rx_channel, t->rx_dma, INCR, W8BIT);
+	edma_set_src_index(davinci_spi_dma->dma_rx_channel, 0, 0);
+	edma_set_dest_index(davinci_spi_dma->dma_rx_channel,
+						t->rx_buf ? data_type : 0, 0);
+
 	if (pdata->cshold_bug) {
 		u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2);
 		iowrite16(spidat1, davinci_spi->base + SPIDAT1 + 2);
 	}
 
-	if (t->rx_buf)
-		edma_start(davinci_spi_dma->dma_rx_channel);
-
+	edma_start(davinci_spi_dma->dma_rx_channel);
 	edma_start(davinci_spi_dma->dma_tx_channel);
 	davinci_spi_set_dma_req(spi, 1);
 
 	wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion);
-
-	if (t->rx_buf)
-		wait_for_completion_interruptible(
-				&davinci_spi_dma->dma_rx_completion);
+	wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
 
 	if (t->tx_buf)
 		dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
 
-	if (t->rx_buf)
-		dma_unmap_single(NULL, t->rx_dma, count, DMA_FROM_DEVICE);
+	dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE);
 
 	/*
 	 * Check for bit error, desync error,parity error,timeout error and
-- 
1.7.3.2

[PATCH 35/49] spi: davinci: use edma_write_slot() to setup EDMA PaRAM slot

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Currently a series of EDMA API calls are being made to setup
various aspects of EDMA PaRAM slots for receive and transmit.

Instead setup the PaRAM using a local structure and write once
to the hardware using edma_write_slot()

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   34 +++++++++++++++++++---------------
 1 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 705d006..67f1e46 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -725,6 +725,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	struct davinci_spi_platform_data *pdata;
 	void *rx_buf;
 	struct device *sdev;
+	struct edmacc_param param;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
@@ -773,14 +774,15 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 		}
 	}
 
-	edma_set_transfer_params(davinci_spi_dma->dma_tx_channel,
-					data_type, count, 1, 0, ASYNC);
-	edma_set_dest(davinci_spi_dma->dma_tx_channel, tx_reg, INCR, W8BIT);
-	edma_set_src(davinci_spi_dma->dma_tx_channel,
-			t->tx_buf ? t->tx_dma : tx_reg, INCR, W8BIT);
-	edma_set_src_index(davinci_spi_dma->dma_tx_channel,
-			t->tx_buf ? data_type : 0, 0);
-	edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0);
+	param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel);
+	param.src = t->tx_buf ? t->tx_dma : tx_reg;
+	param.a_b_cnt = count << 16 | data_type;
+	param.dst = tx_reg;
+	param.src_dst_bidx = t->tx_buf ? data_type : 0;
+	param.link_bcntrld = 0xffff;
+	param.src_dst_cidx = 0;
+	param.ccnt = 1;
+	edma_write_slot(davinci_spi_dma->dma_tx_channel, &param);
 
 	/*
 	 * Receive DMA setup
@@ -812,13 +814,15 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 		return -ENOMEM;
 	}
 
-	edma_set_transfer_params(davinci_spi_dma->dma_rx_channel, data_type,
-							count, 1, 0, ASYNC);
-	edma_set_src(davinci_spi_dma->dma_rx_channel, rx_reg, INCR, W8BIT);
-	edma_set_dest(davinci_spi_dma->dma_rx_channel, t->rx_dma, INCR, W8BIT);
-	edma_set_src_index(davinci_spi_dma->dma_rx_channel, 0, 0);
-	edma_set_dest_index(davinci_spi_dma->dma_rx_channel,
-						t->rx_buf ? data_type : 0, 0);
+	param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel);
+	param.src = rx_reg;
+	param.a_b_cnt = count << 16 | data_type;
+	param.dst = t->rx_dma;
+	param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
+	param.link_bcntrld = 0xffff;
+	param.src_dst_cidx = 0;
+	param.ccnt = 1;
+	edma_write_slot(davinci_spi_dma->dma_rx_channel, &param);
 
 	if (pdata->cshold_bug) {
 		u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2);
-- 
1.7.3.2

[PATCH 36/49] spi: davinci: fix DMA event generation stoppage

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Do not stop SPI DMA event generation in either transmit or
receive DMA event call back because the single setting affects
both transmit and receive event generation.

Depending on the order in which the callbacks happen, transmit
or receive events can get unintentionally stalled.

Instead, disable event generation once after both the transmit
and receive DMA completes.

While at it, remove the largely under-used function to set or
clear DMA event generation.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   18 +++---------------
 1 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 67f1e46..9695f98 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -211,16 +211,6 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits)
 	iowrite32(v, addr);
 }
 
-static void davinci_spi_set_dma_req(const struct spi_device *spi, int enable)
-{
-	struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master);
-
-	if (enable)
-		set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
-	else
-		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
-}
-
 /*
  * Interface to control the chip select signal
  */
@@ -414,8 +404,6 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
 		edma_clean_channel(davinci_spi_dma->dma_rx_channel);
 
 	complete(&davinci_spi_dma->dma_rx_completion);
-	/* We must disable the DMA RX request */
-	davinci_spi_set_dma_req(spi, 0);
 }
 
 static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
@@ -433,8 +421,6 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
 		edma_clean_channel(davinci_spi_dma->dma_tx_channel);
 
 	complete(&davinci_spi_dma->dma_tx_completion);
-	/* We must disable the DMA TX request */
-	davinci_spi_set_dma_req(spi, 0);
 }
 
 static int davinci_spi_request_dma(struct spi_device *spi)
@@ -831,7 +817,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	edma_start(davinci_spi_dma->dma_rx_channel);
 	edma_start(davinci_spi_dma->dma_tx_channel);
-	davinci_spi_set_dma_req(spi, 1);
+	set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
 
 	wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion);
 	wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
@@ -841,6 +827,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE);
 
+	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
+
 	/*
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
-- 
1.7.3.2

[PATCH 37/49] spi: davinci: do not allocate DMA channels during SPI device setup

[Sekhar Nori]

Do not allocate (and de-allocate) SPI DMA channels during setup
(and cleanup) for each SPI device. Instead, allocate the DMA
channels once duing probe and use them for the life time of
the driver.

This makes sense since there are dedicated DMA channels meant
for SPI use.

This also helps remove the unnecessary DMA "sync_dev" variables
being used to store DMA channel information.

Also, the "use_dma" platform variable is now eliminated since
it is possible to check if the platform supports DMA or not
based upon whether DMA resources can be found or not.

Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |    1 -
 drivers/spi/davinci_spi.c                |  153 ++++++++++--------------------
 2 files changed, 51 insertions(+), 103 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 68db6d5..f7586a0 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -31,7 +31,6 @@ struct davinci_spi_platform_data {
 	u8	num_chipselect;
 	u8	clk_internal;
 	u8	intr_line;
-	u8	use_dma;
 	u8	*chip_sel;
 	bool	cshold_bug;
 };
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 9695f98..6db4786 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -116,8 +116,6 @@
 struct davinci_spi_dma {
 	int			dma_tx_channel;
 	int			dma_rx_channel;
-	int			dma_tx_sync_dev;
-	int			dma_rx_sync_dev;
 	enum dma_event_q	eventq;
 
 	struct completion	dma_tx_completion;
@@ -153,8 +151,6 @@ struct davinci_spi {
 
 static struct davinci_spi_config davinci_spi_default_cfg;
 
-static unsigned use_dma;
-
 static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
 {
 	if (davinci_spi->rx) {
@@ -391,12 +387,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 
 static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
 {
-	struct spi_device *spi = (struct spi_device *)data;
-	struct davinci_spi *davinci_spi;
-	struct davinci_spi_dma *davinci_spi_dma;
-
-	davinci_spi = spi_master_get_devdata(spi->master);
-	davinci_spi_dma = &davinci_spi->dma_channels;
+	struct davinci_spi_dma *davinci_spi_dma = data;
 
 	if (ch_status == DMA_COMPLETE)
 		edma_stop(davinci_spi_dma->dma_rx_channel);
@@ -408,12 +399,7 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
 
 static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
 {
-	struct spi_device *spi = (struct spi_device *)data;
-	struct davinci_spi *davinci_spi;
-	struct davinci_spi_dma *davinci_spi_dma;
-
-	davinci_spi = spi_master_get_devdata(spi->master);
-	davinci_spi_dma = &davinci_spi->dma_channels;
+	struct davinci_spi_dma *davinci_spi_dma = data;
 
 	if (ch_status == DMA_COMPLETE)
 		edma_stop(davinci_spi_dma->dma_tx_channel);
@@ -423,39 +409,6 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
 	complete(&davinci_spi_dma->dma_tx_completion);
 }
 
-static int davinci_spi_request_dma(struct spi_device *spi)
-{
-	struct davinci_spi *davinci_spi;
-	struct davinci_spi_dma *davinci_spi_dma;
-	struct device *sdev;
-	int r;
-
-	davinci_spi = spi_master_get_devdata(spi->master);
-	davinci_spi_dma = &davinci_spi->dma_channels;
-	sdev = davinci_spi->bitbang.master->dev.parent;
-
-	r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev,
-				davinci_spi_dma_rx_callback, spi,
-				davinci_spi_dma->eventq);
-	if (r < 0) {
-		dev_dbg(sdev, "Unable to request DMA channel for SPI RX\n");
-		return -EAGAIN;
-	}
-	davinci_spi_dma->dma_rx_channel = r;
-	r = edma_alloc_channel(davinci_spi_dma->dma_tx_sync_dev,
-				davinci_spi_dma_tx_callback, spi,
-				davinci_spi_dma->eventq);
-	if (r < 0) {
-		edma_free_channel(davinci_spi_dma->dma_rx_channel);
-		davinci_spi_dma->dma_rx_channel = -1;
-		dev_dbg(sdev, "Unable to request DMA channel for SPI TX\n");
-		return -EAGAIN;
-	}
-	davinci_spi_dma->dma_tx_channel = r;
-
-	return 0;
-}
-
 /**
  * davinci_spi_setup - This functions will set default transfer method
  * @spi: spi device on which data transfer to be done
@@ -466,7 +419,6 @@ static int davinci_spi_setup(struct spi_device *spi)
 {
 	int retval = 0;
 	struct davinci_spi *davinci_spi;
-	struct davinci_spi_dma *davinci_spi_dma;
 	struct davinci_spi_platform_data *pdata;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
@@ -494,33 +446,9 @@ static int davinci_spi_setup(struct spi_device *spi)
 		clear_io_bits(davinci_spi->base + SPIGCR1,
 				SPIGCR1_LOOPBACK_MASK);
 
-	if (use_dma) {
-		davinci_spi_dma = &davinci_spi->dma_channels;
-
-		if ((davinci_spi_dma->dma_rx_channel == -1) ||
-		    (davinci_spi_dma->dma_tx_channel == -1))
-			retval = davinci_spi_request_dma(spi);
-	}
-
 	return retval;
 }
 
-static void davinci_spi_cleanup(struct spi_device *spi)
-{
-	if (use_dma) {
-		struct davinci_spi *davinci_spi =
-					spi_master_get_devdata(spi->master);
-		struct davinci_spi_dma *davinci_spi_dma =
-					&davinci_spi->dma_channels;
-
-		if ((davinci_spi_dma->dma_rx_channel != -1)
-				&& (davinci_spi_dma->dma_tx_channel != -1)) {
-			edma_free_channel(davinci_spi_dma->dma_tx_channel);
-			edma_free_channel(davinci_spi_dma->dma_rx_channel);
-		}
-	}
-}
-
 static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 				   int int_status)
 {
@@ -842,6 +770,30 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	return t->len;
 }
 
+static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
+{
+	int r;
+
+	r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
+				davinci_spi_dma_rx_callback, davinci_spi_dma,
+				davinci_spi_dma->eventq);
+	if (r < 0) {
+		pr_err("Unable to request DMA channel for SPI RX\n");
+		return -EAGAIN;
+	}
+
+	r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
+				davinci_spi_dma_tx_callback, davinci_spi_dma,
+				davinci_spi_dma->eventq);
+	if (r < 0) {
+		edma_free_channel(davinci_spi_dma->dma_rx_channel);
+		pr_err("Unable to request DMA channel for SPI TX\n");
+		return -EAGAIN;
+	}
+
+	return 0;
+}
+
 /**
  * davinci_spi_probe - probe function for SPI Master Controller
  * @pdev: platform_device structure which contains plateform specific data
@@ -928,45 +880,39 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	master->bus_num = pdev->id;
 	master->num_chipselect = pdata->num_chipselect;
 	master->setup = davinci_spi_setup;
-	master->cleanup = davinci_spi_cleanup;
 
 	davinci_spi->bitbang.chipselect = davinci_spi_chipselect;
 	davinci_spi->bitbang.setup_transfer = davinci_spi_setup_transfer;
 
 	davinci_spi->version = pdata->version;
-	use_dma = pdata->use_dma;
 
 	davinci_spi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP;
 	if (davinci_spi->version == SPI_VERSION_2)
 		davinci_spi->bitbang.flags |= SPI_READY;
 
-	if (use_dma) {
-		r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
-		if (r)
-			dma_rx_chan = r->start;
-		r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
-		if (r)
-			dma_tx_chan = r->start;
-		r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
-		if (r)
-			dma_eventq = r->start;
-	}
-
-	if (!use_dma ||
-	    dma_rx_chan == SPI_NO_RESOURCE ||
-	    dma_tx_chan == SPI_NO_RESOURCE ||
-	    dma_eventq	== SPI_NO_RESOURCE) {
-		davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio;
-		use_dma = 0;
-	} else {
-		davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
-
-		davinci_spi->dma_channels.dma_rx_channel = -1;
-		davinci_spi->dma_channels.dma_rx_sync_dev = dma_rx_chan;
-		davinci_spi->dma_channels.dma_tx_channel = -1;
-		davinci_spi->dma_channels.dma_tx_sync_dev = dma_tx_chan;
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+	if (r)
+		dma_rx_chan = r->start;
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+	if (r)
+		dma_tx_chan = r->start;
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
+	if (r)
+		dma_eventq = r->start;
+
+	davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio;
+	if (dma_rx_chan != SPI_NO_RESOURCE &&
+	    dma_tx_chan != SPI_NO_RESOURCE &&
+	    dma_eventq != SPI_NO_RESOURCE) {
+		davinci_spi->dma_channels.dma_rx_channel = dma_rx_chan;
+		davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan;
 		davinci_spi->dma_channels.eventq = dma_eventq;
 
+		ret = davinci_spi_request_dma(&davinci_spi->dma_channels);
+		if (ret)
+			goto free_clk;
+
+		davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
 		dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n"
 				"Using RX channel = %d , TX channel = %d and "
 				"event queue = %d", dma_rx_chan, dma_tx_chan,
@@ -1015,12 +961,15 @@ static int davinci_spi_probe(struct platform_device *pdev)
 
 	ret = spi_bitbang_start(&davinci_spi->bitbang);
 	if (ret)
-		goto free_clk;
+		goto free_dma;
 
 	dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base);
 
 	return ret;
 
+free_dma:
+	edma_free_channel(davinci_spi->dma_channels.dma_tx_channel);
+	edma_free_channel(davinci_spi->dma_channels.dma_rx_channel);
 free_clk:
 	clk_disable(davinci_spi->clk);
 	clk_put(davinci_spi->clk);
-- 
1.7.3.2

[PATCH 38/49] spi: davinci: fix EDMA CC errors at end of transfers

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Use a dummy param slot linked to itself to take care of the
extra "sync event" that gets sent to EDMA controller after
the last byte has been transferred.

The dummy PaRAM slot that is linked to the actual DMA PaRAM
slot "absorbs" this event and prevents a EDMA CC error to
be asserted.

Without this provision, the EDMA CC error would be asserted
because the channel PaRAM would be empty after the transfer
and EDMA would not know what to make out of the extra sync
event.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   28 +++++++++++++++++++++++++---
 1 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 6db4786..975c2a2 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -116,6 +116,7 @@
 struct davinci_spi_dma {
 	int			dma_tx_channel;
 	int			dma_rx_channel;
+	int			dummy_param_slot;
 	enum dma_event_q	eventq;
 
 	struct completion	dma_tx_completion;
@@ -697,6 +698,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	param.src_dst_cidx = 0;
 	param.ccnt = 1;
 	edma_write_slot(davinci_spi_dma->dma_tx_channel, &param);
+	edma_link(davinci_spi_dma->dma_tx_channel,
+			davinci_spi_dma->dummy_param_slot);
 
 	/*
 	 * Receive DMA setup
@@ -779,19 +782,37 @@ static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
 				davinci_spi_dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI RX\n");
-		return -EAGAIN;
+		r = -EAGAIN;
+		goto rx_dma_failed;
 	}
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
 				davinci_spi_dma_tx_callback, davinci_spi_dma,
 				davinci_spi_dma->eventq);
 	if (r < 0) {
-		edma_free_channel(davinci_spi_dma->dma_rx_channel);
 		pr_err("Unable to request DMA channel for SPI TX\n");
-		return -EAGAIN;
+		r = -EAGAIN;
+		goto tx_dma_failed;
 	}
 
+	r = edma_alloc_slot(EDMA_CTLR(davinci_spi_dma->dma_tx_channel),
+		EDMA_SLOT_ANY);
+	if (r < 0) {
+		pr_err("Unable to request SPI TX DMA param slot\n");
+		r = -EAGAIN;
+		goto param_failed;
+	}
+	davinci_spi_dma->dummy_param_slot = r;
+	edma_link(davinci_spi_dma->dummy_param_slot,
+		davinci_spi_dma->dummy_param_slot);
+
 	return 0;
+param_failed:
+	edma_free_channel(davinci_spi_dma->dma_tx_channel);
+tx_dma_failed:
+	edma_free_channel(davinci_spi_dma->dma_rx_channel);
+rx_dma_failed:
+	return r;
 }
 
 /**
@@ -970,6 +991,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 free_dma:
 	edma_free_channel(davinci_spi->dma_channels.dma_tx_channel);
 	edma_free_channel(davinci_spi->dma_channels.dma_rx_channel);
+	edma_free_slot(davinci_spi->dma_channels.dummy_param_slot);
 free_clk:
 	clk_disable(davinci_spi->clk);
 	clk_put(davinci_spi->clk);
-- 
1.7.3.2

[PATCH 39/49] spi: davinci: handle DMA completion errors correctly

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Do not simply clean the DMA channel on a DMA completion
error. Instead, use wcount and rcount members of davinci_spi
to detecion non-completion of DMA and signal EIO to the
application.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   63 +++++++++++++++++++++++++-------------------
 1 files changed, 36 insertions(+), 27 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 975c2a2..a47947d 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -388,24 +388,26 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 
 static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
 {
-	struct davinci_spi_dma *davinci_spi_dma = data;
+	struct davinci_spi *davinci_spi = data;
+	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
+
+	edma_stop(davinci_spi_dma->dma_rx_channel);
 
 	if (ch_status == DMA_COMPLETE)
-		edma_stop(davinci_spi_dma->dma_rx_channel);
-	else
-		edma_clean_channel(davinci_spi_dma->dma_rx_channel);
+		davinci_spi->rcount = 0;
 
 	complete(&davinci_spi_dma->dma_rx_completion);
 }
 
 static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
 {
-	struct davinci_spi_dma *davinci_spi_dma = data;
+	struct davinci_spi *davinci_spi = data;
+	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
+
+	edma_stop(davinci_spi_dma->dma_tx_channel);
 
 	if (ch_status == DMA_COMPLETE)
-		edma_stop(davinci_spi_dma->dma_tx_channel);
-	else
-		edma_clean_channel(davinci_spi_dma->dma_tx_channel);
+		davinci_spi->wcount = 0;
 
 	complete(&davinci_spi_dma->dma_tx_completion);
 }
@@ -632,7 +634,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
 	int int_status = 0;
-	int count;
 	unsigned rx_buf_count;
 	struct davinci_spi_dma *davinci_spi_dma;
 	int data_type, ret;
@@ -648,20 +649,20 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	davinci_spi_dma = &davinci_spi->dma_channels;
 
+	/* convert len to words based on bits_per_word */
+	data_type = davinci_spi->bytes_per_word[spi->chip_select];
+
 	tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
 	rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
-
-	/* convert len to words based on bits_per_word */
-	data_type = davinci_spi->bytes_per_word[spi->chip_select];
+	davinci_spi->wcount = t->len / data_type;
+	davinci_spi->rcount = davinci_spi->wcount;
 
 	init_completion(&davinci_spi_dma->dma_rx_completion);
 	init_completion(&davinci_spi_dma->dma_tx_completion);
 
-	count = t->len / data_type;	/* the number of elements */
-
 	/* disable all interrupts for dma transfers */
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
 	/* Enable SPI */
@@ -680,18 +681,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	 */
 
 	if (t->tx_buf) {
-		t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count,
-				DMA_TO_DEVICE);
+		t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
+					davinci_spi->wcount, DMA_TO_DEVICE);
 		if (dma_mapping_error(&spi->dev, t->tx_dma)) {
-			dev_dbg(sdev, "Unable to DMA map a %d bytes"
-				" TX buffer\n", count);
+			dev_dbg(sdev, "Unable to DMA map %d bytes TX buffer\n",
+							davinci_spi->wcount);
 			return -ENOMEM;
 		}
 	}
 
 	param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel);
 	param.src = t->tx_buf ? t->tx_dma : tx_reg;
-	param.a_b_cnt = count << 16 | data_type;
+	param.a_b_cnt = davinci_spi->wcount << 16 | data_type;
 	param.dst = tx_reg;
 	param.src_dst_bidx = t->tx_buf ? data_type : 0;
 	param.link_bcntrld = 0xffff;
@@ -715,7 +716,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 
 	if (t->rx_buf) {
 		rx_buf = t->rx_buf;
-		rx_buf_count = count;
+		rx_buf_count = davinci_spi->rcount;
 	} else {
 		rx_buf = davinci_spi->rx_tmp_buf;
 		rx_buf_count = sizeof(davinci_spi->rx_tmp_buf);
@@ -727,13 +728,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 		dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
 								rx_buf_count);
 		if (t->tx_buf)
-			dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
+			dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
+								DMA_TO_DEVICE);
 		return -ENOMEM;
 	}
 
 	param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel);
 	param.src = rx_reg;
-	param.a_b_cnt = count << 16 | data_type;
+	param.a_b_cnt = davinci_spi->rcount << 16 | data_type;
 	param.dst = t->rx_dma;
 	param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
 	param.link_bcntrld = 0xffff;
@@ -754,7 +756,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
 
 	if (t->tx_buf)
-		dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
+		dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
+								DMA_TO_DEVICE);
 
 	dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE);
 
@@ -770,15 +773,21 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	if (ret != 0)
 		return ret;
 
+	if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) {
+		dev_err(sdev, "SPI data transfer error\n");
+		return -EIO;
+	}
+
 	return t->len;
 }
 
-static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
+static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
 {
 	int r;
+	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
-				davinci_spi_dma_rx_callback, davinci_spi_dma,
+				davinci_spi_dma_rx_callback, davinci_spi,
 				davinci_spi_dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI RX\n");
@@ -787,7 +796,7 @@ static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
 	}
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
-				davinci_spi_dma_tx_callback, davinci_spi_dma,
+				davinci_spi_dma_tx_callback, davinci_spi,
 				davinci_spi_dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI TX\n");
@@ -929,7 +938,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan;
 		davinci_spi->dma_channels.eventq = dma_eventq;
 
-		ret = davinci_spi_request_dma(&davinci_spi->dma_channels);
+		ret = davinci_spi_request_dma(davinci_spi);
 		if (ret)
 			goto free_clk;
 
-- 
1.7.3.2

[PATCH 40/49] spi: davinci: remove usage of additional completion variables for DMA

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The DMA code does not use the existing completion variable 'done'
which is being used for interrupt mode transfers. Instead it uses
two different completion variables specific to DMA mode transfers.

Eliminate the usage of new completion variables for DMA mode and
use the existing completion variable.

[nsekhar-l0cyMroinI0@public.gmane.org: To make this process easy, eliminate the two
different DMA completion callback functions for tx and rx and
use a single callback function instead]

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   58 +++++++++++++++++---------------------------
 1 files changed, 23 insertions(+), 35 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index a47947d..6094e3a 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -118,9 +118,6 @@ struct davinci_spi_dma {
 	int			dma_rx_channel;
 	int			dummy_param_slot;
 	enum dma_event_q	eventq;
-
-	struct completion	dma_tx_completion;
-	struct completion	dma_rx_completion;
 };
 
 /* SPI Controller driver's private data. */
@@ -386,32 +383,6 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 	return 0;
 }
 
-static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
-{
-	struct davinci_spi *davinci_spi = data;
-	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
-
-	edma_stop(davinci_spi_dma->dma_rx_channel);
-
-	if (ch_status == DMA_COMPLETE)
-		davinci_spi->rcount = 0;
-
-	complete(&davinci_spi_dma->dma_rx_completion);
-}
-
-static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
-{
-	struct davinci_spi *davinci_spi = data;
-	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
-
-	edma_stop(davinci_spi_dma->dma_tx_channel);
-
-	if (ch_status == DMA_COMPLETE)
-		davinci_spi->wcount = 0;
-
-	complete(&davinci_spi_dma->dma_tx_completion);
-}
-
 /**
  * davinci_spi_setup - This functions will set default transfer method
  * @spi: spi device on which data transfer to be done
@@ -630,6 +601,25 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
 	return IRQ_HANDLED;
 }
 
+static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
+{
+	struct davinci_spi *davinci_spi = data;
+	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
+
+	edma_stop(lch);
+
+	if (status == DMA_COMPLETE) {
+		if (lch == davinci_spi_dma->dma_rx_channel)
+			davinci_spi->rcount = 0;
+		if (lch == davinci_spi_dma->dma_tx_channel)
+			davinci_spi->wcount = 0;
+	}
+
+	if ((!davinci_spi->wcount && !davinci_spi->rcount) ||
+	    (status != DMA_COMPLETE))
+		complete(&davinci_spi->done);
+}
+
 static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
@@ -660,8 +650,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	davinci_spi->wcount = t->len / data_type;
 	davinci_spi->rcount = davinci_spi->wcount;
 
-	init_completion(&davinci_spi_dma->dma_rx_completion);
-	init_completion(&davinci_spi_dma->dma_tx_completion);
+	INIT_COMPLETION(davinci_spi->done);
 
 	/* disable all interrupts for dma transfers */
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
@@ -752,8 +741,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	edma_start(davinci_spi_dma->dma_tx_channel);
 	set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
 
-	wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion);
-	wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
+	wait_for_completion_interruptible(&davinci_spi->done);
 
 	if (t->tx_buf)
 		dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
@@ -787,7 +775,7 @@ static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
 	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
-				davinci_spi_dma_rx_callback, davinci_spi,
+				davinci_spi_dma_callback, davinci_spi,
 				davinci_spi_dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI RX\n");
@@ -796,7 +784,7 @@ static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
 	}
 
 	r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
-				davinci_spi_dma_tx_callback, davinci_spi,
+				davinci_spi_dma_callback, davinci_spi,
 				davinci_spi_dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI TX\n");
-- 
1.7.3.2


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[PATCH 41/49] spi: davinci: let DMA operation be specified on per-device basis

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Let DMA operation be specified on a per-device basis instead
of selecting it once during probe.

A side effect of this is the need to combine the PIO and DMA buffer
txrx_bufs routine. This is good since they anyway share some common
functionality.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |    1 +
 drivers/spi/davinci_spi.c                |  342 ++++++++++++++----------------
 2 files changed, 156 insertions(+), 187 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index f7586a0..b3ab7d0 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -41,6 +41,7 @@ struct davinci_spi_config {
 	u8	parity_enable;
 #define SPI_IO_TYPE_INTR	0
 #define SPI_IO_TYPE_POLL	1
+#define SPI_IO_TYPE_DMA		2
 	u8	io_type;
 	u8	timer_disable;
 	u8	c2tdelay;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 6094e3a..5fe2980 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -500,6 +500,25 @@ out:
 	return errors;
 }
 
+static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
+{
+	struct davinci_spi *davinci_spi = data;
+	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
+
+	edma_stop(lch);
+
+	if (status == DMA_COMPLETE) {
+		if (lch == davinci_spi_dma->dma_rx_channel)
+			davinci_spi->rcount = 0;
+		if (lch == davinci_spi_dma->dma_tx_channel)
+			davinci_spi->wcount = 0;
+	}
+
+	if ((!davinci_spi->wcount && !davinci_spi->rcount) ||
+	    (status != DMA_COMPLETE))
+		complete(&davinci_spi->done);
+}
+
 /**
  * davinci_spi_bufs - functions which will handle transfer data
  * @spi: spi device on which data transfer to be done
@@ -509,25 +528,30 @@ out:
  * of SPI controller and then wait until the completion will be marked
  * by the IRQ Handler.
  */
-static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
+static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
-	int ret;
+	int data_type, ret;
 	u32 tx_data, data1_reg_val;
 	u32 errors = 0;
 	struct davinci_spi_config *spicfg;
 	struct davinci_spi_platform_data *pdata;
+	unsigned uninitialized_var(rx_buf_count);
+	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
 	spicfg = (struct davinci_spi_config *)spi->controller_data;
 	if (!spicfg)
 		spicfg = &davinci_spi_default_cfg;
+	sdev = davinci_spi->bitbang.master->dev.parent;
+
+	/* convert len to words based on bits_per_word */
+	data_type = davinci_spi->bytes_per_word[spi->chip_select];
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
-	davinci_spi->wcount = t->len /
-				davinci_spi->bytes_per_word[spi->chip_select];
+	davinci_spi->wcount = t->len / data_type;
 	davinci_spi->rcount = davinci_spi->wcount;
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
@@ -535,20 +559,117 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	if (spicfg->io_type == SPI_IO_TYPE_INTR) {
+	INIT_COMPLETION(davinci_spi->done);
+
+	if (spicfg->io_type == SPI_IO_TYPE_INTR)
 		set_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT);
-		INIT_COMPLETION(davinci_spi->done);
-	}
 
-	/* start the transfer */
-	davinci_spi->wcount--;
-	tx_data = davinci_spi->get_tx(davinci_spi);
-	data1_reg_val &= 0xFFFF0000;
-	data1_reg_val |= tx_data & 0xFFFF;
-	iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+	if (spicfg->io_type != SPI_IO_TYPE_DMA) {
+		/* start the transfer */
+		davinci_spi->wcount--;
+		tx_data = davinci_spi->get_tx(davinci_spi);
+		data1_reg_val &= 0xFFFF0000;
+		data1_reg_val |= tx_data & 0xFFFF;
+		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+	} else {
+		struct davinci_spi_dma *davinci_spi_dma;
+		unsigned long tx_reg, rx_reg;
+		struct edmacc_param param;
+		void *rx_buf;
+
+		davinci_spi_dma = &davinci_spi->dma_channels;
+
+		tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
+		rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
+
+		/*
+		 * Transmit DMA setup
+		 *
+		 * If there is transmit data, map the transmit buffer, set it
+		 * as the source of data and set the source B index to data
+		 * size. If there is no transmit data, set the transmit register
+		 * as the source of data, and set the source B index to zero.
+		 *
+		 * The destination is always the transmit register itself. And
+		 * the destination never increments.
+		 */
+
+		if (t->tx_buf) {
+			t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
+					davinci_spi->wcount, DMA_TO_DEVICE);
+			if (dma_mapping_error(&spi->dev, t->tx_dma)) {
+				dev_dbg(sdev, "Unable to DMA map %d bytes"
+						"TX buffer\n",
+						davinci_spi->wcount);
+				return -ENOMEM;
+			}
+		}
+
+		param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel);
+		param.src = t->tx_buf ? t->tx_dma : tx_reg;
+		param.a_b_cnt = davinci_spi->wcount << 16 | data_type;
+		param.dst = tx_reg;
+		param.src_dst_bidx = t->tx_buf ? data_type : 0;
+		param.link_bcntrld = 0xffff;
+		param.src_dst_cidx = 0;
+		param.ccnt = 1;
+		edma_write_slot(davinci_spi_dma->dma_tx_channel, &param);
+		edma_link(davinci_spi_dma->dma_tx_channel,
+				davinci_spi_dma->dummy_param_slot);
+
+		/*
+		 * Receive DMA setup
+		 *
+		 * If there is receive buffer, use it to receive data. If there
+		 * is none provided, use a temporary receive buffer. Set the
+		 * destination B index to 0 so effectively only one byte is used
+		 * in the temporary buffer (address does not increment).
+		 *
+		 * The source of receive data is the receive data register. The
+		 * source address never increments.
+		 */
+
+		if (t->rx_buf) {
+			rx_buf = t->rx_buf;
+			rx_buf_count = davinci_spi->rcount;
+		} else {
+			rx_buf = davinci_spi->rx_tmp_buf;
+			rx_buf_count = sizeof(davinci_spi->rx_tmp_buf);
+		}
+
+		t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count,
+							DMA_FROM_DEVICE);
+		if (dma_mapping_error(&spi->dev, t->rx_dma)) {
+			dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
+								rx_buf_count);
+			if (t->tx_buf)
+				dma_unmap_single(NULL, t->tx_dma,
+						davinci_spi->wcount,
+						DMA_TO_DEVICE);
+			return -ENOMEM;
+		}
+
+		param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel);
+		param.src = rx_reg;
+		param.a_b_cnt = davinci_spi->rcount << 16 | data_type;
+		param.dst = t->rx_dma;
+		param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
+		param.link_bcntrld = 0xffff;
+		param.src_dst_cidx = 0;
+		param.ccnt = 1;
+		edma_write_slot(davinci_spi_dma->dma_rx_channel, &param);
+
+		if (pdata->cshold_bug)
+			iowrite16(data1_reg_val >> 16,
+					davinci_spi->base + SPIDAT1 + 2);
+
+		edma_start(davinci_spi_dma->dma_rx_channel);
+		edma_start(davinci_spi_dma->dma_tx_channel);
+		set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
+	}
 
 	/* Wait for the transfer to complete */
-	if (spicfg->io_type == SPI_IO_TYPE_INTR) {
+	if (spicfg->io_type != SPI_IO_TYPE_POLL) {
 		wait_for_completion_interruptible(&(davinci_spi->done));
 	} else {
 		while (davinci_spi->rcount > 0 || davinci_spi->wcount > 0) {
@@ -560,6 +681,17 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	}
 
 	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
+	if (spicfg->io_type == SPI_IO_TYPE_DMA) {
+
+		if (t->tx_buf)
+			dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
+								DMA_TO_DEVICE);
+
+		dma_unmap_single(NULL, t->rx_dma, rx_buf_count,
+							DMA_FROM_DEVICE);
+
+		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
+	}
 
 	/*
 	 * Check for bit error, desync error,parity error,timeout error and
@@ -572,6 +704,11 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 		return ret;
 	}
 
+	if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) {
+		dev_err(sdev, "SPI data transfer error\n");
+		return -EIO;
+	}
+
 	return t->len;
 }
 
@@ -601,174 +738,6 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
 	return IRQ_HANDLED;
 }
 
-static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
-{
-	struct davinci_spi *davinci_spi = data;
-	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
-
-	edma_stop(lch);
-
-	if (status == DMA_COMPLETE) {
-		if (lch == davinci_spi_dma->dma_rx_channel)
-			davinci_spi->rcount = 0;
-		if (lch == davinci_spi_dma->dma_tx_channel)
-			davinci_spi->wcount = 0;
-	}
-
-	if ((!davinci_spi->wcount && !davinci_spi->rcount) ||
-	    (status != DMA_COMPLETE))
-		complete(&davinci_spi->done);
-}
-
-static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
-{
-	struct davinci_spi *davinci_spi;
-	int int_status = 0;
-	unsigned rx_buf_count;
-	struct davinci_spi_dma *davinci_spi_dma;
-	int data_type, ret;
-	unsigned long tx_reg, rx_reg;
-	struct davinci_spi_platform_data *pdata;
-	void *rx_buf;
-	struct device *sdev;
-	struct edmacc_param param;
-
-	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
-	sdev = davinci_spi->bitbang.master->dev.parent;
-
-	davinci_spi_dma = &davinci_spi->dma_channels;
-
-	/* convert len to words based on bits_per_word */
-	data_type = davinci_spi->bytes_per_word[spi->chip_select];
-
-	tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
-	rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
-
-	davinci_spi->tx = t->tx_buf;
-	davinci_spi->rx = t->rx_buf;
-	davinci_spi->wcount = t->len / data_type;
-	davinci_spi->rcount = davinci_spi->wcount;
-
-	INIT_COMPLETION(davinci_spi->done);
-
-	/* disable all interrupts for dma transfers */
-	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
-	/* Enable SPI */
-	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
-
-	/*
-	 * Transmit DMA setup
-	 *
-	 * If there is transmit data, map the transmit buffer, set it as the
-	 * source of data and set the source B index to data size.
-	 * If there is no transmit data, set the transmit register as the
-	 * source of data, and set the source B index to zero.
-	 *
-	 * The destination is always the transmit register itself. And the
-	 * destination never increments.
-	 */
-
-	if (t->tx_buf) {
-		t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
-					davinci_spi->wcount, DMA_TO_DEVICE);
-		if (dma_mapping_error(&spi->dev, t->tx_dma)) {
-			dev_dbg(sdev, "Unable to DMA map %d bytes TX buffer\n",
-							davinci_spi->wcount);
-			return -ENOMEM;
-		}
-	}
-
-	param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel);
-	param.src = t->tx_buf ? t->tx_dma : tx_reg;
-	param.a_b_cnt = davinci_spi->wcount << 16 | data_type;
-	param.dst = tx_reg;
-	param.src_dst_bidx = t->tx_buf ? data_type : 0;
-	param.link_bcntrld = 0xffff;
-	param.src_dst_cidx = 0;
-	param.ccnt = 1;
-	edma_write_slot(davinci_spi_dma->dma_tx_channel, &param);
-	edma_link(davinci_spi_dma->dma_tx_channel,
-			davinci_spi_dma->dummy_param_slot);
-
-	/*
-	 * Receive DMA setup
-	 *
-	 * If there is receive buffer, use it to receive data. If there
-	 * is none provided, use a temporary receive buffer. Set the
-	 * destination B index to 0 so effectively only one byte is used
-	 * in the temporary buffer (address does not increment).
-	 *
-	 * The source of receive data is the receive data register. The
-	 * source address never increments.
-	 */
-
-	if (t->rx_buf) {
-		rx_buf = t->rx_buf;
-		rx_buf_count = davinci_spi->rcount;
-	} else {
-		rx_buf = davinci_spi->rx_tmp_buf;
-		rx_buf_count = sizeof(davinci_spi->rx_tmp_buf);
-	}
-
-	t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count,
-							DMA_FROM_DEVICE);
-	if (dma_mapping_error(&spi->dev, t->rx_dma)) {
-		dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
-								rx_buf_count);
-		if (t->tx_buf)
-			dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
-								DMA_TO_DEVICE);
-		return -ENOMEM;
-	}
-
-	param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel);
-	param.src = rx_reg;
-	param.a_b_cnt = davinci_spi->rcount << 16 | data_type;
-	param.dst = t->rx_dma;
-	param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
-	param.link_bcntrld = 0xffff;
-	param.src_dst_cidx = 0;
-	param.ccnt = 1;
-	edma_write_slot(davinci_spi_dma->dma_rx_channel, &param);
-
-	if (pdata->cshold_bug) {
-		u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2);
-		iowrite16(spidat1, davinci_spi->base + SPIDAT1 + 2);
-	}
-
-	edma_start(davinci_spi_dma->dma_rx_channel);
-	edma_start(davinci_spi_dma->dma_tx_channel);
-	set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
-
-	wait_for_completion_interruptible(&davinci_spi->done);
-
-	if (t->tx_buf)
-		dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
-								DMA_TO_DEVICE);
-
-	dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE);
-
-	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
-
-	/*
-	 * Check for bit error, desync error,parity error,timeout error and
-	 * receive overflow errors
-	 */
-	int_status = ioread32(davinci_spi->base + SPIFLG);
-
-	ret = davinci_spi_check_error(davinci_spi, int_status);
-	if (ret != 0)
-		return ret;
-
-	if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) {
-		dev_err(sdev, "SPI data transfer error\n");
-		return -EIO;
-	}
-
-	return t->len;
-}
-
 static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
 {
 	int r;
@@ -918,7 +887,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	if (r)
 		dma_eventq = r->start;
 
-	davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio;
+	davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs;
 	if (dma_rx_chan != SPI_NO_RESOURCE &&
 	    dma_tx_chan != SPI_NO_RESOURCE &&
 	    dma_eventq != SPI_NO_RESOURCE) {
@@ -930,10 +899,9 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		if (ret)
 			goto free_clk;
 
-		davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
-		dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n"
-				"Using RX channel = %d , TX channel = %d and "
-				"event queue = %d", dma_rx_chan, dma_tx_chan,
+		dev_info(&pdev->dev, "DMA: supported\n");
+		dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, "
+				"event queue: %d\n", dma_rx_chan, dma_tx_chan,
 				dma_eventq);
 	}
 
-- 
1.7.3.2

[PATCH 42/49] spi: davinci: remove non-useful "clk_internal" platform data

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.

Remove this platform data.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/dm355.c            |    1 -
 arch/arm/mach-davinci/dm365.c            |    1 -
 arch/arm/mach-davinci/include/mach/spi.h |    1 -
 drivers/spi/davinci_spi.c                |    9 +--------
 4 files changed, 1 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 27ee870..c0c501a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -412,7 +412,6 @@ static struct resource dm355_spi0_resources[] = {
 static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
-	.clk_internal	= 1,
 	.cshold_bug	= true,
 };
 static struct platform_device dm355_spi0_device = {
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1e5012e..8b8204f 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -625,7 +625,6 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
 static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
-	.clk_internal	= 1,
 };
 
 static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index b3ab7d0..1f8b786 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -29,7 +29,6 @@ enum {
 struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
-	u8	clk_internal;
 	u8	intr_line;
 	u8	*chip_sel;
 	bool	cshold_bug;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 5fe2980..2e74fcd 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -927,14 +927,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		}
 	}
 
-	/* Clock internal */
-	if (davinci_spi->pdata->clk_internal)
-		set_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_CLKMOD_MASK);
-	else
-		clear_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_CLKMOD_MASK);
-
 	if (pdata->intr_line)
 		iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
 	else
@@ -943,6 +935,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
 
 	/* master mode default */
+	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
 
 	ret = spi_bitbang_start(&davinci_spi->bitbang);
-- 
1.7.3.2

[PATCH 43/49] spi: davinci: enable and power-up SPI only when required

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Enable SPI only when active transfers are in progress. Keep
it in local low power when not in use.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 2e74fcd..1652bba 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -49,7 +49,6 @@
 #define SPIFMT_WDELAY_SHIFT	24
 #define SPIFMT_PRESCALE_SHIFT	8
 
-
 /* SPIPC0 */
 #define SPIPC0_DIFUN_MASK	BIT(11)		/* MISO */
 #define SPIPC0_DOFUN_MASK	BIT(10)		/* MOSI */
@@ -67,6 +66,7 @@
 /* SPIGCR1 */
 #define SPIGCR1_CLKMOD_MASK	BIT(1)
 #define SPIGCR1_MASTER_MASK     BIT(0)
+#define SPIGCR1_POWERDOWN_MASK	BIT(8)
 #define SPIGCR1_LOOPBACK_MASK	BIT(16)
 #define SPIGCR1_SPIENA_MASK	BIT(24)
 
@@ -556,7 +556,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
-	/* Enable SPI */
+	clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
 	INIT_COMPLETION(davinci_spi->done);
@@ -693,6 +693,9 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
 	}
 
+	clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
+	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
+
 	/*
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
@@ -937,6 +940,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	/* master mode default */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
+	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
 
 	ret = spi_bitbang_start(&davinci_spi->bitbang);
 	if (ret)
-- 
1.7.3.2

[PATCH 44/49] spi: davinci: setup the driver owner

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Setup the owner member of the platform driver to THIS_MODULE
instead of leaving it NULL.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 1652bba..2ec5fd2 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -1001,7 +1001,10 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 }
 
 static struct platform_driver davinci_spi_driver = {
-	.driver.name = "spi_davinci",
+	.driver = {
+		.name = "spi_davinci",
+		.owner = THIS_MODULE,
+	},
 	.remove = __exit_p(davinci_spi_remove),
 };
 
-- 
1.7.3.2

[PATCH 45/49] spi: davinci: add additional comments

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Add comments describing the platform data members
and per-chip-select SPI configuration structure.

Also, add some comments describing the what happens
during the driver probe.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Tested-By: Michael Williamson <michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-davinci/include/mach/spi.h |   32 ++++++++++++++++++++++++++++++
 drivers/spi/davinci_spi.c                |    7 ++++++
 2 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 1f8b786..38f4da5 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -26,6 +26,20 @@ enum {
 	SPI_VERSION_2, /* For DA8xx */
 };
 
+/**
+ * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
+ *
+ * @version:	version of the SPI IP. Different DaVinci devices have slightly
+ *		varying versions of the same IP.
+ * @num_chipselect: number of chipselects supported by this SPI master
+ * @intr_line:	interrupt line used to connect the SPI IP to the ARM interrupt
+ *		controller withn the SoC. Possible values are 0 and 1.
+ * @chip_sel:	list of GPIOs which can act as chip-selects for the SPI.
+ *		SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
+ *		to populate if all chip-selects are internal.
+ * @cshold_bug:	set this to true if the SPI controller on your chip requires
+ *		a write to CSHOLD bit in between transfers (like in DM355).
+ */
 struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
@@ -34,6 +48,24 @@ struct davinci_spi_platform_data {
 	bool	cshold_bug;
 };
 
+/**
+ * davinci_spi_config - Per-chip-select configuration for SPI slave devices
+ *
+ * @wdelay:	amount of delay between transmissions. Measured in number of
+ *		SPI module clocks.
+ * @odd_parity:	polarity of parity flag at the end of transmit data stream.
+ *		0 - odd parity, 1 - even parity.
+ * @parity_enable: enable transmission of parity at end of each transmit
+ *		data stream.
+ * @io_type:	type of IO transfer. Choose between polled, interrupt and DMA.
+ * @timer_disable: disable chip-select timers (setup and hold)
+ * @c2tdelay:	chip-select setup time. Measured in number of SPI module clocks.
+ * @t2cdelay:	chip-select hold time. Measured in number of SPI module clocks.
+ * @t2edelay:	transmit data finished to SPI ENAn pin inactive time. Measured
+ *		in number of SPI clocks.
+ * @c2edelay:	chip-select active to SPI ENAn signal active time. Measured in
+ *		number of SPI clocks.
+ */
 struct davinci_spi_config {
 	u8	wdelay;
 	u8	odd_parity;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 2ec5fd2..f40f1be 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -787,6 +787,13 @@ rx_dma_failed:
 /**
  * davinci_spi_probe - probe function for SPI Master Controller
  * @pdev: platform_device structure which contains plateform specific data
+ *
+ * According to Linux Device Model this function will be invoked by Linux
+ * with platform_device struct which contains the device specific info.
+ * This function will map the SPI controller's memory, register IRQ,
+ * Reset SPI controller and setting its registers to default value.
+ * It will invoke spi_bitbang_start to create work queue so that client driver
+ * can register transfer method to work queue.
  */
 static int davinci_spi_probe(struct platform_device *pdev)
 {
-- 
1.7.3.2

[PATCH 46/49] spi: davinci: add EF Johnson Technologies copyright

[Sekhar Nori]

From: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>

Add copyright for EF Johnson Technologies since the driver
has been majorly overhauled by Brian.

Signed-off-by: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index f40f1be..42314a32 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2009 Texas Instruments.
+ * Copyright (C) 2010 EF Johnson Technologies
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
-- 
1.7.3.2


------------------------------------------------------------------------------
Beautiful is writing same markup. Internet Explorer 9 supports
standards for HTML5, CSS3, SVG 1.1,  ECMAScript5, and DOM L2 & L3.
Spend less time writing and  rewriting code and more time creating great
experiences on the web. Be a part of the beta today
http://p.sf.net/sfu/msIE9-sfdev2dev

[PATCH 47/49] spi: davinci: remove unnecessary private data member 'region_size'

[Sekhar Nori]

Remove unnecesary private data member 'region_size'
being used to store the size of SPI memory region.

Instead, get the memory resource size directly from
the platform data.

Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |   13 ++++++-------
 1 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 42314a32..f6f63d0 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -129,7 +129,6 @@ struct davinci_spi {
 	u8			version;
 	resource_size_t		pbase;
 	void __iomem		*base;
-	size_t			region_size;
 	u32			irq;
 	struct completion	done;
 
@@ -835,17 +834,15 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	}
 
 	davinci_spi->pbase = r->start;
-	davinci_spi->region_size = resource_size(r);
 	davinci_spi->pdata = pdata;
 
-	mem = request_mem_region(r->start, davinci_spi->region_size,
-					pdev->name);
+	mem = request_mem_region(r->start, resource_size(r), pdev->name);
 	if (mem == NULL) {
 		ret = -EBUSY;
 		goto free_master;
 	}
 
-	davinci_spi->base = ioremap(r->start, davinci_spi->region_size);
+	davinci_spi->base = ioremap(r->start, resource_size(r));
 	if (davinci_spi->base == NULL) {
 		ret = -ENOMEM;
 		goto release_region;
@@ -972,7 +969,7 @@ irq_free:
 unmap_io:
 	iounmap(davinci_spi->base);
 release_region:
-	release_mem_region(davinci_spi->pbase, davinci_spi->region_size);
+	release_mem_region(davinci_spi->pbase, resource_size(r));
 free_master:
 	kfree(master);
 err:
@@ -992,6 +989,7 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 {
 	struct davinci_spi *davinci_spi;
 	struct spi_master *master;
+	struct resource *r;
 
 	master = dev_get_drvdata(&pdev->dev);
 	davinci_spi = spi_master_get_devdata(master);
@@ -1003,7 +1001,8 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 	spi_master_put(master);
 	free_irq(davinci_spi->irq, davinci_spi);
 	iounmap(davinci_spi->base);
-	release_mem_region(davinci_spi->pbase, davinci_spi->region_size);
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	release_mem_region(davinci_spi->pbase, resource_size(r));
 
 	return 0;
 }
-- 
1.7.3.2

[PATCH 48/49] spi: davinci: shorten variable names

[Sekhar Nori]

Shorten names of local variables and structure members where
possible.

Local variables:

* 'davinci_spi' is being renamed 'dspi'
* 'davinci_spi_dma' is being renamed 'dma'

Structure members:

* 'dma_{tx|rx}_channel' is being renamed '{tx|rx}_channel'
  since the structure containing them is already called
  'davinci_spi_dma'

* 'davinci_spi_dma' in 'davinci_spi' structure is being
  renamed 'dma'

Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/davinci_spi.c |  409 ++++++++++++++++++++++-----------------------
 1 files changed, 198 insertions(+), 211 deletions(-)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index f6f63d0..6beab99 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -115,8 +115,8 @@
 
 /* We have 2 DMA channels per CS, one for RX and one for TX */
 struct davinci_spi_dma {
-	int			dma_tx_channel;
-	int			dma_rx_channel;
+	int			tx_channel;
+	int			rx_channel;
 	int			dummy_param_slot;
 	enum dma_event_q	eventq;
 };
@@ -138,7 +138,7 @@ struct davinci_spi {
 	u8			rx_tmp_buf[SPI_TMP_BUFSZ];
 	int			rcount;
 	int			wcount;
-	struct davinci_spi_dma	dma_channels;
+	struct davinci_spi_dma	dma;
 	struct davinci_spi_platform_data *pdata;
 
 	void			(*get_rx)(u32 rx_data, struct davinci_spi *);
@@ -149,42 +149,42 @@ struct davinci_spi {
 
 static struct davinci_spi_config davinci_spi_default_cfg;
 
-static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
+static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *dspi)
 {
-	if (davinci_spi->rx) {
-		u8 *rx = davinci_spi->rx;
+	if (dspi->rx) {
+		u8 *rx = dspi->rx;
 		*rx++ = (u8)data;
-		davinci_spi->rx = rx;
+		dspi->rx = rx;
 	}
 }
 
-static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *davinci_spi)
+static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *dspi)
 {
-	if (davinci_spi->rx) {
-		u16 *rx = davinci_spi->rx;
+	if (dspi->rx) {
+		u16 *rx = dspi->rx;
 		*rx++ = (u16)data;
-		davinci_spi->rx = rx;
+		dspi->rx = rx;
 	}
 }
 
-static u32 davinci_spi_tx_buf_u8(struct davinci_spi *davinci_spi)
+static u32 davinci_spi_tx_buf_u8(struct davinci_spi *dspi)
 {
 	u32 data = 0;
-	if (davinci_spi->tx) {
-		const u8 *tx = davinci_spi->tx;
+	if (dspi->tx) {
+		const u8 *tx = dspi->tx;
 		data = *tx++;
-		davinci_spi->tx = tx;
+		dspi->tx = tx;
 	}
 	return data;
 }
 
-static u32 davinci_spi_tx_buf_u16(struct davinci_spi *davinci_spi)
+static u32 davinci_spi_tx_buf_u16(struct davinci_spi *dspi)
 {
 	u32 data = 0;
-	if (davinci_spi->tx) {
-		const u16 *tx = davinci_spi->tx;
+	if (dspi->tx) {
+		const u16 *tx = dspi->tx;
 		data = *tx++;
-		davinci_spi->tx = tx;
+		dspi->tx = tx;
 	}
 	return data;
 }
@@ -210,14 +210,14 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits)
  */
 static void davinci_spi_chipselect(struct spi_device *spi, int value)
 {
-	struct davinci_spi *davinci_spi;
+	struct davinci_spi *dspi;
 	struct davinci_spi_platform_data *pdata;
 	u8 chip_sel = spi->chip_select;
-	u16 spidat1_cfg = CS_DEFAULT;
+	u16 spidat1 = CS_DEFAULT;
 	bool gpio_chipsel = false;
 
-	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
+	dspi = spi_master_get_devdata(spi->master);
+	pdata = dspi->pdata;
 
 	if (pdata->chip_sel && chip_sel < pdata->num_chipselect &&
 				pdata->chip_sel[chip_sel] != SPI_INTERN_CS)
@@ -234,11 +234,11 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
 			gpio_set_value(pdata->chip_sel[chip_sel], 1);
 	} else {
 		if (value == BITBANG_CS_ACTIVE) {
-			spidat1_cfg |= SPIDAT1_CSHOLD_MASK;
-			spidat1_cfg &= ~(0x1 << chip_sel);
+			spidat1 |= SPIDAT1_CSHOLD_MASK;
+			spidat1 &= ~(0x1 << chip_sel);
 		}
 
-		iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2);
+		iowrite16(spidat1, dspi->base + SPIDAT1 + 2);
 	}
 }
 
@@ -252,12 +252,12 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
  * Returns: calculated prescale - 1 for easy programming into SPI registers
  * or negative error number if valid prescalar cannot be updated.
  */
-static inline int davinci_spi_get_prescale(struct davinci_spi *davinci_spi,
+static inline int davinci_spi_get_prescale(struct davinci_spi *dspi,
 							u32 max_speed_hz)
 {
 	int ret;
 
-	ret = DIV_ROUND_UP(clk_get_rate(davinci_spi->clk), max_speed_hz);
+	ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz);
 
 	if (ret < 3 || ret > 256)
 		return -EINVAL;
@@ -278,12 +278,12 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 		struct spi_transfer *t)
 {
 
-	struct davinci_spi *davinci_spi;
+	struct davinci_spi *dspi;
 	struct davinci_spi_config *spicfg;
 	u8 bits_per_word = 0;
 	u32 hz = 0, spifmt = 0, prescale = 0;
 
-	davinci_spi = spi_master_get_devdata(spi->master);
+	dspi = spi_master_get_devdata(spi->master);
 	spicfg = (struct davinci_spi_config *)spi->controller_data;
 	if (!spicfg)
 		spicfg = &davinci_spi_default_cfg;
@@ -302,13 +302,13 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 	 * 8bit, 16bit or 32bit transfer
 	 */
 	if (bits_per_word <= 8 && bits_per_word >= 2) {
-		davinci_spi->get_rx = davinci_spi_rx_buf_u8;
-		davinci_spi->get_tx = davinci_spi_tx_buf_u8;
-		davinci_spi->bytes_per_word[spi->chip_select] = 1;
+		dspi->get_rx = davinci_spi_rx_buf_u8;
+		dspi->get_tx = davinci_spi_tx_buf_u8;
+		dspi->bytes_per_word[spi->chip_select] = 1;
 	} else if (bits_per_word <= 16 && bits_per_word >= 2) {
-		davinci_spi->get_rx = davinci_spi_rx_buf_u16;
-		davinci_spi->get_tx = davinci_spi_tx_buf_u16;
-		davinci_spi->bytes_per_word[spi->chip_select] = 2;
+		dspi->get_rx = davinci_spi_rx_buf_u16;
+		dspi->get_tx = davinci_spi_tx_buf_u16;
+		dspi->bytes_per_word[spi->chip_select] = 2;
 	} else
 		return -EINVAL;
 
@@ -317,7 +317,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 
 	/* Set up SPIFMTn register, unique to this chipselect. */
 
-	prescale = davinci_spi_get_prescale(davinci_spi, hz);
+	prescale = davinci_spi_get_prescale(dspi, hz);
 	if (prescale < 0)
 		return prescale;
 
@@ -345,7 +345,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 	 *  - 4 pin with enable is (SPI_READY | SPI_NO_CS)
 	 */
 
-	if (davinci_spi->version == SPI_VERSION_2) {
+	if (dspi->version == SPI_VERSION_2) {
 
 		u32 delay = 0;
 
@@ -375,10 +375,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 						& SPIDELAY_C2EDELAY_MASK;
 		}
 
-		iowrite32(delay, davinci_spi->base + SPIDELAY);
+		iowrite32(delay, dspi->base + SPIDELAY);
 	}
 
-	iowrite32(spifmt, davinci_spi->base + SPIFMT0);
+	iowrite32(spifmt, dspi->base + SPIFMT0);
 
 	return 0;
 }
@@ -392,11 +392,11 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
 static int davinci_spi_setup(struct spi_device *spi)
 {
 	int retval = 0;
-	struct davinci_spi *davinci_spi;
+	struct davinci_spi *dspi;
 	struct davinci_spi_platform_data *pdata;
 
-	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
+	dspi = spi_master_get_devdata(spi->master);
+	pdata = dspi->pdata;
 
 	/* if bits per word length is zero then set it default 8 */
 	if (!spi->bits_per_word)
@@ -405,28 +405,24 @@ static int davinci_spi_setup(struct spi_device *spi)
 	if (!(spi->mode & SPI_NO_CS)) {
 		if ((pdata->chip_sel == NULL) ||
 		    (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS))
-			set_io_bits(davinci_spi->base + SPIPC0,
-					1 << spi->chip_select);
+			set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select);
 
 	}
 
 	if (spi->mode & SPI_READY)
-		set_io_bits(davinci_spi->base + SPIPC0, SPIPC0_SPIENA_MASK);
+		set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK);
 
 	if (spi->mode & SPI_LOOP)
-		set_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_LOOPBACK_MASK);
+		set_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK);
 	else
-		clear_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_LOOPBACK_MASK);
+		clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK);
 
 	return retval;
 }
 
-static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
-				   int int_status)
+static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status)
 {
-	struct device *sdev = davinci_spi->bitbang.master->dev.parent;
+	struct device *sdev = dspi->bitbang.master->dev.parent;
 
 	if (int_status & SPIFLG_TIMEOUT_MASK) {
 		dev_dbg(sdev, "SPI Time-out Error\n");
@@ -441,7 +437,7 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 		return -EIO;
 	}
 
-	if (davinci_spi->version == SPI_VERSION_2) {
+	if (dspi->version == SPI_VERSION_2) {
 		if (int_status & SPIFLG_DLEN_ERR_MASK) {
 			dev_dbg(sdev, "SPI Data Length Error\n");
 			return -EIO;
@@ -465,35 +461,35 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 
 /**
  * davinci_spi_process_events - check for and handle any SPI controller events
- * @davinci_spi: the controller data
+ * @dspi: the controller data
  *
  * This function will check the SPIFLG register and handle any events that are
  * detected there
  */
-static int davinci_spi_process_events(struct davinci_spi *davinci_spi)
+static int davinci_spi_process_events(struct davinci_spi *dspi)
 {
-	u32 buf, status, errors = 0, data1_reg_val;
+	u32 buf, status, errors = 0, spidat1;
 
-	buf = ioread32(davinci_spi->base + SPIBUF);
+	buf = ioread32(dspi->base + SPIBUF);
 
-	if (davinci_spi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) {
-		davinci_spi->get_rx(buf & 0xFFFF, davinci_spi);
-		davinci_spi->rcount--;
+	if (dspi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) {
+		dspi->get_rx(buf & 0xFFFF, dspi);
+		dspi->rcount--;
 	}
 
-	status = ioread32(davinci_spi->base + SPIFLG);
+	status = ioread32(dspi->base + SPIFLG);
 
 	if (unlikely(status & SPIFLG_ERROR_MASK)) {
 		errors = status & SPIFLG_ERROR_MASK;
 		goto out;
 	}
 
-	if (davinci_spi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) {
-		data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
-		davinci_spi->wcount--;
-		data1_reg_val &= ~0xFFFF;
-		data1_reg_val |= 0xFFFF & davinci_spi->get_tx(davinci_spi);
-		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+	if (dspi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) {
+		spidat1 = ioread32(dspi->base + SPIDAT1);
+		dspi->wcount--;
+		spidat1 &= ~0xFFFF;
+		spidat1 |= 0xFFFF & dspi->get_tx(dspi);
+		iowrite32(spidat1, dspi->base + SPIDAT1);
 	}
 
 out:
@@ -502,21 +498,20 @@ out:
 
 static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
 {
-	struct davinci_spi *davinci_spi = data;
-	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
+	struct davinci_spi *dspi = data;
+	struct davinci_spi_dma *dma = &dspi->dma;
 
 	edma_stop(lch);
 
 	if (status == DMA_COMPLETE) {
-		if (lch == davinci_spi_dma->dma_rx_channel)
-			davinci_spi->rcount = 0;
-		if (lch == davinci_spi_dma->dma_tx_channel)
-			davinci_spi->wcount = 0;
+		if (lch == dma->rx_channel)
+			dspi->rcount = 0;
+		if (lch == dma->tx_channel)
+			dspi->wcount = 0;
 	}
 
-	if ((!davinci_spi->wcount && !davinci_spi->rcount) ||
-	    (status != DMA_COMPLETE))
-		complete(&davinci_spi->done);
+	if ((!dspi->wcount && !dspi->rcount) || (status != DMA_COMPLETE))
+		complete(&dspi->done);
 }
 
 /**
@@ -530,57 +525,57 @@ static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
  */
 static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 {
-	struct davinci_spi *davinci_spi;
+	struct davinci_spi *dspi;
 	int data_type, ret;
-	u32 tx_data, data1_reg_val;
+	u32 tx_data, spidat1;
 	u32 errors = 0;
 	struct davinci_spi_config *spicfg;
 	struct davinci_spi_platform_data *pdata;
 	unsigned uninitialized_var(rx_buf_count);
 	struct device *sdev;
 
-	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
+	dspi = spi_master_get_devdata(spi->master);
+	pdata = dspi->pdata;
 	spicfg = (struct davinci_spi_config *)spi->controller_data;
 	if (!spicfg)
 		spicfg = &davinci_spi_default_cfg;
-	sdev = davinci_spi->bitbang.master->dev.parent;
+	sdev = dspi->bitbang.master->dev.parent;
 
 	/* convert len to words based on bits_per_word */
-	data_type = davinci_spi->bytes_per_word[spi->chip_select];
+	data_type = dspi->bytes_per_word[spi->chip_select];
 
-	davinci_spi->tx = t->tx_buf;
-	davinci_spi->rx = t->rx_buf;
-	davinci_spi->wcount = t->len / data_type;
-	davinci_spi->rcount = davinci_spi->wcount;
+	dspi->tx = t->tx_buf;
+	dspi->rx = t->rx_buf;
+	dspi->wcount = t->len / data_type;
+	dspi->rcount = dspi->wcount;
 
-	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
+	spidat1 = ioread32(dspi->base + SPIDAT1);
 
-	clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
-	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
+	clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
+	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	INIT_COMPLETION(davinci_spi->done);
+	INIT_COMPLETION(dspi->done);
 
 	if (spicfg->io_type == SPI_IO_TYPE_INTR)
-		set_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT);
+		set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT);
 
 	if (spicfg->io_type != SPI_IO_TYPE_DMA) {
 		/* start the transfer */
-		davinci_spi->wcount--;
-		tx_data = davinci_spi->get_tx(davinci_spi);
-		data1_reg_val &= 0xFFFF0000;
-		data1_reg_val |= tx_data & 0xFFFF;
-		iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+		dspi->wcount--;
+		tx_data = dspi->get_tx(dspi);
+		spidat1 &= 0xFFFF0000;
+		spidat1 |= tx_data & 0xFFFF;
+		iowrite32(spidat1, dspi->base + SPIDAT1);
 	} else {
-		struct davinci_spi_dma *davinci_spi_dma;
+		struct davinci_spi_dma *dma;
 		unsigned long tx_reg, rx_reg;
 		struct edmacc_param param;
 		void *rx_buf;
 
-		davinci_spi_dma = &davinci_spi->dma_channels;
+		dma = &dspi->dma;
 
-		tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
-		rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
+		tx_reg = (unsigned long)dspi->pbase + SPIDAT1;
+		rx_reg = (unsigned long)dspi->pbase + SPIBUF;
 
 		/*
 		 * Transmit DMA setup
@@ -596,26 +591,24 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 
 		if (t->tx_buf) {
 			t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
-					davinci_spi->wcount, DMA_TO_DEVICE);
+						dspi->wcount, DMA_TO_DEVICE);
 			if (dma_mapping_error(&spi->dev, t->tx_dma)) {
 				dev_dbg(sdev, "Unable to DMA map %d bytes"
-						"TX buffer\n",
-						davinci_spi->wcount);
+						"TX buffer\n", dspi->wcount);
 				return -ENOMEM;
 			}
 		}
 
-		param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel);
+		param.opt = TCINTEN | EDMA_TCC(dma->tx_channel);
 		param.src = t->tx_buf ? t->tx_dma : tx_reg;
-		param.a_b_cnt = davinci_spi->wcount << 16 | data_type;
+		param.a_b_cnt = dspi->wcount << 16 | data_type;
 		param.dst = tx_reg;
 		param.src_dst_bidx = t->tx_buf ? data_type : 0;
 		param.link_bcntrld = 0xffff;
 		param.src_dst_cidx = 0;
 		param.ccnt = 1;
-		edma_write_slot(davinci_spi_dma->dma_tx_channel, &param);
-		edma_link(davinci_spi_dma->dma_tx_channel,
-				davinci_spi_dma->dummy_param_slot);
+		edma_write_slot(dma->tx_channel, &param);
+		edma_link(dma->tx_channel, dma->dummy_param_slot);
 
 		/*
 		 * Receive DMA setup
@@ -631,10 +624,10 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 
 		if (t->rx_buf) {
 			rx_buf = t->rx_buf;
-			rx_buf_count = davinci_spi->rcount;
+			rx_buf_count = dspi->rcount;
 		} else {
-			rx_buf = davinci_spi->rx_tmp_buf;
-			rx_buf_count = sizeof(davinci_spi->rx_tmp_buf);
+			rx_buf = dspi->rx_tmp_buf;
+			rx_buf_count = sizeof(dspi->rx_tmp_buf);
 		}
 
 		t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count,
@@ -643,71 +636,69 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
 			dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
 								rx_buf_count);
 			if (t->tx_buf)
-				dma_unmap_single(NULL, t->tx_dma,
-						davinci_spi->wcount,
-						DMA_TO_DEVICE);
+				dma_unmap_single(NULL, t->tx_dma, dspi->wcount,
+								DMA_TO_DEVICE);
 			return -ENOMEM;
 		}
 
-		param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel);
+		param.opt = TCINTEN | EDMA_TCC(dma->rx_channel);
 		param.src = rx_reg;
-		param.a_b_cnt = davinci_spi->rcount << 16 | data_type;
+		param.a_b_cnt = dspi->rcount << 16 | data_type;
 		param.dst = t->rx_dma;
 		param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
 		param.link_bcntrld = 0xffff;
 		param.src_dst_cidx = 0;
 		param.ccnt = 1;
-		edma_write_slot(davinci_spi_dma->dma_rx_channel, &param);
+		edma_write_slot(dma->rx_channel, &param);
 
 		if (pdata->cshold_bug)
-			iowrite16(data1_reg_val >> 16,
-					davinci_spi->base + SPIDAT1 + 2);
+			iowrite16(spidat1 >> 16, dspi->base + SPIDAT1 + 2);
 
-		edma_start(davinci_spi_dma->dma_rx_channel);
-		edma_start(davinci_spi_dma->dma_tx_channel);
-		set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
+		edma_start(dma->rx_channel);
+		edma_start(dma->tx_channel);
+		set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
 	}
 
 	/* Wait for the transfer to complete */
 	if (spicfg->io_type != SPI_IO_TYPE_POLL) {
-		wait_for_completion_interruptible(&(davinci_spi->done));
+		wait_for_completion_interruptible(&(dspi->done));
 	} else {
-		while (davinci_spi->rcount > 0 || davinci_spi->wcount > 0) {
-			errors = davinci_spi_process_events(davinci_spi);
+		while (dspi->rcount > 0 || dspi->wcount > 0) {
+			errors = davinci_spi_process_events(dspi);
 			if (errors)
 				break;
 			cpu_relax();
 		}
 	}
 
-	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
+	clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL);
 	if (spicfg->io_type == SPI_IO_TYPE_DMA) {
 
 		if (t->tx_buf)
-			dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
+			dma_unmap_single(NULL, t->tx_dma, dspi->wcount,
 								DMA_TO_DEVICE);
 
 		dma_unmap_single(NULL, t->rx_dma, rx_buf_count,
 							DMA_FROM_DEVICE);
 
-		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
+		clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
 	}
 
-	clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
-	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
+	clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
+	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
 
 	/*
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
 	 */
 	if (errors) {
-		ret = davinci_spi_check_error(davinci_spi, errors);
+		ret = davinci_spi_check_error(dspi, errors);
 		WARN(!ret, "%s: error reported but no error found!\n",
 							dev_name(&spi->dev));
 		return ret;
 	}
 
-	if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) {
+	if (dspi->rcount != 0 || dspi->wcount != 0) {
 		dev_err(sdev, "SPI data transfer error\n");
 		return -EIO;
 	}
@@ -726,60 +717,56 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
  * If transfer length is zero then it will indicate the COMPLETION so that
  * davinci_spi_bufs function can go ahead.
  */
-static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
+static irqreturn_t davinci_spi_irq(s32 irq, void *data)
 {
-	struct davinci_spi *davinci_spi = context_data;
+	struct davinci_spi *dspi = data;
 	int status;
 
-	status = davinci_spi_process_events(davinci_spi);
+	status = davinci_spi_process_events(dspi);
 	if (unlikely(status != 0))
-		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT);
+		clear_io_bits(dspi->base + SPIINT, SPIINT_MASKINT);
 
-	if ((!davinci_spi->rcount && !davinci_spi->wcount) || status)
-		complete(&davinci_spi->done);
+	if ((!dspi->rcount && !dspi->wcount) || status)
+		complete(&dspi->done);
 
 	return IRQ_HANDLED;
 }
 
-static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
+static int davinci_spi_request_dma(struct davinci_spi *dspi)
 {
 	int r;
-	struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
+	struct davinci_spi_dma *dma = &dspi->dma;
 
-	r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
-				davinci_spi_dma_callback, davinci_spi,
-				davinci_spi_dma->eventq);
+	r = edma_alloc_channel(dma->rx_channel, davinci_spi_dma_callback, dspi,
+								dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI RX\n");
 		r = -EAGAIN;
 		goto rx_dma_failed;
 	}
 
-	r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
-				davinci_spi_dma_callback, davinci_spi,
-				davinci_spi_dma->eventq);
+	r = edma_alloc_channel(dma->tx_channel, davinci_spi_dma_callback, dspi,
+								dma->eventq);
 	if (r < 0) {
 		pr_err("Unable to request DMA channel for SPI TX\n");
 		r = -EAGAIN;
 		goto tx_dma_failed;
 	}
 
-	r = edma_alloc_slot(EDMA_CTLR(davinci_spi_dma->dma_tx_channel),
-		EDMA_SLOT_ANY);
+	r = edma_alloc_slot(EDMA_CTLR(dma->tx_channel), EDMA_SLOT_ANY);
 	if (r < 0) {
 		pr_err("Unable to request SPI TX DMA param slot\n");
 		r = -EAGAIN;
 		goto param_failed;
 	}
-	davinci_spi_dma->dummy_param_slot = r;
-	edma_link(davinci_spi_dma->dummy_param_slot,
-		davinci_spi_dma->dummy_param_slot);
+	dma->dummy_param_slot = r;
+	edma_link(dma->dummy_param_slot, dma->dummy_param_slot);
 
 	return 0;
 param_failed:
-	edma_free_channel(davinci_spi_dma->dma_tx_channel);
+	edma_free_channel(dma->tx_channel);
 tx_dma_failed:
-	edma_free_channel(davinci_spi_dma->dma_rx_channel);
+	edma_free_channel(dma->rx_channel);
 rx_dma_failed:
 	return r;
 }
@@ -798,7 +785,7 @@ rx_dma_failed:
 static int davinci_spi_probe(struct platform_device *pdev)
 {
 	struct spi_master *master;
-	struct davinci_spi *davinci_spi;
+	struct davinci_spi *dspi;
 	struct davinci_spi_platform_data *pdata;
 	struct resource *r, *mem;
 	resource_size_t dma_rx_chan = SPI_NO_RESOURCE;
@@ -821,8 +808,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
 
 	dev_set_drvdata(&pdev->dev, master);
 
-	davinci_spi = spi_master_get_devdata(master);
-	if (davinci_spi == NULL) {
+	dspi = spi_master_get_devdata(master);
+	if (dspi == NULL) {
 		ret = -ENOENT;
 		goto free_master;
 	}
@@ -833,8 +820,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		goto free_master;
 	}
 
-	davinci_spi->pbase = r->start;
-	davinci_spi->pdata = pdata;
+	dspi->pbase = r->start;
+	dspi->pdata = pdata;
 
 	mem = request_mem_region(r->start, resource_size(r), pdev->name);
 	if (mem == NULL) {
@@ -842,48 +829,48 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		goto free_master;
 	}
 
-	davinci_spi->base = ioremap(r->start, resource_size(r));
-	if (davinci_spi->base == NULL) {
+	dspi->base = ioremap(r->start, resource_size(r));
+	if (dspi->base == NULL) {
 		ret = -ENOMEM;
 		goto release_region;
 	}
 
-	davinci_spi->irq = platform_get_irq(pdev, 0);
-	if (davinci_spi->irq <= 0) {
+	dspi->irq = platform_get_irq(pdev, 0);
+	if (dspi->irq <= 0) {
 		ret = -EINVAL;
 		goto unmap_io;
 	}
 
-	ret = request_irq(davinci_spi->irq, davinci_spi_irq, 0,
-					dev_name(&pdev->dev), davinci_spi);
+	ret = request_irq(dspi->irq, davinci_spi_irq, 0, dev_name(&pdev->dev),
+									dspi);
 	if (ret)
 		goto unmap_io;
 
-	davinci_spi->bitbang.master = spi_master_get(master);
-	if (davinci_spi->bitbang.master == NULL) {
+	dspi->bitbang.master = spi_master_get(master);
+	if (dspi->bitbang.master == NULL) {
 		ret = -ENODEV;
 		goto irq_free;
 	}
 
-	davinci_spi->clk = clk_get(&pdev->dev, NULL);
-	if (IS_ERR(davinci_spi->clk)) {
+	dspi->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(dspi->clk)) {
 		ret = -ENODEV;
 		goto put_master;
 	}
-	clk_enable(davinci_spi->clk);
+	clk_enable(dspi->clk);
 
 	master->bus_num = pdev->id;
 	master->num_chipselect = pdata->num_chipselect;
 	master->setup = davinci_spi_setup;
 
-	davinci_spi->bitbang.chipselect = davinci_spi_chipselect;
-	davinci_spi->bitbang.setup_transfer = davinci_spi_setup_transfer;
+	dspi->bitbang.chipselect = davinci_spi_chipselect;
+	dspi->bitbang.setup_transfer = davinci_spi_setup_transfer;
 
-	davinci_spi->version = pdata->version;
+	dspi->version = pdata->version;
 
-	davinci_spi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP;
-	if (davinci_spi->version == SPI_VERSION_2)
-		davinci_spi->bitbang.flags |= SPI_READY;
+	dspi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP;
+	if (dspi->version == SPI_VERSION_2)
+		dspi->bitbang.flags |= SPI_READY;
 
 	r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
 	if (r)
@@ -895,15 +882,15 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	if (r)
 		dma_eventq = r->start;
 
-	davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs;
+	dspi->bitbang.txrx_bufs = davinci_spi_bufs;
 	if (dma_rx_chan != SPI_NO_RESOURCE &&
 	    dma_tx_chan != SPI_NO_RESOURCE &&
 	    dma_eventq != SPI_NO_RESOURCE) {
-		davinci_spi->dma_channels.dma_rx_channel = dma_rx_chan;
-		davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan;
-		davinci_spi->dma_channels.eventq = dma_eventq;
+		dspi->dma.rx_channel = dma_rx_chan;
+		dspi->dma.tx_channel = dma_tx_chan;
+		dspi->dma.eventq = dma_eventq;
 
-		ret = davinci_spi_request_dma(davinci_spi);
+		ret = davinci_spi_request_dma(dspi);
 		if (ret)
 			goto free_clk;
 
@@ -913,19 +900,19 @@ static int davinci_spi_probe(struct platform_device *pdev)
 				dma_eventq);
 	}
 
-	davinci_spi->get_rx = davinci_spi_rx_buf_u8;
-	davinci_spi->get_tx = davinci_spi_tx_buf_u8;
+	dspi->get_rx = davinci_spi_rx_buf_u8;
+	dspi->get_tx = davinci_spi_tx_buf_u8;
 
-	init_completion(&davinci_spi->done);
+	init_completion(&dspi->done);
 
 	/* Reset In/OUT SPI module */
-	iowrite32(0, davinci_spi->base + SPIGCR0);
+	iowrite32(0, dspi->base + SPIGCR0);
 	udelay(100);
-	iowrite32(1, davinci_spi->base + SPIGCR0);
+	iowrite32(1, dspi->base + SPIGCR0);
 
 	/* Set up SPIPC0.  CS and ENA init is done in davinci_spi_setup */
 	spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK;
-	iowrite32(spipc0, davinci_spi->base + SPIPC0);
+	iowrite32(spipc0, dspi->base + SPIPC0);
 
 	/* initialize chip selects */
 	if (pdata->chip_sel) {
@@ -936,40 +923,40 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	}
 
 	if (pdata->intr_line)
-		iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
+		iowrite32(SPI_INTLVL_1, dspi->base + SPILVL);
 	else
-		iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL);
+		iowrite32(SPI_INTLVL_0, dspi->base + SPILVL);
 
-	iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
+	iowrite32(CS_DEFAULT, dspi->base + SPIDEF);
 
 	/* master mode default */
-	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
-	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
-	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
+	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
+	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
+	set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
 
-	ret = spi_bitbang_start(&davinci_spi->bitbang);
+	ret = spi_bitbang_start(&dspi->bitbang);
 	if (ret)
 		goto free_dma;
 
-	dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base);
+	dev_info(&pdev->dev, "Controller at 0x%p\n", dspi->base);
 
 	return ret;
 
 free_dma:
-	edma_free_channel(davinci_spi->dma_channels.dma_tx_channel);
-	edma_free_channel(davinci_spi->dma_channels.dma_rx_channel);
-	edma_free_slot(davinci_spi->dma_channels.dummy_param_slot);
+	edma_free_channel(dspi->dma.tx_channel);
+	edma_free_channel(dspi->dma.rx_channel);
+	edma_free_slot(dspi->dma.dummy_param_slot);
 free_clk:
-	clk_disable(davinci_spi->clk);
-	clk_put(davinci_spi->clk);
+	clk_disable(dspi->clk);
+	clk_put(dspi->clk);
 put_master:
 	spi_master_put(master);
 irq_free:
-	free_irq(davinci_spi->irq, davinci_spi);
+	free_irq(dspi->irq, dspi);
 unmap_io:
-	iounmap(davinci_spi->base);
+	iounmap(dspi->base);
 release_region:
-	release_mem_region(davinci_spi->pbase, resource_size(r));
+	release_mem_region(dspi->pbase, resource_size(r));
 free_master:
 	kfree(master);
 err:
@@ -987,22 +974,22 @@ err:
  */
 static int __exit davinci_spi_remove(struct platform_device *pdev)
 {
-	struct davinci_spi *davinci_spi;
+	struct davinci_spi *dspi;
 	struct spi_master *master;
 	struct resource *r;
 
 	master = dev_get_drvdata(&pdev->dev);
-	davinci_spi = spi_master_get_devdata(master);
+	dspi = spi_master_get_devdata(master);
 
-	spi_bitbang_stop(&davinci_spi->bitbang);
+	spi_bitbang_stop(&dspi->bitbang);
 
-	clk_disable(davinci_spi->clk);
-	clk_put(davinci_spi->clk);
+	clk_disable(dspi->clk);
+	clk_put(dspi->clk);
 	spi_master_put(master);
-	free_irq(davinci_spi->irq, davinci_spi);
-	iounmap(davinci_spi->base);
+	free_irq(dspi->irq, dspi);
+	iounmap(dspi->base);
 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	release_mem_region(davinci_spi->pbase, resource_size(r));
+	release_mem_region(dspi->pbase, resource_size(r));
 
 	return 0;
 }
-- 
1.7.3.2

[PATCH 49/49] spi: davinci: kconfig: add manufacturer name to prompt string

[Sekhar Nori]

Add manufacturer name to the Kconfig prompt string and move
the controller name to the begining of the prompt.

This helps locate the driver easily among the list of existing
drivers.

While at it, also add information about being able to build
the driver as module.

Tested-By: Brian Niebuhr <bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
Signed-off-by: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
---
 drivers/spi/Kconfig |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 78f9fd0..a32796e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -111,11 +111,14 @@ config SPI_COLDFIRE_QSPI
 	  will be called coldfire_qspi.
 
 config SPI_DAVINCI
-	tristate "SPI controller driver for DaVinci/DA8xx SoC's"
+	tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
 	depends on SPI_MASTER && ARCH_DAVINCI
 	select SPI_BITBANG
 	help
-	  SPI master controller for DaVinci and DA8xx SPI modules.
+	  SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
+
+	  This driver can also be built as a module. The module will be called
+	  davinci_spi.
 
 config SPI_EP93XX
 	tristate "Cirrus Logic EP93xx SPI controller"
-- 
1.7.3.2

Re: [PATCH 05/49] spi: davinci: remove unnecessary typecast

[Sergei Shtylyov]

Hello.

On 17-11-2010 13:43, Sekhar Nori wrote:

> The typecasting of SPI base address to davinci_spi_reg is
> unused.

    You mean unnecessary?

> Remove it.

> Tested-By: Michael Williamson<michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org>
> Tested-By: Brian Niebuhr<bniebuhr-JaPwekKOx1yaMJb+Lgu22Q@public.gmane.org>
> Signed-off-by: Sekhar Nori<nsekhar-l0cyMroinI0@public.gmane.org>

WBR, Sergei

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RE: [PATCH 05/49] spi: davinci: remove unnecessary typecast

[Nori, Sekhar]

Hi Sergei,

On Wed, Nov 17, 2010 at 16:45:06, Sergei Shtylyov wrote:
> Hello.
>
> On 17-11-2010 13:43, Sekhar Nori wrote:
>
> > The typecasting of SPI base address to davinci_spi_reg is
> > unused.
>
>     You mean unnecessary?

I used "unused" because "struct davinci_spi_reg" is actually
undefined.

Thanks,
Sekhar


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Re: [PATCH 00/49] spi: davinci: re-write existing driver

[Grant Likely]

On Wed, Nov 17, 2010 at 04:13:32PM +0530, Sekhar Nori wrote:
> This patch series represents a break-up into reviewable portions
> of the work originally done by Brian and posted here:
> 
> https://patchwork.kernel.org/patch/114924/
> 
> While this series does not exactly add up to what Brian's patch
> is, it is pretty close functionally.
> 
> This series was tested by me on OMAP-L138, OMAP-L137, DM365 and DM355
> EVMs and on their OMAP-L138 boards (not EVMs) by Brian and Michael.
> 
> The patch series applies to latest of Linus's tree in hope that
> it will be considered for merge in 2.6.37 since the series is
> about bug fixes and clean-up.
> 
> This series along with some patches to add SPI platform support
> to OMAP-L1x EVMs and Mity-DSP board is also available here:
> 
> http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/davinci-spi-rewrite

I went through all the patches, and it looks good to me.  Is there a
public git:// url I can use to pull this series?

>  5 files changed, 587 insertions(+), 799 deletions(-)

Nice diffstat.  :-)

g.

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RE: [PATCH 00/49] spi: davinci: re-write existing driver

[Nori, Sekhar]

Hi Grant,

On Wed, Nov 17, 2010 at 20:54:26, Grant Likely wrote:
> On Wed, Nov 17, 2010 at 04:13:32PM +0530, Sekhar Nori wrote:
> > This patch series represents a break-up into reviewable portions
> > of the work originally done by Brian and posted here:
> >
> > https://patchwork.kernel.org/patch/114924/
> >
> > While this series does not exactly add up to what Brian's patch
> > is, it is pretty close functionally.
> >
> > This series was tested by me on OMAP-L138, OMAP-L137, DM365 and DM355
> > EVMs and on their OMAP-L138 boards (not EVMs) by Brian and Michael.
> >
> > The patch series applies to latest of Linus's tree in hope that
> > it will be considered for merge in 2.6.37 since the series is
> > about bug fixes and clean-up.
> >
> > This series along with some patches to add SPI platform support
> > to OMAP-L1x EVMs and Mity-DSP board is also available here:
> >
> > http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/davinci-spi-rewrite
>
> I went through all the patches, and it looks good to me.  Is there a
> public git:// url I can use to pull this series?

Thanks for the quick review.

Here is the pull request:

The following changes since commit 0a5b871ea4c6bfb2723ac2ffc7ef5c32452abb89:
  Linus Torvalds (1):
        hardirq.h: remove now-empty #ifdef/#endif pair

are available in the git repository at:

  git://arago-project.org/git/projects/linux-davinci.git for-grant

<short log and diffstat deleted>

Thanks,
Sekhar


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RE: [PATCH 00/49] spi: davinci: re-write existing driver

[Nori, Sekhar]

On Thu, Nov 18, 2010 at 12:23:24, Nori, Sekhar wrote:
>
> Here is the pull request:
>
> The following changes since commit 0a5b871ea4c6bfb2723ac2ffc7ef5c32452abb89:
>   Linus Torvalds (1):
>         hardirq.h: remove now-empty #ifdef/#endif pair
>
> are available in the git repository at:
>
>   git://arago-project.org/git/projects/linux-davinci.git for-grant
>
> <short log and diffstat deleted>

Oops, I just realized that because my sign-off is added when
git-format-patch -s is run, the patches in the pull request
do not have my sign-off. I will recreate the branch with my
sign-off added to these patches.

Thanks,
Sekhar


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RE: [PATCH 00/49] spi: davinci: re-write existing driver

[Nori, Sekhar]

Hi Grant,

On Thu, Nov 18, 2010 at 17:01:24, Nori, Sekhar wrote:
> On Thu, Nov 18, 2010 at 12:23:24, Nori, Sekhar wrote:
> >
> > Here is the pull request:
> >
> > The following changes since commit 0a5b871ea4c6bfb2723ac2ffc7ef5c32452abb89:
> >   Linus Torvalds (1):
> >         hardirq.h: remove now-empty #ifdef/#endif pair
> >
> > are available in the git repository at:
> >
> >   git://arago-project.org/git/projects/linux-davinci.git for-grant
> >
> > <short log and diffstat deleted>
>
> Oops, I just realized that because my sign-off is added when
> git-format-patch -s is run, the patches in the pull request
> do not have my sign-off. I will recreate the branch with my
> sign-off added to these patches.

I fixed this now. You can go ahead and do the pull.

Thanks,
Sekhar


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Re: [PATCH 00/49] spi: davinci: re-write existing driver

[Michael Williamson]

On 11/18/2010 08:14 AM, Nori, Sekhar wrote:
> Hi Grant,
> 
> On Thu, Nov 18, 2010 at 17:01:24, Nori, Sekhar wrote:
>> On Thu, Nov 18, 2010 at 12:23:24, Nori, Sekhar wrote:
>>>
>>> Here is the pull request:
>>>
>>> The following changes since commit 0a5b871ea4c6bfb2723ac2ffc7ef5c32452abb89:
>>>   Linus Torvalds (1):
>>>         hardirq.h: remove now-empty #ifdef/#endif pair
>>>
>>> are available in the git repository at:
>>>
>>>   git://arago-project.org/git/projects/linux-davinci.git for-grant
>>>
>>> <short log and diffstat deleted>
>>
>> Oops, I just realized that because my sign-off is added when
>> git-format-patch -s is run, the patches in the pull request
>> do not have my sign-off. I will recreate the branch with my
>> sign-off added to these patches.
> 
> I fixed this now. You can go ahead and do the pull.
> 
> Thanks,
> Sekhar
> 

I was wondering is this has been / will be queued or if there were issues holding 
it off?  If it has, what version?

I have some patches that are dependent on this series that I have some time coming
up to work on submission.  Apologies for the nag, Grant, if it's in process.  
Thanks.

-Mike

Re: [PATCH 00/49] spi: davinci: re-write existing driver

[Grant Likely]

On Sat, Dec 11, 2010 at 8:34 AM, Michael Williamson
<michael.williamson-wZX4cNJlHJ2sVWG7oymsAA@public.gmane.org> wrote:
> On 11/18/2010 08:14 AM, Nori, Sekhar wrote:
>> Hi Grant,
>>
>> On Thu, Nov 18, 2010 at 17:01:24, Nori, Sekhar wrote:
>>> On Thu, Nov 18, 2010 at 12:23:24, Nori, Sekhar wrote:
>>>>
>>>> Here is the pull request:
>>>>
>>>> The following changes since commit 0a5b871ea4c6bfb2723ac2ffc7ef5c32452abb89:
>>>>   Linus Torvalds (1):
>>>>         hardirq.h: remove now-empty #ifdef/#endif pair
>>>>
>>>> are available in the git repository at:
>>>>
>>>>   git://arago-project.org/git/projects/linux-davinci.git for-grant
>>>>
>>>> <short log and diffstat deleted>
>>>
>>> Oops, I just realized that because my sign-off is added when
>>> git-format-patch -s is run, the patches in the pull request
>>> do not have my sign-off. I will recreate the branch with my
>>> sign-off added to these patches.
>>
>> I fixed this now. You can go ahead and do the pull.
>>
>> Thanks,
>> Sekhar
>>
>
> I was wondering is this has been / will be queued or if there were issues holding
> it off?  If it has, what version?
>
> I have some patches that are dependent on this series that I have some time coming
> up to work on submission.  Apologies for the nag, Grant, if it's in process.

Yes, stuff is in progress.  I hit a personal scalability issue which
has delayed getting a lot of my maintainership backlog sorted out.
Mostly due to the fact that it takes a lot of work to test my tree
before pushing it out.  I'm in the process of bringing up autotest so
that I have to manually test every platform before pushing my tree
into linux-next.

Patches should be sorted out next week since I've dedicated the week
to doing maintainership tasks.

g.