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* [PATCH] spi/sun6i: Add Master Sample Data Mode for SPI
@ 2017-02-13 12:05 Vinicius Maciel
       [not found] ` <20170213120553.6479-1-viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Vinicius Maciel @ 2017-02-13 12:05 UTC (permalink / raw)
  To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
  Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
	linux-spi-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	Vinicius Maciel

In order to work appropriately, some SPI chips, such as
max11043, require SPI master samples the data at the
correct edge.

This patch add Master Sample Data Mode bit in normal sample mode.

Signed-off-by: Vinicius Maciel <viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 drivers/spi/spi-sun6i.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index e3114832c485..170f4ad407dd 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -43,6 +43,7 @@
 #define SUN6I_TFR_CTL_CS_LEVEL			BIT(7)
 #define SUN6I_TFR_CTL_DHB			BIT(8)
 #define SUN6I_TFR_CTL_FBS			BIT(12)
+#define SUN6I_TFR_CTL_SDM			BIT(13)
 #define SUN6I_TFR_CTL_XCH			BIT(31)
 
 #define SUN6I_INT_CTL_REG		0x10
@@ -342,6 +343,8 @@ static int sun6i_spi_runtime_resume(struct device *dev)
 
 	sun6i_spi_write(sspi, SUN6I_GBL_CTL_REG,
 			SUN6I_GBL_CTL_BUS_ENABLE | SUN6I_GBL_CTL_MASTER | SUN6I_GBL_CTL_TP);
+        sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG,
+			SUN6I_TFR_CTL_SDM);
 
 	return 0;
 
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] spi/sun6i: Add Master Sample Data Mode for SPI
       [not found] ` <20170213120553.6479-1-viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2017-02-13 18:34   ` Mark Brown
       [not found]     ` <20170213183430.65vbm3cubid2ljkv-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Mark Brown @ 2017-02-13 18:34 UTC (permalink / raw)
  To: Vinicius Maciel
  Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
	linux-spi-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r

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On Mon, Feb 13, 2017 at 09:05:53AM -0300, Vinicius Maciel wrote:
> In order to work appropriately, some SPI chips, such as
> max11043, require SPI master samples the data at the
> correct edge.

As I said on another version of this patch this should really be done by
implementing the SPI modes - there isn't one universal configuration for
SPI devices unfortunately.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] spi/sun6i: Add Master Sample Data Mode for SPI
       [not found]     ` <20170213183430.65vbm3cubid2ljkv-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
@ 2017-02-13 19:00       ` Vinicius Maciel
       [not found]         ` <CAEz5UgEAYB94mC-6Oste4-tRRq16iXqBnJmjjhQFkqDmVO-nog-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Vinicius Maciel @ 2017-02-13 19:00 UTC (permalink / raw)
  To: Mark Brown
  Cc: linux-sunxi, maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
	Chen-Yu Tsai, linux-spi-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r

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Hi Mark,

Sorry for the mess up. sun6i is a reference to the Allwinner A31 processor
and sun7i is a reference to the Allwinner A20 processor. A31 uses
spi-sun6i.c code, while A20 uses spi-sun4i.c code. Therefore, this is a
different patch.
About your recommedantion, I have to check with Maxine what can be done.

Thanks.

2017-02-13 15:34 GMT-03:00 Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:

> On Mon, Feb 13, 2017 at 09:05:53AM -0300, Vinicius Maciel wrote:
> > In order to work appropriately, some SPI chips, such as
> > max11043, require SPI master samples the data at the
> > correct edge.
>
> As I said on another version of this patch this should really be done by
> implementing the SPI modes - there isn't one universal configuration for
> SPI devices unfortunately.
>

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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] spi/sun6i: Add Master Sample Data Mode for SPI
       [not found]         ` <CAEz5UgEAYB94mC-6Oste4-tRRq16iXqBnJmjjhQFkqDmVO-nog-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-02-13 19:06           ` Mark Brown
  0 siblings, 0 replies; 4+ messages in thread
From: Mark Brown @ 2017-02-13 19:06 UTC (permalink / raw)
  To: Vinicius Maciel
  Cc: linux-sunxi, maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
	Chen-Yu Tsai, linux-spi-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r

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On Mon, Feb 13, 2017 at 04:00:09PM -0300, Vinicius Maciel wrote:
> Hi Mark,

Please don't top post, reply in line with needed context.  This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.

> Sorry for the mess up. sun6i is a reference to the Allwinner A31 processor
> and sun7i is a reference to the Allwinner A20 processor. A31 uses
> spi-sun6i.c code, while A20 uses spi-sun4i.c code. Therefore, this is a
> different patch.
> About your recommedantion, I have to check with Maxine what can be done.

Usually duplicate patches to the two drivers are sent as a series to
make sure it's the same thing being done twice.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-02-13 19:06 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-02-13 12:05 [PATCH] spi/sun6i: Add Master Sample Data Mode for SPI Vinicius Maciel
     [not found] ` <20170213120553.6479-1-viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-02-13 18:34   ` Mark Brown
     [not found]     ` <20170213183430.65vbm3cubid2ljkv-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2017-02-13 19:00       ` Vinicius Maciel
     [not found]         ` <CAEz5UgEAYB94mC-6Oste4-tRRq16iXqBnJmjjhQFkqDmVO-nog-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-13 19:06           ` Mark Brown

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