From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@xilinx.com>,
Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-spi@vger.kernel.org
Subject: [PATCH 1/7] spi: zynq-qspi: Anything else than CS0 is not supported yet
Date: Fri, 8 Nov 2019 11:59:14 +0100 [thread overview]
Message-ID: <20191108105920.19014-2-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20191108105920.19014-1-miquel.raynal@bootlin.com>
Unlike what the driver is currently advertizing, CS0 only can be used,
CS1 is not supported at all. Prevent people to use CS1.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/spi/spi-zynq-qspi.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 87c9ec21f093..8098b5087708 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -704,10 +704,15 @@ static int zynq_qspi_probe(struct platform_device *pdev)
ret = of_property_read_u32(pdev->dev.of_node, "num-cs",
&num_cs);
- if (ret < 0)
+ if (ret < 0) {
ctlr->num_chipselect = ZYNQ_QSPI_DEFAULT_NUM_CS;
- else
+ } else if (num_cs > ZYNQ_QSPI_DEFAULT_NUM_CS) {
+ dev_err(&pdev->dev, "anything but CS0 is not yet supported\n");
+ goto remove_master;
+ } else {
ctlr->num_chipselect = num_cs;
+ }
+
ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD |
SPI_TX_DUAL | SPI_TX_QUAD;
ctlr->mem_ops = &zynq_qspi_mem_ops;
--
2.20.1
next prev parent reply other threads:[~2019-11-08 10:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-08 10:59 [PATCH 0/7] spi: zynq-qspi: Clarify and fix the chip selection Miquel Raynal
2019-11-08 10:59 ` Miquel Raynal [this message]
2019-11-08 12:07 ` [PATCH 1/7] spi: zynq-qspi: Anything else than CS0 is not supported yet Mark Brown
2019-11-08 13:31 ` Miquel Raynal
2019-11-08 10:59 ` [PATCH 2/7] spi: zynq-qspi: Keep the naming consistent across the driver Miquel Raynal
2019-11-08 12:08 ` Applied "spi: zynq-qspi: Keep the naming consistent across the driver" to the spi tree Mark Brown
2019-11-08 10:59 ` [PATCH 3/7] spi: zynq-qspi: Keep the bitfields naming consistent Miquel Raynal
2019-11-08 10:59 ` [PATCH 4/7] spi: zynq-qspi: Enhance the Linear CFG bit definitions Miquel Raynal
2019-11-08 10:59 ` [PATCH 5/7] spi: zynq-qspi: Clarify the select chip function Miquel Raynal
2019-11-08 10:59 ` [PATCH 6/7] spi: zynq-qspi: Do the actual hardware initialization later in the probe Miquel Raynal
2019-11-08 10:59 ` [PATCH 7/7] spi: zynq-qspi: Support two chip selects Miquel Raynal
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