* [PATCH 0/9] spi/sunxi patches @ 2015-08-20 14:15 Michal Suchanek [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 0 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:15 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA Hello, Since the sun4i dmaengine and DT label conversion patches are in this should be now workable. - fix some minor issues with the spi driver - add spi dt nodes on some boards - include the DMA patch which depends on the dmaengine Thanks Michal Emilio López (1): spi: sun4i: add DMA support Michal Suchanek (8): spi: sunxi: fix transfer timeout spi: sun4i: fix FIFO limit spi: sunxi: check that transfer speed is non-zero ARM: dts: sun7i: cubieboard2: Enable SPI0 ARM: dts: sunxi: add spi aliases on cubieboards ARM: dts: sun5i: add SPI pins on A13 and A10s ARM: dts: sunxi: A10s Olinuxino Micro: add spi2. ARM: dts: sunxi: Add SPI aliases on A10s Olinuxino. arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 1 + arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 10 ++ arch/arm/boot/dts/sun5i-a10s.dtsi | 21 +++ arch/arm/boot/dts/sun5i.dtsi | 49 +++++++ arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 8 ++ drivers/spi/spi-sun4i.c | 166 ++++++++++++++++++++--- drivers/spi/spi-sun6i.c | 25 +++- 7 files changed, 257 insertions(+), 23 deletions(-) -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* [PATCH 1/9] spi: sunxi: fix transfer timeout [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 14:19 ` Michal Suchanek [not found] ` <0e0b52774a48ddb71dc8095b66942451cd31ff7d.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 4/9] spi: sun4i: add DMA support Emilio López ` (7 subsequent siblings) 8 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-sun4i.c | 10 +++++++++- drivers/spi/spi-sun6i.c | 10 +++++++++- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index fbb0a4d..48532ec 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -170,6 +170,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master, { struct sun4i_spi *sspi = spi_master_get_devdata(master); unsigned int mclk_rate, div, timeout; + unsigned int start, end, tx_time; unsigned int tx_len = 0; int ret = 0; u32 reg; @@ -279,9 +280,16 @@ static int sun4i_spi_transfer_one(struct spi_master *master, reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH); + tx_time = max_t(int, tfr->len * 8 * 2 / (speed / 1000), 100); + start = jiffies; timeout = wait_for_completion_timeout(&sspi->done, - msecs_to_jiffies(1000)); + msecs_to_jiffies(tx_time)); + end = jiffies; if (!timeout) { + dev_warn(&master->dev, + "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", + dev_name(&spi->dev), tfr->len, speed, + jiffies_to_msecs(end - start), tx_time); ret = -ETIMEDOUT; goto out; } diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index ac48f59..3d0f66c 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -162,6 +162,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master, unsigned int mclk_rate, div, timeout; unsigned int tx_len = 0; int ret = 0; + unsigned int start, end, tx_time; u32 reg; /* We don't support transfer larger than the FIFO */ @@ -269,9 +270,16 @@ static int sun6i_spi_transfer_one(struct spi_master *master, reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH); + tx_time = max_t(int, tfr->len * 8 * 2 / (speed / 1000), 100); + start = jiffies; timeout = wait_for_completion_timeout(&sspi->done, - msecs_to_jiffies(1000)); + msecs_to_jiffies(tx_time)); + end = jiffies; if (!timeout) { + dev_warn(&master->dev, + "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", + dev_name(&spi->dev), tfr->len, speed, + jiffies_to_msecs(end - start), tx_time); ret = -ETIMEDOUT; goto out; } -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
[parent not found: <0e0b52774a48ddb71dc8095b66942451cd31ff7d.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 1/9] spi: sunxi: fix transfer timeout [not found] ` <0e0b52774a48ddb71dc8095b66942451cd31ff7d.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 14:43 ` Maxime Ripard 2015-08-20 18:41 ` Mark Brown 1 sibling, 0 replies; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 14:43 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 1904 bytes --] On Thu, Aug 20, 2015 at 02:19:45PM -0000, Michal Suchanek wrote: > The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over > 1MHz SPI bus takes way longer than that. Calculate the timeout from the > actual time the transfer is supposed to take and multiply by 2 for good > measure. > > Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- > drivers/spi/spi-sun4i.c | 10 +++++++++- > drivers/spi/spi-sun6i.c | 10 +++++++++- > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c > index fbb0a4d..48532ec 100644 > --- a/drivers/spi/spi-sun4i.c > +++ b/drivers/spi/spi-sun4i.c > @@ -170,6 +170,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > { > struct sun4i_spi *sspi = spi_master_get_devdata(master); > unsigned int mclk_rate, div, timeout; > + unsigned int start, end, tx_time; > unsigned int tx_len = 0; > int ret = 0; > u32 reg; > @@ -279,9 +280,16 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); > sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH); > > + tx_time = max_t(int, tfr->len * 8 * 2 / (speed / 1000), 100); > + start = jiffies; > timeout = wait_for_completion_timeout(&sspi->done, > - msecs_to_jiffies(1000)); > + msecs_to_jiffies(tx_time)); > + end = jiffies; > if (!timeout) { > + dev_warn(&master->dev, > + "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", > + dev_name(&spi->dev), tfr->len, speed, > + jiffies_to_msecs(end - start), tx_time); Timeout already contains the number of jiffies elapsed (and I'm not sure anyone reading that message would get that the last number is actually the maximum timeout). Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 1/9] spi: sunxi: fix transfer timeout [not found] ` <0e0b52774a48ddb71dc8095b66942451cd31ff7d.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:43 ` Maxime Ripard @ 2015-08-20 18:41 ` Mark Brown [not found] ` <20150820184132.GO12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 1 sibling, 1 reply; 28+ messages in thread From: Mark Brown @ 2015-08-20 18:41 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 208 bytes --] On Thu, Aug 20, 2015 at 02:19:45PM -0000, Michal Suchanek wrote: > drivers/spi/spi-sun4i.c | 10 +++++++++- > drivers/spi/spi-sun6i.c | 10 +++++++++- Are we *sure* we can't work on merging these drivers :( ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20150820184132.GO12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>]
* Re: [PATCH 1/9] spi: sunxi: fix transfer timeout [not found] ` <20150820184132.GO12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> @ 2015-08-20 19:34 ` Maxime Ripard 2015-08-20 21:08 ` Mark Brown 0 siblings, 1 reply; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 19:34 UTC (permalink / raw) To: Mark Brown Cc: Michal Suchanek, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 479 bytes --] On Thu, Aug 20, 2015 at 11:41:32AM -0700, Mark Brown wrote: > On Thu, Aug 20, 2015 at 02:19:45PM -0000, Michal Suchanek wrote: > > > drivers/spi/spi-sun4i.c | 10 +++++++++- > > drivers/spi/spi-sun6i.c | 10 +++++++++- > > Are we *sure* we can't work on merging these drivers :( Those are two different IPs, that don't really share anything but their author... Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 1/9] spi: sunxi: fix transfer timeout 2015-08-20 19:34 ` Maxime Ripard @ 2015-08-20 21:08 ` Mark Brown [not found] ` <20150820210830.GS12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 0 siblings, 1 reply; 28+ messages in thread From: Mark Brown @ 2015-08-20 21:08 UTC (permalink / raw) To: Maxime Ripard Cc: Michal Suchanek, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 617 bytes --] On Thu, Aug 20, 2015 at 09:34:33PM +0200, Maxime Ripard wrote: > On Thu, Aug 20, 2015 at 11:41:32AM -0700, Mark Brown wrote: > > On Thu, Aug 20, 2015 at 02:19:45PM -0000, Michal Suchanek wrote: > > > drivers/spi/spi-sun4i.c | 10 +++++++++- > > > drivers/spi/spi-sun6i.c | 10 +++++++++- > > Are we *sure* we can't work on merging these drivers :( > Those are two different IPs, that don't really share anything but > their author... I seem to be seeing a number of changes like this one which make apparently very similar modifications to both. Perhaps there is more core usage that should be happening instead? ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20150820210830.GS12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>]
* Re: [PATCH 1/9] spi: sunxi: fix transfer timeout [not found] ` <20150820210830.GS12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> @ 2015-08-20 21:18 ` Maxime Ripard 2015-08-20 21:29 ` Mark Brown 0 siblings, 1 reply; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 21:18 UTC (permalink / raw) To: Mark Brown Cc: Michal Suchanek, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 1184 bytes --] On Thu, Aug 20, 2015 at 02:08:30PM -0700, Mark Brown wrote: > On Thu, Aug 20, 2015 at 09:34:33PM +0200, Maxime Ripard wrote: > > On Thu, Aug 20, 2015 at 11:41:32AM -0700, Mark Brown wrote: > > > On Thu, Aug 20, 2015 at 02:19:45PM -0000, Michal Suchanek wrote: > > > > > drivers/spi/spi-sun4i.c | 10 +++++++++- > > > > drivers/spi/spi-sun6i.c | 10 +++++++++- > > > > Are we *sure* we can't work on merging these drivers :( > > > Those are two different IPs, that don't really share anything but > > their author... > > I seem to be seeing a number of changes like this one which make > apparently very similar modifications to both. Perhaps there is more > core usage that should be happening instead? Yeah, because I wrote the two at the same time, and they share the same flaws. But that doesn't really mean that you can share anything at the driver level. And I'm not really sure that we can do much more at the framework level either, except maybe handling the timeout directly (but then the drivers would have to handle the recovering after a timeout too). Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 1/9] spi: sunxi: fix transfer timeout 2015-08-20 21:18 ` Maxime Ripard @ 2015-08-20 21:29 ` Mark Brown 0 siblings, 0 replies; 28+ messages in thread From: Mark Brown @ 2015-08-20 21:29 UTC (permalink / raw) To: Maxime Ripard Cc: Michal Suchanek, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 343 bytes --] On Thu, Aug 20, 2015 at 11:18:50PM +0200, Maxime Ripard wrote: > at the driver level. And I'm not really sure that we can do much more > at the framework level either, except maybe handling the timeout > directly (but then the drivers would have to handle the recovering > after a timeout too). We have handle_err() for that sort of cleanup. ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 4/9] spi: sun4i: add DMA support [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 1/9] spi: sunxi: fix transfer timeout Michal Suchanek @ 2015-08-20 14:19 ` Emilio López [not found] ` <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 2/9] spi: sun4i: fix FIFO limit Michal Suchanek ` (6 subsequent siblings) 8 siblings, 1 reply; 28+ messages in thread From: Emilio López @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA From: Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> This patch adds support for 64 byte or bigger transfers on the sun4i SPI controller. Said transfers will be performed via DMA. Signed-off-by: Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> Tested-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-sun4i.c | 145 +++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 130 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 4dda366..63242a7 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -14,6 +14,8 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> @@ -34,6 +36,7 @@ #define SUN4I_CTL_CPHA BIT(2) #define SUN4I_CTL_CPOL BIT(3) #define SUN4I_CTL_CS_ACTIVE_LOW BIT(4) +#define SUN4I_CTL_DMAMC_DEDICATED BIT(5) #define SUN4I_CTL_LMTF BIT(6) #define SUN4I_CTL_TF_RST BIT(8) #define SUN4I_CTL_RF_RST BIT(9) @@ -51,6 +54,8 @@ #define SUN4I_INT_STA_REG 0x10 #define SUN4I_DMA_CTL_REG 0x14 +#define SUN4I_DMA_CTL_RF_READY BIT(0) +#define SUN4I_DMA_CTL_TF_NOT_FULL BIT(10) #define SUN4I_WAIT_REG 0x18 @@ -130,6 +135,13 @@ static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len) } } +static bool sun4i_spi_can_dma(struct spi_master *master, + struct spi_device *spi, + struct spi_transfer *tfr) +{ + return tfr->len >= SUN4I_FIFO_DEPTH; +} + static void sun4i_spi_set_cs(struct spi_device *spi, bool enable) { struct sun4i_spi *sspi = spi_master_get_devdata(spi->master); @@ -169,17 +181,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, struct spi_transfer *tfr) { struct sun4i_spi *sspi = spi_master_get_devdata(master); + struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL; unsigned int speed, mclk_rate, div, timeout; unsigned int start, end, tx_time; unsigned int tx_len = 0; + u32 reg, trigger = 0; int ret = 0; - u32 reg; - - /* We don't support transfer larger than the FIFO */ - if (tfr->len > SUN4I_FIFO_DEPTH) - return -EINVAL; - if (tfr->tx_buf && tfr->len => SUN4I_FIFO_DEPTH) - return -EINVAL; reinit_completion(&sspi->done); sspi->tx_buf = tfr->tx_buf; @@ -277,14 +284,67 @@ static int sun4i_spi_transfer_one(struct spi_master *master, sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); - /* Fill the TX FIFO */ - /* Filling the fifo fully causes timeout for some reason - * at least on spi2 on a10s */ - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); - /* Enable the interrupts */ sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC); + if (sun4i_spi_can_dma(master, spi, tfr)) { + dev_dbg(&sspi->master->dev, "Using DMA mode for transfer\n"); + + if (sspi->tx_buf) { + desc_tx = dmaengine_prep_slave_sg(master->dma_tx, + tfr->tx_sg.sgl, tfr->tx_sg.nents, + DMA_TO_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc_tx) { + dev_err(&sspi->master->dev, + "Couldn't prepare dma slave\n"); + return -EIO; + } + + trigger |= SUN4I_DMA_CTL_TF_NOT_FULL; + + dmaengine_submit(desc_tx); + dma_async_issue_pending(master->dma_tx); + + } + + if (sspi->rx_buf) { + desc_rx = dmaengine_prep_slave_sg(master->dma_rx, + tfr->rx_sg.sgl, tfr->rx_sg.nents, + DMA_FROM_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc_rx) { + dev_err(&sspi->master->dev, + "Couldn't prepare dma slave\n"); + return -EIO; + } + + trigger |= SUN4I_DMA_CTL_RF_READY; + + dmaengine_submit(desc_rx); + dma_async_issue_pending(master->dma_rx); + } + + /* Enable Dedicated DMA requests */ + reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); + reg |= SUN4I_CTL_DMAMC_DEDICATED; + sun4i_spi_write(sspi, SUN4I_CTL_REG, reg); + sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, trigger); + } else { + dev_dbg(&sspi->master->dev, "Using PIO mode for transfer\n"); + + /* Disable DMA requests */ + reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); + sun4i_spi_write(sspi, SUN4I_CTL_REG, + reg & ~SUN4I_CTL_DMAMC_DEDICATED); + sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, 0); + + /* Fill the TX FIFO */ + /* Filling the fifo fully causes timeout for some reason + * at least on spi2 on a10s */ + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); + } + /* Start the transfer */ reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH); @@ -303,7 +363,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, goto out; } - sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); + if (sun4i_spi_can_dma(master, spi, tfr) && desc_rx) { + /* The receive transfer should be the last one to finish */ + dma_wait_for_async_tx(desc_rx); + } else { + sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); + } out: sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0); @@ -368,6 +433,7 @@ static int sun4i_spi_runtime_suspend(struct device *dev) static int sun4i_spi_probe(struct platform_device *pdev) { + struct dma_slave_config dma_sconfig; struct spi_master *master; struct sun4i_spi *sspi; struct resource *res; @@ -403,7 +469,9 @@ static int sun4i_spi_probe(struct platform_device *pdev) goto err_free_master; } + init_completion(&sspi->done); sspi->master = master; + master->can_dma = sun4i_spi_can_dma; master->set_cs = sun4i_spi_set_cs; master->transfer_one = sun4i_spi_transfer_one; master->num_chipselect = 4; @@ -426,7 +494,45 @@ static int sun4i_spi_probe(struct platform_device *pdev) goto err_free_master; } - init_completion(&sspi->done); + master->dma_tx = dma_request_slave_channel_reason(&pdev->dev, "tx"); + if (IS_ERR(master->dma_tx)) { + dev_err(&pdev->dev, "Unable to acquire DMA channel TX\n"); + ret = PTR_ERR(master->dma_tx); + goto err_free_master; + } + + dma_sconfig.direction = DMA_MEM_TO_DEV; + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + dma_sconfig.dst_addr = res->start + SUN4I_TXDATA_REG; + dma_sconfig.src_maxburst = 1; + dma_sconfig.dst_maxburst = 1; + + ret = dmaengine_slave_config(master->dma_tx, &dma_sconfig); + if (ret) { + dev_err(&pdev->dev, "Unable to configure TX DMA slave\n"); + goto err_tx_dma_release; + } + + master->dma_rx = dma_request_slave_channel_reason(&pdev->dev, "rx"); + if (IS_ERR(master->dma_rx)) { + dev_err(&pdev->dev, "Unable to acquire DMA channel RX\n"); + ret = PTR_ERR(master->dma_rx); + goto err_tx_dma_release; + } + + dma_sconfig.direction = DMA_DEV_TO_MEM; + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + dma_sconfig.src_addr = res->start + SUN4I_RXDATA_REG; + dma_sconfig.src_maxburst = 1; + dma_sconfig.dst_maxburst = 1; + + ret = dmaengine_slave_config(master->dma_rx, &dma_sconfig); + if (ret) { + dev_err(&pdev->dev, "Unable to configure RX DMA slave\n"); + goto err_rx_dma_release; + } /* * This wake-up/shutdown pattern is to be able to have the @@ -435,7 +541,7 @@ static int sun4i_spi_probe(struct platform_device *pdev) ret = sun4i_spi_runtime_resume(&pdev->dev); if (ret) { dev_err(&pdev->dev, "Couldn't resume the device\n"); - goto err_free_master; + goto err_rx_dma_release; } pm_runtime_set_active(&pdev->dev); @@ -453,6 +559,10 @@ static int sun4i_spi_probe(struct platform_device *pdev) err_pm_disable: pm_runtime_disable(&pdev->dev); sun4i_spi_runtime_suspend(&pdev->dev); +err_rx_dma_release: + dma_release_channel(master->dma_rx); +err_tx_dma_release: + dma_release_channel(master->dma_tx); err_free_master: spi_master_put(master); return ret; @@ -460,8 +570,13 @@ err_free_master: static int sun4i_spi_remove(struct platform_device *pdev) { + struct spi_master *master = platform_get_drvdata(pdev); + pm_runtime_disable(&pdev->dev); + dma_release_channel(master->dma_rx); + dma_release_channel(master->dma_tx); + return 0; } -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. ^ permalink raw reply related [flat|nested] 28+ messages in thread
[parent not found: <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [linux-sunxi] [PATCH 4/9] spi: sun4i: add DMA support [not found] ` <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 14:24 ` Michal Suchanek 2015-08-20 14:56 ` Maxime Ripard ` (2 subsequent siblings) 3 siblings, 0 replies; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:24 UTC (permalink / raw) To: Emilio López Cc: linux-sunxi, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Linux Kernel Mailing List, linux-spi On 20 August 2015 at 16:19, Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> wrote: > From: Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> Something went wrong with overriding the headers Sorry Michal -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 4/9] spi: sun4i: add DMA support [not found] ` <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:24 ` [linux-sunxi] " Michal Suchanek @ 2015-08-20 14:56 ` Maxime Ripard 2015-08-20 18:58 ` Mark Brown 2015-08-20 19:00 ` Mark Brown 3 siblings, 0 replies; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 14:56 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA, Emilio López [-- Attachment #1: Type: text/plain, Size: 8584 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Emilio López wrote: > From: Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> > > This patch adds support for 64 byte or bigger transfers on the > sun4i SPI controller. Said transfers will be performed via DMA. > > Signed-off-by: Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> > Tested-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> This should have your SoB. > --- > drivers/spi/spi-sun4i.c | 145 +++++++++++++++++++++++++++++++++++++++++++----- > 1 file changed, 130 insertions(+), 15 deletions(-) > > diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c > index 4dda366..63242a7 100644 > --- a/drivers/spi/spi-sun4i.c > +++ b/drivers/spi/spi-sun4i.c > @@ -14,6 +14,8 @@ > #include <linux/clk.h> > #include <linux/delay.h> > #include <linux/device.h> > +#include <linux/dmaengine.h> > +#include <linux/dma-mapping.h> > #include <linux/interrupt.h> > #include <linux/io.h> > #include <linux/module.h> > @@ -34,6 +36,7 @@ > #define SUN4I_CTL_CPHA BIT(2) > #define SUN4I_CTL_CPOL BIT(3) > #define SUN4I_CTL_CS_ACTIVE_LOW BIT(4) > +#define SUN4I_CTL_DMAMC_DEDICATED BIT(5) > #define SUN4I_CTL_LMTF BIT(6) > #define SUN4I_CTL_TF_RST BIT(8) > #define SUN4I_CTL_RF_RST BIT(9) > @@ -51,6 +54,8 @@ > #define SUN4I_INT_STA_REG 0x10 > > #define SUN4I_DMA_CTL_REG 0x14 > +#define SUN4I_DMA_CTL_RF_READY BIT(0) > +#define SUN4I_DMA_CTL_TF_NOT_FULL BIT(10) > > #define SUN4I_WAIT_REG 0x18 > > @@ -130,6 +135,13 @@ static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len) > } > } > > +static bool sun4i_spi_can_dma(struct spi_master *master, > + struct spi_device *spi, > + struct spi_transfer *tfr) > +{ > + return tfr->len >= SUN4I_FIFO_DEPTH; > +} > + > static void sun4i_spi_set_cs(struct spi_device *spi, bool enable) > { > struct sun4i_spi *sspi = spi_master_get_devdata(spi->master); > @@ -169,17 +181,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > struct spi_transfer *tfr) > { > struct sun4i_spi *sspi = spi_master_get_devdata(master); > + struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL; > unsigned int speed, mclk_rate, div, timeout; > unsigned int start, end, tx_time; > unsigned int tx_len = 0; > + u32 reg, trigger = 0; > int ret = 0; > - u32 reg; > - > - /* We don't support transfer larger than the FIFO */ > - if (tfr->len > SUN4I_FIFO_DEPTH) > - return -EINVAL; > - if (tfr->tx_buf && tfr->len => SUN4I_FIFO_DEPTH) > - return -EINVAL; > > reinit_completion(&sspi->done); > sspi->tx_buf = tfr->tx_buf; > @@ -277,14 +284,67 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); > sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); > > - /* Fill the TX FIFO */ > - /* Filling the fifo fully causes timeout for some reason > - * at least on spi2 on a10s */ > - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); > - > /* Enable the interrupts */ > sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC); > > + if (sun4i_spi_can_dma(master, spi, tfr)) { > + dev_dbg(&sspi->master->dev, "Using DMA mode for transfer\n"); > + > + if (sspi->tx_buf) { > + desc_tx = dmaengine_prep_slave_sg(master->dma_tx, > + tfr->tx_sg.sgl, tfr->tx_sg.nents, > + DMA_TO_DEVICE, > + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); > + if (!desc_tx) { > + dev_err(&sspi->master->dev, > + "Couldn't prepare dma slave\n"); > + return -EIO; > + } > + > + trigger |= SUN4I_DMA_CTL_TF_NOT_FULL; > + > + dmaengine_submit(desc_tx); > + dma_async_issue_pending(master->dma_tx); > + > + } > + > + if (sspi->rx_buf) { > + desc_rx = dmaengine_prep_slave_sg(master->dma_rx, > + tfr->rx_sg.sgl, tfr->rx_sg.nents, > + DMA_FROM_DEVICE, > + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); > + if (!desc_rx) { > + dev_err(&sspi->master->dev, > + "Couldn't prepare dma slave\n"); > + return -EIO; > + } > + > + trigger |= SUN4I_DMA_CTL_RF_READY; > + > + dmaengine_submit(desc_rx); > + dma_async_issue_pending(master->dma_rx); > + } What happens if the dma driver controller isn't present in your system? Or that it doesn't have any channels available anymore? > + /* Enable Dedicated DMA requests */ > + reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); > + reg |= SUN4I_CTL_DMAMC_DEDICATED; > + sun4i_spi_write(sspi, SUN4I_CTL_REG, reg); > + sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, trigger); > + } else { > + dev_dbg(&sspi->master->dev, "Using PIO mode for transfer\n"); > + > + /* Disable DMA requests */ > + reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); > + sun4i_spi_write(sspi, SUN4I_CTL_REG, > + reg & ~SUN4I_CTL_DMAMC_DEDICATED); > + sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, 0); > + > + /* Fill the TX FIFO */ > + /* Filling the fifo fully causes timeout for some reason > + * at least on spi2 on a10s */ > + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); > + } > + > /* Start the transfer */ > reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); > sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH); > @@ -303,7 +363,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > goto out; > } > > - sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); > + if (sun4i_spi_can_dma(master, spi, tfr) && desc_rx) { > + /* The receive transfer should be the last one to finish */ > + dma_wait_for_async_tx(desc_rx); Nope, this is only meant for async_tx. You should register a callback in your transfer that will mark the completion structure as completed, and then drain the FIFO only if not using DMA. > + } else { > + sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); > + } > > out: > sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0); > @@ -368,6 +433,7 @@ static int sun4i_spi_runtime_suspend(struct device *dev) > > static int sun4i_spi_probe(struct platform_device *pdev) > { > + struct dma_slave_config dma_sconfig; > struct spi_master *master; > struct sun4i_spi *sspi; > struct resource *res; > @@ -403,7 +469,9 @@ static int sun4i_spi_probe(struct platform_device *pdev) > goto err_free_master; > } > > + init_completion(&sspi->done); > sspi->master = master; > + master->can_dma = sun4i_spi_can_dma; > master->set_cs = sun4i_spi_set_cs; > master->transfer_one = sun4i_spi_transfer_one; > master->num_chipselect = 4; > @@ -426,7 +494,45 @@ static int sun4i_spi_probe(struct platform_device *pdev) > goto err_free_master; > } > > - init_completion(&sspi->done); > + master->dma_tx = dma_request_slave_channel_reason(&pdev->dev, "tx"); > + if (IS_ERR(master->dma_tx)) { > + dev_err(&pdev->dev, "Unable to acquire DMA channel TX\n"); > + ret = PTR_ERR(master->dma_tx); > + goto err_free_master; > + } > + > + dma_sconfig.direction = DMA_MEM_TO_DEV; > + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; > + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; > + dma_sconfig.dst_addr = res->start + SUN4I_TXDATA_REG; > + dma_sconfig.src_maxburst = 1; > + dma_sconfig.dst_maxburst = 1; > + > + ret = dmaengine_slave_config(master->dma_tx, &dma_sconfig); > + if (ret) { > + dev_err(&pdev->dev, "Unable to configure TX DMA slave\n"); > + goto err_tx_dma_release; > + } > + > + master->dma_rx = dma_request_slave_channel_reason(&pdev->dev, "rx"); > + if (IS_ERR(master->dma_rx)) { > + dev_err(&pdev->dev, "Unable to acquire DMA channel RX\n"); > + ret = PTR_ERR(master->dma_rx); > + goto err_tx_dma_release; > + } > + > + dma_sconfig.direction = DMA_DEV_TO_MEM; > + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; > + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; > + dma_sconfig.src_addr = res->start + SUN4I_RXDATA_REG; > + dma_sconfig.src_maxburst = 1; > + dma_sconfig.dst_maxburst = 1; We can't use a higher bust size? Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 4/9] spi: sun4i: add DMA support [not found] ` <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:24 ` [linux-sunxi] " Michal Suchanek 2015-08-20 14:56 ` Maxime Ripard @ 2015-08-20 18:58 ` Mark Brown [not found] ` <20150820185850.GQ12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2015-08-20 19:00 ` Mark Brown 3 siblings, 1 reply; 28+ messages in thread From: Mark Brown @ 2015-08-20 18:58 UTC (permalink / raw) To: Emilio López Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 864 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Emilio López wrote: > - sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); > + if (sun4i_spi_can_dma(master, spi, tfr) && desc_rx) { > + /* The receive transfer should be the last one to finish */ > + dma_wait_for_async_tx(desc_rx); What if it's a transmit only transfer? We'll fall over to this... > + } else { > + sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); > + } ...which manually reads data from the FIFO which doesn't seem like what we want, won't it conflict with the DMA? -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 473 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <20150820185850.GQ12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>]
* Re: Re: [PATCH 4/9] spi: sun4i: add DMA support [not found] ` <20150820185850.GQ12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> @ 2016-05-17 5:44 ` Michal Suchanek 0 siblings, 0 replies; 28+ messages in thread From: Michal Suchanek @ 2016-05-17 5:44 UTC (permalink / raw) To: Mark Brown Cc: Emilio López, linux-sunxi, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, devicetree, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Linux Kernel Mailing List, linux-spi, Priit Laes On 20 August 2015 at 16:56, Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote: >> + /* Enable Dedicated DMA requests */ >> + reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); >> + reg |= SUN4I_CTL_DMAMC_DEDICATED; >> + sun4i_spi_write(sspi, SUN4I_CTL_REG, reg); >> + sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, trigger); >> + } else { >> + dev_dbg(&sspi->master->dev, "Using PIO mode for transfer\n"); >> + >> + /* Disable DMA requests */ >> + reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); >> + sun4i_spi_write(sspi, SUN4I_CTL_REG, >> + reg & ~SUN4I_CTL_DMAMC_DEDICATED); >> + sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, 0); >> + >> + /* Fill the TX FIFO */ >> + /* Filling the fifo fully causes timeout for some reason >> + * at least on spi2 on a10s */ >> + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); >> + } >> + >> /* Start the transfer */ >> reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); >> sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH); >> @@ -303,7 +363,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, >> goto out; >> } >> >> - sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); >> + if (sun4i_spi_can_dma(master, spi, tfr) && desc_rx) { >> + /* The receive transfer should be the last one to finish */ >> + dma_wait_for_async_tx(desc_rx); > > Nope, this is only meant for async_tx. You should register a callback > in your transfer that will mark the completion structure as completed, > and then drain the FIFO only if not using DMA. What exactly is wrong with this? I did not observe data corruption. Passing desc_rx to dma_wait_for_async_tx looks odd on closer inspection, though. Will look through some other spi driver code. >> - init_completion(&sspi->done); >> + master->dma_tx = dma_request_slave_channel_reason(&pdev->dev, "tx"); >> + if (IS_ERR(master->dma_tx)) { >> + dev_err(&pdev->dev, "Unable to acquire DMA channel TX\n"); >> + ret = PTR_ERR(master->dma_tx); >> + goto err_free_master; >> + } >> + >> + dma_sconfig.direction = DMA_MEM_TO_DEV; >> + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; >> + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; >> + dma_sconfig.dst_addr = res->start + SUN4I_TXDATA_REG; >> + dma_sconfig.src_maxburst = 1; >> + dma_sconfig.dst_maxburst = 1; >> + >> + ret = dmaengine_slave_config(master->dma_tx, &dma_sconfig); >> + if (ret) { >> + dev_err(&pdev->dev, "Unable to configure TX DMA slave\n"); >> + goto err_tx_dma_release; >> + } >> + >> + master->dma_rx = dma_request_slave_channel_reason(&pdev->dev, "rx"); >> + if (IS_ERR(master->dma_rx)) { >> + dev_err(&pdev->dev, "Unable to acquire DMA channel RX\n"); >> + ret = PTR_ERR(master->dma_rx); >> + goto err_tx_dma_release; >> + } >> + >> + dma_sconfig.direction = DMA_DEV_TO_MEM; >> + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; >> + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; >> + dma_sconfig.src_addr = res->start + SUN4I_RXDATA_REG; >> + dma_sconfig.src_maxburst = 1; >> + dma_sconfig.dst_maxburst = 1; > > We can't use a higher bust size? Who actually does? It accomplishes the transfer with burst size of 1 so that's good enough. Researching alignment requirements and other oddities of Chinese controllers when larger burst size is used can be topic for another patch. On 20 August 2015 at 20:58, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote: > On Thu, Aug 20, 2015 at 02:19:46PM -0000, Emilio López wrote: > >> - sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); >> + if (sun4i_spi_can_dma(master, spi, tfr) && desc_rx) { >> + /* The receive transfer should be the last one to finish */ >> + dma_wait_for_async_tx(desc_rx); > > What if it's a transmit only transfer? We'll fall over to this... > >> + } else { >> + sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH); >> + } > > ...which manually reads data from the FIFO which doesn't seem like what ... which should be empty since RX is not enabled. > we want, won't it conflict with the DMA? It does not seem to conflict in practice. Thanks Michal -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 4/9] spi: sun4i: add DMA support [not found] ` <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (2 preceding siblings ...) 2015-08-20 18:58 ` Mark Brown @ 2015-08-20 19:00 ` Mark Brown 3 siblings, 0 replies; 28+ messages in thread From: Mark Brown @ 2015-08-20 19:00 UTC (permalink / raw) To: Emilio López Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 660 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Emilio López wrote: > Signed-off-by: Emilio López <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org> > Tested-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Also, if you're sending on a patch from someone else you must add a Signed-off-by, see SubmittingPatches. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 473 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 2/9] spi: sun4i: fix FIFO limit [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 1/9] spi: sunxi: fix transfer timeout Michal Suchanek 2015-08-20 14:19 ` [PATCH 4/9] spi: sun4i: add DMA support Emilio López @ 2015-08-20 14:19 ` Michal Suchanek [not found] ` <a40fbf7ca8bd36f08f5e9d3fb6f6de2454066af7.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 5/9] ARM: dts: sun7i: cubieboard2: Enable SPI0 Michal Suchanek ` (5 subsequent siblings) 8 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA When testing SPI without DMA I noticed that filling the FIFO on the spi controller causes timeout. Always leave room for one byte in the FIFO. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-sun4i.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 48532ec..707f61b 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -178,6 +178,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master, /* We don't support transfer larger than the FIFO */ if (tfr->len > SUN4I_FIFO_DEPTH) return -EINVAL; + if (tfr->tx_buf && tfr->len => SUN4I_FIFO_DEPTH) + return -EINVAL; reinit_completion(&sspi->done); sspi->tx_buf = tfr->tx_buf; @@ -271,7 +273,9 @@ static int sun4i_spi_transfer_one(struct spi_master *master, sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); /* Fill the TX FIFO */ - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH); + /* Filling the fifo fully causes timeout for some reason + * at least on spi2 on a10s */ + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); /* Enable the interrupts */ sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC); -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
[parent not found: <a40fbf7ca8bd36f08f5e9d3fb6f6de2454066af7.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 2/9] spi: sun4i: fix FIFO limit [not found] ` <a40fbf7ca8bd36f08f5e9d3fb6f6de2454066af7.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 14:45 ` Maxime Ripard 0 siblings, 0 replies; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 14:45 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 1681 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Michal Suchanek wrote: > When testing SPI without DMA I noticed that filling the FIFO on the > spi controller causes timeout. > > Always leave room for one byte in the FIFO. > > Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- > drivers/spi/spi-sun4i.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c > index 48532ec..707f61b 100644 > --- a/drivers/spi/spi-sun4i.c > +++ b/drivers/spi/spi-sun4i.c > @@ -178,6 +178,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > /* We don't support transfer larger than the FIFO */ > if (tfr->len > SUN4I_FIFO_DEPTH) > return -EINVAL; > + if (tfr->tx_buf && tfr->len => SUN4I_FIFO_DEPTH) > + return -EINVAL; Shouldn't you fix the condition just above instead? > > reinit_completion(&sspi->done); > sspi->tx_buf = tfr->tx_buf; > @@ -271,7 +273,9 @@ static int sun4i_spi_transfer_one(struct spi_master *master, > sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); > > /* Fill the TX FIFO */ > - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH); > + /* Filling the fifo fully causes timeout for some reason > + * at least on spi2 on a10s */ Please use the proper comment style. And it only happens on that particular SPI controller and SoC combination? > + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); > > /* Enable the interrupts */ > sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC); > -- > 2.1.4 > -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 5/9] ARM: dts: sun7i: cubieboard2: Enable SPI0 [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (2 preceding siblings ...) 2015-08-20 14:19 ` [PATCH 2/9] spi: sun4i: fix FIFO limit Michal Suchanek @ 2015-08-20 14:19 ` Michal Suchanek [not found] ` <a5a061d98b7ff851866cc668cd8bf8f6fc99d002.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero Michal Suchanek ` (4 subsequent siblings) 8 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA Only SPI0 is enabled. The schematic denotes it as the only SPI bus. Other SPI pins are reserved for different peripherals. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 39a51d5..9861304 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -198,6 +198,13 @@ status = "okay"; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_a>, + <&spi0_cs0_pins_a>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
[parent not found: <a5a061d98b7ff851866cc668cd8bf8f6fc99d002.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 5/9] ARM: dts: sun7i: cubieboard2: Enable SPI0 [not found] ` <a5a061d98b7ff851866cc668cd8bf8f6fc99d002.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 14:58 ` Maxime Ripard 0 siblings, 0 replies; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 14:58 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 1022 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Michal Suchanek wrote: > Only SPI0 is enabled. The schematic denotes it as the only SPI bus. > Other SPI pins are reserved for different peripherals. > > Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> What device is connected to the other end? > --- > arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts > index 39a51d5..9861304 100644 > --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts > +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts > @@ -198,6 +198,13 @@ > status = "okay"; > }; > > +&spi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_pins_a>, > + <&spi0_cs0_pins_a>; > + status = "okay"; > +}; > + You should probably add an alias to that bus too. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (3 preceding siblings ...) 2015-08-20 14:19 ` [PATCH 5/9] ARM: dts: sun7i: cubieboard2: Enable SPI0 Michal Suchanek @ 2015-08-20 14:19 ` Michal Suchanek [not found] ` <3688fab67e7cdc7bcbff73dfd6b0fcdcc4e79eb6.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s Michal Suchanek ` (3 subsequent siblings) 8 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA When the maximum transfer speed is not set for a SPI slave the value remains 0 and the code in sunxi SPI divides by it. Use an arbitrary speed instead in that case. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- drivers/spi/spi-sun4i.c | 15 ++++++++++----- drivers/spi/spi-sun6i.c | 15 ++++++++++----- 2 files changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 707f61b..4dda366 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -169,7 +169,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master, struct spi_transfer *tfr) { struct sun4i_spi *sspi = spi_master_get_devdata(master); - unsigned int mclk_rate, div, timeout; + unsigned int speed, mclk_rate, div, timeout; unsigned int start, end, tx_time; unsigned int tx_len = 0; int ret = 0; @@ -230,10 +230,15 @@ static int sun4i_spi_transfer_one(struct spi_master *master, sun4i_spi_write(sspi, SUN4I_CTL_REG, reg); + speed = spi->max_speed_hz; + if (!speed) { + speed = 100000; + dev_warn(&spi->dev, "SPI speed not set. Using %uHz.", speed); + } /* Ensure that we have a parent clock fast enough */ mclk_rate = clk_get_rate(sspi->mclk); - if (mclk_rate < (2 * spi->max_speed_hz)) { - clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz); + if (mclk_rate < (2 * speed)) { + clk_set_rate(sspi->mclk, 2 * speed); mclk_rate = clk_get_rate(sspi->mclk); } @@ -251,14 +256,14 @@ static int sun4i_spi_transfer_one(struct spi_master *master, * First try CDR2, and if we can't reach the expected * frequency, fall back to CDR1. */ - div = mclk_rate / (2 * spi->max_speed_hz); + div = mclk_rate / (2 * speed); if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { if (div > 0) div--; reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; } else { - div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); + div = ilog2(mclk_rate) - ilog2(speed); reg = SUN4I_CLK_CTL_CDR1(div); } diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 3d0f66c..cf6a33e 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -159,7 +159,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master, struct spi_transfer *tfr) { struct sun6i_spi *sspi = spi_master_get_devdata(master); - unsigned int mclk_rate, div, timeout; + unsigned int speed, mclk_rate, div, timeout; unsigned int tx_len = 0; int ret = 0; unsigned int start, end, tx_time; @@ -216,10 +216,15 @@ static int sun6i_spi_transfer_one(struct spi_master *master, sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); + speed = spi->max_speed_hz; + if(!speed) { + speed = 100000; + dev_warn(&spi->dev, "SPI speed not set. Using %uHz.", speed); + } /* Ensure that we have a parent clock fast enough */ mclk_rate = clk_get_rate(sspi->mclk); - if (mclk_rate < (2 * spi->max_speed_hz)) { - clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz); + if (mclk_rate < (2 * speed)) { + clk_set_rate(sspi->mclk, 2 * speed); mclk_rate = clk_get_rate(sspi->mclk); } @@ -237,14 +242,14 @@ static int sun6i_spi_transfer_one(struct spi_master *master, * First try CDR2, and if we can't reach the expected * frequency, fall back to CDR1. */ - div = mclk_rate / (2 * spi->max_speed_hz); + div = mclk_rate / (2 * speed); if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { if (div > 0) div--; reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS; } else { - div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); + div = ilog2(mclk_rate) - ilog2(speed); reg = SUN6I_CLK_CTL_CDR1(div); } -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
[parent not found: <3688fab67e7cdc7bcbff73dfd6b0fcdcc4e79eb6.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero [not found] ` <3688fab67e7cdc7bcbff73dfd6b0fcdcc4e79eb6.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 14:48 ` Maxime Ripard 2015-08-20 19:45 ` Michal Suchanek 2015-08-20 18:45 ` Mark Brown 1 sibling, 1 reply; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 14:48 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 573 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Michal Suchanek wrote: > When the maximum transfer speed is not set for a SPI slave the value > remains 0 and the code in sunxi SPI divides by it. Use an arbitrary > speed instead in that case. > > Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> spi->max_speed_hz is set using the spi-max-frequency property, and spi->will error out if that property isn't set. What am I missing? Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero 2015-08-20 14:48 ` Maxime Ripard @ 2015-08-20 19:45 ` Michal Suchanek [not found] ` <CAOMqctSfdxWeWDogzHxONE+Qxf7vp6rJnBmxECV89PQO0hXARg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 0 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 19:45 UTC (permalink / raw) To: Maxime Ripard Cc: linux-sunxi, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Linux Kernel Mailing List, linux-spi On 20 August 2015 at 16:48, Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote: > On Thu, Aug 20, 2015 at 02:19:46PM -0000, Michal Suchanek wrote: >> When the maximum transfer speed is not set for a SPI slave the value >> remains 0 and the code in sunxi SPI divides by it. Use an arbitrary >> speed instead in that case. >> >> Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > > spi->max_speed_hz is set using the spi-max-frequency property, and > spi->will error out if that property isn't set. What am I missing? > Spidev I guess. You can set the speed to arbitrary value from userspace at any time using the spidev ioctls. Thanks Michal -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 28+ messages in thread
[parent not found: <CAOMqctSfdxWeWDogzHxONE+Qxf7vp6rJnBmxECV89PQO0hXARg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero [not found] ` <CAOMqctSfdxWeWDogzHxONE+Qxf7vp6rJnBmxECV89PQO0hXARg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2015-08-20 21:23 ` Maxime Ripard 0 siblings, 0 replies; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 21:23 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Linux Kernel Mailing List, linux-spi [-- Attachment #1: Type: text/plain, Size: 1081 bytes --] On Thu, Aug 20, 2015 at 09:45:07PM +0200, Michal Suchanek wrote: > On 20 August 2015 at 16:48, Maxime Ripard > <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote: > > On Thu, Aug 20, 2015 at 02:19:46PM -0000, Michal Suchanek wrote: > >> When the maximum transfer speed is not set for a SPI slave the value > >> remains 0 and the code in sunxi SPI divides by it. Use an arbitrary > >> speed instead in that case. > >> > >> Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > > > > spi->max_speed_hz is set using the spi-max-frequency property, and > > spi->will error out if that property isn't set. What am I missing? > > > > Spidev I guess. > > You can set the speed to arbitrary value from userspace at any time > using the spidev ioctls. Then why should it be fixed at the controller driver level? It looks more like an issue that impacts everyone and should be fixed either in spidev directly or in the framework. -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero [not found] ` <3688fab67e7cdc7bcbff73dfd6b0fcdcc4e79eb6.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:48 ` Maxime Ripard @ 2015-08-20 18:45 ` Mark Brown 1 sibling, 0 replies; 28+ messages in thread From: Mark Brown @ 2015-08-20 18:45 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 358 bytes --] On Thu, Aug 20, 2015 at 02:19:46PM -0000, Michal Suchanek wrote: > When the maximum transfer speed is not set for a SPI slave the value > remains 0 and the code in sunxi SPI divides by it. Use an arbitrary > speed instead in that case. You should always be using the transfer speed that is defined per transfer, the core will ensure that this is always set. ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (4 preceding siblings ...) 2015-08-20 14:19 ` [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero Michal Suchanek @ 2015-08-20 14:19 ` Michal Suchanek [not found] ` <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 6/9] ARM: dts: sunxi: add spi aliases on cubieboards Michal Suchanek ` (2 subsequent siblings) 8 siblings, 1 reply; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA According to datasheet some pins are available on A10s only while others are shared with A13. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- This time add all spi pins and make the CS pins separate as is seen with current sun4i DTs --- arch/arm/boot/dts/sun5i-a10s.dtsi | 21 +++++++++++++++++ arch/arm/boot/dts/sun5i.dtsi | 49 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index f11efb7..d9610fa 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -201,6 +201,27 @@ allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + spi1_cs1_pins_a: spi1_cs1@0 { + allwinner,pins = "PG13"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_pins_a: spi2@0 { + allwinner,pins = "PB12", "PB13", "PB14"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_a: spi2_cs0@0 { + allwinner,pins = "PB11"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; &sram_a { diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 54b0978..7d32d49 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -516,6 +516,55 @@ allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; + + spi0_pins_a: spi0@0 { + allwinner,pins = "PC00", "PC01", "PC02"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi0_cs0_pins_a: spi0_cs0@0 { + allwinner,pins = "PC03"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi1_pins_a: spi1@0 { + allwinner,pins = "PG10", "PG11", "PG12"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi1_cs0_pins_a: spi1_cs0@0 { + allwinner,pins = "PG09"; + allwinner,function = "spi1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_pins_b: spi2@1 { + allwinner,pins = "PE01", "PE02", "PE03"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs0_pins_b: spi2_cs1@1 { + allwinner,pins = "PE00"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi2_cs1_pins_a: spi2_cs1@0 { + allwinner,pins = "PB10"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; timer@01c20c00 { -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
[parent not found: <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s [not found] ` <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-08-20 15:00 ` Maxime Ripard 0 siblings, 0 replies; 28+ messages in thread From: Maxime Ripard @ 2015-08-20 15:00 UTC (permalink / raw) To: Michal Suchanek Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 3552 bytes --] On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote: > According to datasheet some pins are available on A10s only while others > are shared with A13. > > Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- > This time add all spi pins and make the CS pins separate as is seen with > current sun4i DTs > --- > arch/arm/boot/dts/sun5i-a10s.dtsi | 21 +++++++++++++++++ > arch/arm/boot/dts/sun5i.dtsi | 49 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 70 insertions(+) > > diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi > index f11efb7..d9610fa 100644 > --- a/arch/arm/boot/dts/sun5i-a10s.dtsi > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi > @@ -201,6 +201,27 @@ > allwinner,drive = <SUN4I_PINCTRL_30_MA>; > allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > }; > + > + spi1_cs1_pins_a: spi1_cs1@0 { > + allwinner,pins = "PG13"; > + allwinner,function = "spi1"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi2_pins_a: spi2@0 { > + allwinner,pins = "PB12", "PB13", "PB14"; > + allwinner,function = "spi1"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi2_cs0_pins_a: spi2_cs0@0 { > + allwinner,pins = "PB11"; > + allwinner,function = "spi1"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; spi2 nodes with spi1 function ??? How can that even work? > }; > > &sram_a { > diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi > index 54b0978..7d32d49 100644 > --- a/arch/arm/boot/dts/sun5i.dtsi > +++ b/arch/arm/boot/dts/sun5i.dtsi > @@ -516,6 +516,55 @@ > allwinner,drive = <SUN4I_PINCTRL_30_MA>; > allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; > }; > + > + spi0_pins_a: spi0@0 { > + allwinner,pins = "PC00", "PC01", "PC02"; > + allwinner,function = "spi0"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi0_cs0_pins_a: spi0_cs0@0 { > + allwinner,pins = "PC03"; > + allwinner,function = "spi0"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi1_pins_a: spi1@0 { > + allwinner,pins = "PG10", "PG11", "PG12"; > + allwinner,function = "spi1"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi1_cs0_pins_a: spi1_cs0@0 { > + allwinner,pins = "PG09"; > + allwinner,function = "spi1"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi2_pins_b: spi2@1 { > + allwinner,pins = "PE01", "PE02", "PE03"; > + allwinner,function = "spi2"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi2_cs0_pins_b: spi2_cs1@1 { > + allwinner,pins = "PE00"; > + allwinner,function = "spi2"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi2_cs1_pins_a: spi2_cs1@0 { > + allwinner,pins = "PB10"; > + allwinner,function = "spi2"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; Please only add the pins you intend to use. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 6/9] ARM: dts: sunxi: add spi aliases on cubieboards [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (5 preceding siblings ...) 2015-08-20 14:19 ` [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s Michal Suchanek @ 2015-08-20 14:19 ` Michal Suchanek 2015-08-20 14:19 ` [PATCH 8/9] ARM: dts: sunxi: A10s Olinuxino Micro: add spi2 Michal Suchanek 2015-08-20 14:19 ` [PATCH 9/9] ARM: dts: sunxi: Add SPI aliases on A10s Olinuxino Michal Suchanek 8 siblings, 0 replies; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA Aliases give nicer device node names. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 1 + arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 9afb4e0..ba02f3b 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -54,6 +54,7 @@ aliases { serial0 = &uart0; + spi0 = &spi0; }; chosen { diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 9861304..4c952a2 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -56,6 +56,7 @@ aliases { serial0 = &uart0; + spi0 = &spi0; }; chosen { -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 8/9] ARM: dts: sunxi: A10s Olinuxino Micro: add spi2. [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (6 preceding siblings ...) 2015-08-20 14:19 ` [PATCH 6/9] ARM: dts: sunxi: add spi aliases on cubieboards Michal Suchanek @ 2015-08-20 14:19 ` Michal Suchanek 2015-08-20 14:19 ` [PATCH 9/9] ARM: dts: sunxi: Add SPI aliases on A10s Olinuxino Michal Suchanek 8 siblings, 0 replies; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA spi2 is exposed on the UEXT connector. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index a7e19e4..b546fc2 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -185,6 +185,13 @@ status = "okay"; }; +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>, + <&spi2_cs0_pins_a>; + status = "okay"; +}; + &ohci0 { status = "okay"; }; -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 9/9] ARM: dts: sunxi: Add SPI aliases on A10s Olinuxino. [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> ` (7 preceding siblings ...) 2015-08-20 14:19 ` [PATCH 8/9] ARM: dts: sunxi: A10s Olinuxino Micro: add spi2 Michal Suchanek @ 2015-08-20 14:19 ` Michal Suchanek 8 siblings, 0 replies; 28+ messages in thread From: Michal Suchanek @ 2015-08-20 14:19 UTC (permalink / raw) To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Maxime Ripard, Mark Brown, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-spi-u79uwXL29TY76Z2rM5mHXA SPI aliases give nicer spidev device node names. Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index b546fc2..1a0e0c0 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -58,6 +58,9 @@ serial0 = &uart0; serial1 = &uart2; serial2 = &uart3; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; }; chosen { -- 2.1.4 ^ permalink raw reply related [flat|nested] 28+ messages in thread
end of thread, other threads:[~2016-05-17 5:44 UTC | newest] Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2015-08-20 14:15 [PATCH 0/9] spi/sunxi patches Michal Suchanek [not found] ` <cover.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:19 ` [PATCH 1/9] spi: sunxi: fix transfer timeout Michal Suchanek [not found] ` <0e0b52774a48ddb71dc8095b66942451cd31ff7d.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:43 ` Maxime Ripard 2015-08-20 18:41 ` Mark Brown [not found] ` <20150820184132.GO12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2015-08-20 19:34 ` Maxime Ripard 2015-08-20 21:08 ` Mark Brown [not found] ` <20150820210830.GS12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2015-08-20 21:18 ` Maxime Ripard 2015-08-20 21:29 ` Mark Brown 2015-08-20 14:19 ` [PATCH 4/9] spi: sun4i: add DMA support Emilio López [not found] ` <ccf776869b0d7fe2c78bcc41d6cd1896bf732296.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:24 ` [linux-sunxi] " Michal Suchanek 2015-08-20 14:56 ` Maxime Ripard 2015-08-20 18:58 ` Mark Brown [not found] ` <20150820185850.GQ12027-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-05-17 5:44 ` Michal Suchanek 2015-08-20 19:00 ` Mark Brown 2015-08-20 14:19 ` [PATCH 2/9] spi: sun4i: fix FIFO limit Michal Suchanek [not found] ` <a40fbf7ca8bd36f08f5e9d3fb6f6de2454066af7.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:45 ` Maxime Ripard 2015-08-20 14:19 ` [PATCH 5/9] ARM: dts: sun7i: cubieboard2: Enable SPI0 Michal Suchanek [not found] ` <a5a061d98b7ff851866cc668cd8bf8f6fc99d002.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:58 ` Maxime Ripard 2015-08-20 14:19 ` [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero Michal Suchanek [not found] ` <3688fab67e7cdc7bcbff73dfd6b0fcdcc4e79eb6.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 14:48 ` Maxime Ripard 2015-08-20 19:45 ` Michal Suchanek [not found] ` <CAOMqctSfdxWeWDogzHxONE+Qxf7vp6rJnBmxECV89PQO0hXARg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2015-08-20 21:23 ` Maxime Ripard 2015-08-20 18:45 ` Mark Brown 2015-08-20 14:19 ` [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s Michal Suchanek [not found] ` <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2015-08-20 15:00 ` Maxime Ripard 2015-08-20 14:19 ` [PATCH 6/9] ARM: dts: sunxi: add spi aliases on cubieboards Michal Suchanek 2015-08-20 14:19 ` [PATCH 8/9] ARM: dts: sunxi: A10s Olinuxino Micro: add spi2 Michal Suchanek 2015-08-20 14:19 ` [PATCH 9/9] ARM: dts: sunxi: Add SPI aliases on A10s Olinuxino Michal Suchanek
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).