From: Neil Armstrong <narmstrong@baylibre.com>
To: kishon@ti.com, balbi@kernel.org, khilman@baylibre.com,
martin.blumenstingl@googlemail.com
Cc: Neil Armstrong <narmstrong@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-usb@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 06/14] usb: dwc3: meson-g12a: refactor usb2 phy init
Date: Thu, 26 Mar 2020 14:44:58 +0100 [thread overview]
Message-ID: <20200326134507.4808-7-narmstrong@baylibre.com> (raw)
In-Reply-To: <20200326134507.4808-1-narmstrong@baylibre.com>
Refactor the USB2 PHY init code patch to handle the Amlogic GXL/GXM
not having the PHY mode control registers in the Glue but in the PHY
registers.
The Amlogic GXL/GXM will call phy_set_mode() instead of programming the
PHY mode control registers, thus add two new callbacks to the SoC match
data.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/usb/dwc3/dwc3-meson-g12a.c | 74 +++++++++++++++++++++---------
1 file changed, 53 insertions(+), 21 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index 69381c42a6d3..328e74def56f 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -136,11 +136,21 @@ struct dwc3_meson_g12a_drvdata {
const char **phy_names;
int num_phys;
int (*setup_regmaps)(struct dwc3_meson_g12a *priv, void __iomem *base);
+ int (*usb2_init_phy)(struct dwc3_meson_g12a *priv, int i,
+ enum phy_mode mode);
+ int (*set_phy_mode)(struct dwc3_meson_g12a *priv, int i,
+ enum phy_mode mode);
};
static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv,
void __iomem *base);
+static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
+ enum phy_mode mode);
+
+static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv,
+ int i, enum phy_mode mode);
+
static struct dwc3_meson_g12a_drvdata g12a_drvdata = {
.otg_switch_supported = true,
.clks = meson_g12a_clocks,
@@ -148,6 +158,8 @@ static struct dwc3_meson_g12a_drvdata g12a_drvdata = {
.phy_names = meson_g12a_phy_names,
.num_phys = ARRAY_SIZE(meson_g12a_phy_names),
.setup_regmaps = dwc3_meson_g12a_setup_regmaps,
+ .usb2_init_phy = dwc3_meson_g12a_usb2_init_phy,
+ .set_phy_mode = dwc3_meson_g12a_set_phy_mode,
};
static struct dwc3_meson_g12a_drvdata a1_drvdata = {
@@ -157,6 +169,8 @@ static struct dwc3_meson_g12a_drvdata a1_drvdata = {
.phy_names = meson_a1_phy_names,
.num_phys = ARRAY_SIZE(meson_a1_phy_names),
.setup_regmaps = dwc3_meson_g12a_setup_regmaps,
+ .usb2_init_phy = dwc3_meson_g12a_usb2_init_phy,
+ .set_phy_mode = dwc3_meson_g12a_set_phy_mode,
};
struct dwc3_meson_g12a {
@@ -175,8 +189,8 @@ struct dwc3_meson_g12a {
const struct dwc3_meson_g12a_drvdata *drvdata;
};
-static void dwc3_meson_g12a_usb2_set_mode(struct dwc3_meson_g12a *priv,
- int i, enum phy_mode mode)
+static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv,
+ int i, enum phy_mode mode)
{
if (mode == PHY_MODE_USB_HOST)
regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
@@ -185,11 +199,41 @@ static void dwc3_meson_g12a_usb2_set_mode(struct dwc3_meson_g12a *priv,
else
regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
U2P_R0_HOST_DEVICE, 0);
+
+ return 0;
+}
+
+static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
+ enum phy_mode mode)
+{
+ int ret;
+
+ regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
+ U2P_R0_POWER_ON_RESET,
+ U2P_R0_POWER_ON_RESET);
+
+ if (priv->drvdata->otg_switch_supported && i == USB2_OTG_PHY) {
+ regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
+ U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS,
+ U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS);
+
+ ret = priv->drvdata->set_phy_mode(priv, i, mode);
+ } else
+ ret = priv->drvdata->set_phy_mode(priv, i,
+ PHY_MODE_USB_HOST);
+
+ if (ret)
+ return ret;
+
+ regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
+ U2P_R0_POWER_ON_RESET, 0);
+
+ return 0;
}
static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv)
{
- int i;
+ int i, ret;
if (priv->otg_mode == USB_DR_MODE_PERIPHERAL)
priv->otg_phy_mode = PHY_MODE_USB_DEVICE;
@@ -203,23 +247,9 @@ static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv)
if (!strstr(priv->drvdata->phy_names[i], "usb2"))
continue;
- regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
- U2P_R0_POWER_ON_RESET,
- U2P_R0_POWER_ON_RESET);
-
- if (priv->drvdata->otg_switch_supported && i == USB2_OTG_PHY) {
- regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
- U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS,
- U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS);
-
- dwc3_meson_g12a_usb2_set_mode(priv, i,
- priv->otg_phy_mode);
- } else
- dwc3_meson_g12a_usb2_set_mode(priv, i,
- PHY_MODE_USB_HOST);
-
- regmap_update_bits(priv->u2p_regmap[i], U2P_R0,
- U2P_R0_POWER_ON_RESET, 0);
+ ret = priv->drvdata->usb2_init_phy(priv, i, priv->otg_phy_mode);
+ if (ret)
+ return ret;
}
return 0;
@@ -372,7 +402,9 @@ static int dwc3_meson_g12a_otg_mode_set(struct dwc3_meson_g12a *priv,
priv->otg_phy_mode = mode;
- dwc3_meson_g12a_usb2_set_mode(priv, USB2_OTG_PHY, mode);
+ ret = priv->drvdata->set_phy_mode(priv, USB2_OTG_PHY, mode);
+ if (ret)
+ return ret;
dwc3_meson_g12a_usb_otg_apply_mode(priv);
--
2.22.0
next prev parent reply other threads:[~2020-03-26 13:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 13:44 [PATCH v2 00/14] usb: dwc3: meson: add OTG support for GXL/GXM Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 01/14] dt-bindings: usb: amlogic,meson-g12a-usb-ctrl: add the Amlogic GXL and GXM Families USB Glue Bindings Neil Armstrong
2020-04-04 17:20 ` Rob Herring
2020-03-26 13:44 ` [PATCH v2 02/14] usb: dwc3: meson-g12a: specify phy names in soc data Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 03/14] usb: dwc3: meson-g12a: handle the phy and glue registers separately Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 04/14] usb: dwc3: meson-g12a: get the reset as shared Neil Armstrong
2020-03-26 13:44 ` [PATCH v2 05/14] usb: dwc3: meson-g12a: check return of dwc3_meson_g12a_usb_init Neil Armstrong
2020-03-26 22:57 ` Martin Blumenstingl
2020-03-26 13:44 ` Neil Armstrong [this message]
2020-03-26 23:08 ` [PATCH v2 06/14] usb: dwc3: meson-g12a: refactor usb2 phy init Martin Blumenstingl
2020-03-29 10:35 ` Felipe Balbi
2020-03-26 13:44 ` [PATCH v2 07/14] usb: dwc3: meson-g12a: refactor usb init Neil Armstrong
2020-03-26 23:26 ` Martin Blumenstingl
2020-03-31 8:44 ` Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 08/14] usb: dwc3: meson-g12a: support the GXL/GXM DWC3 host phy disconnect Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 09/14] usb: dwc3: meson-g12a: add support for GXL and GXM SoCs Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 10/14] arm64: dts: amlogic: use the new USB control driver for GXL and GXM Neil Armstrong
2020-04-29 18:17 ` Kevin Hilman
2020-03-26 13:45 ` [PATCH v2 11/14] phy: amlogic: meson-gxl-usb3: remove code for non-existing PHY Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 12/14] usb: dwc3: of-simple: remove Amlogic GXL and AXG compatibles Neil Armstrong
2020-03-26 13:45 ` [PATCH v2 13/14] doc: dt: bindings: usb: dwc3: remove amlogic compatible entries Neil Armstrong
2020-04-04 17:21 ` Rob Herring
2020-03-26 13:45 ` [PATCH v2 14/14] dt-bindings: usb: dwc3: remove old DWC3 wrapper Neil Armstrong
2020-04-04 17:21 ` Rob Herring
2020-03-29 10:36 ` [PATCH v2 00/14] usb: dwc3: meson: add OTG support for GXL/GXM Felipe Balbi
2020-03-31 8:40 ` Neil Armstrong
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