* [PATCH v2 2/7] arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
@ 2021-02-03 16:52 ` Johan Jonker
2021-02-03 16:52 ` [PATCH v2 3/7] arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node Johan Jonker
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 16:52 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_0 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
.../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 ++++++++--------------
.../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 4 ---
18 files changed, 24 insertions(+), 95 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 1ce85a581..95110d065 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -153,7 +153,7 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
+&usbdrd3_0 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 6db18808b..4017b0e8c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -773,12 +773,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 32dcaf210..e42783cb7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -618,13 +618,9 @@ ap_i2c_audio: &i2c8 {
};
&usbdrd3_0 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon0>;
-};
-
-&usbdrd_dwc3_0 {
status = "okay";
- dr_mode = "host";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index 341d074ed..daf14f732 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -731,12 +731,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index 635afdd99..d028285fb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -797,12 +797,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1fa80ac15..1c0b48a71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -611,12 +611,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 76a8b40a9..90a6ea1d7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -715,10 +715,6 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index ad7c4d008..7b633622c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
@@ -854,12 +854,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
index 219b7507a..f00e11075 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
@@ -1086,10 +1086,6 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
index a8d363568..35780506c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
@@ -223,10 +223,6 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
dr_mode = "otg";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
index 20309076d..4d30c1b32 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
@@ -792,10 +792,6 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
&usbdrd3_1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index fb7599f07..69c067dd1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -668,12 +668,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
index b20774081..20c3ef9fc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
@@ -164,7 +164,7 @@
};
};
-&usbdrd_dwc3_0 {
+&usbdrd3_0 {
dr_mode = "otg";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
index 5e3ac589b..3920dcbd1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
@@ -635,10 +635,6 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
&usbdrd3_1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
index 580972459..564b56810 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
@@ -817,12 +817,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 701a567d7..2e76f178e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -614,12 +614,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index db75c7e85..5045e002a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -394,39 +394,28 @@
};
usbdrd3_0: usb@fe800000 {
- compatible = "rockchip,rk3399-dwc3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
+ reg = <0x0 0xfe800000 0x0 0x100000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
<&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "aclk_usb3_rksoc_axi_perf",
"aclk_usb3", "grf_clk";
+ dr_mode = "otg";
+ phys = <&u2phy0_otg>, <&tcphy0_usb3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ power-domains = <&power RK3399_PD_USB3>;
resets = <&cru SRST_A_USB3_OTG0>;
reset-names = "usb3-otg";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
status = "disabled";
-
- usbdrd_dwc3_0: usb@fe800000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfe800000 0x0 0x100000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
- <&cru SCLK_USB3OTG0_SUSPEND>;
- clock-names = "ref", "bus_early", "suspend";
- dr_mode = "otg";
- phys = <&u2phy0_otg>, <&tcphy0_usb3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis_u2_susphy_quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- power-domains = <&power RK3399_PD_USB3>;
- status = "disabled";
- };
};
usbdrd3_1: usb@fe900000 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 7257494d2..810fb7880 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -454,10 +454,6 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
&vbus_host {
enable-active-high;
gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */
--
2.11.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 3/7] arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
2021-02-03 16:52 ` [PATCH v2 2/7] arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node Johan Jonker
@ 2021-02-03 16:52 ` Johan Jonker
2021-02-03 16:52 ` [PATCH v2 4/7] dt-bindings: usb: dwc3: add description for rk3328 Johan Jonker
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 16:52 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_1 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 6 +---
.../boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 ++++++++--------------
17 files changed, 26 insertions(+), 93 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 95110d065..4392780db 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -157,7 +157,7 @@
dr_mode = "host";
};
-&usbdrd_dwc3_1 {
+&usbdrd3_1 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 4017b0e8c..28e5895de 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -778,12 +778,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
index 1384dabbd..c996c688d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
@@ -351,13 +351,9 @@ ap_i2c_tp: &i2c5 {
};
&usbdrd3_1 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon1>;
-};
-
-&usbdrd_dwc3_1 {
status = "okay";
- dr_mode = "host";
};
&pinctrl {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index daf14f732..397050703 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -736,12 +736,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index d028285fb..30e6e3e41 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -802,12 +802,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1c0b48a71..a7092fda3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -616,12 +616,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 90a6ea1d7..1e835a682 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -712,10 +712,6 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index 7b633622c..fdc027ff3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
@@ -859,12 +859,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
index f00e11075..80ac8ab6a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
@@ -1091,10 +1091,6 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
index 4660416c8..2f12e4a7d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
@@ -517,12 +517,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usb_host1_ehci {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
index 4d30c1b32..f15f85162 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
@@ -793,12 +793,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index 69c067dd1..f07f49f45 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -673,12 +673,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
index 20c3ef9fc..e22995c8e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
@@ -168,7 +168,7 @@
dr_mode = "otg";
};
-&usbdrd_dwc3_1 {
+&usbdrd3_1 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
index 3920dcbd1..b5f23661e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
@@ -639,10 +639,6 @@
status = "okay";
};
-&usbdrd_dwc3_1 {
- status = "okay";
-};
-
&vopb {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
index 564b56810..be5b1c7e1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
@@ -822,12 +822,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 2e76f178e..fe9d4b2f8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -619,12 +619,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 5045e002a..cde221c88 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -419,39 +419,28 @@
};
usbdrd3_1: usb@fe900000 {
- compatible = "rockchip,rk3399-dwc3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
+ reg = <0x0 0xfe900000 0x0 0x100000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
<&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
<&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "aclk_usb3_rksoc_axi_perf",
"aclk_usb3", "grf_clk";
+ dr_mode = "otg";
+ phys = <&u2phy1_otg>, <&tcphy1_usb3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ power-domains = <&power RK3399_PD_USB3>;
resets = <&cru SRST_A_USB3_OTG1>;
reset-names = "usb3-otg";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
status = "disabled";
-
- usbdrd_dwc3_1: usb@fe900000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfe900000 0x0 0x100000>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
- <&cru SCLK_USB3OTG1_SUSPEND>;
- clock-names = "ref", "bus_early", "suspend";
- dr_mode = "otg";
- phys = <&u2phy1_otg>, <&tcphy1_usb3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis_u2_susphy_quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- power-domains = <&power RK3399_PD_USB3>;
- status = "disabled";
- };
};
cdn_dp: dp@fec00000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 4/7] dt-bindings: usb: dwc3: add description for rk3328
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
2021-02-03 16:52 ` [PATCH v2 2/7] arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node Johan Jonker
2021-02-03 16:52 ` [PATCH v2 3/7] arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node Johan Jonker
@ 2021-02-03 16:52 ` Johan Jonker
2021-02-03 16:52 ` [PATCH v2 5/7] usb: dwc3: of-simple: add compatible " Johan Jonker
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 16:52 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
Add description for "rockchip,rk3328-dwc3".
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
index fdf9497bc..621166a50 100644
--- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
@@ -27,6 +27,7 @@ properties:
compatible:
items:
- enum:
+ - rockchip,rk3328-dwc3
- rockchip,rk3399-dwc3
- const: snps,dwc3
@@ -37,6 +38,7 @@ properties:
maxItems: 1
clocks:
+ minItems: 3
items:
- description:
Controller reference clock, must to be 24 MHz
@@ -53,6 +55,7 @@ properties:
Controller grf clock
clock-names:
+ minItems: 3
items:
- const: ref_clk
- const: suspend_clk
--
2.11.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 5/7] usb: dwc3: of-simple: add compatible for rk3328
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (2 preceding siblings ...)
2021-02-03 16:52 ` [PATCH v2 4/7] dt-bindings: usb: dwc3: add description for rk3328 Johan Jonker
@ 2021-02-03 16:52 ` Johan Jonker
2021-02-03 16:52 ` [PATCH v2 6/7] arm64: dts: rockchip: add rk3328 dwc3 usb controller node Johan Jonker
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 16:52 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
From: Cameron Nemo <cnemo@tutanota.com>
Add a compatible to be hooked into by the Rockchip rk3328 device tree.
The rk3399 compatible cannot be reused because the rk3328 SoCs may
require a specialized driver in the future and old device trees must
remain compatible with newer kernels.
Signed-off-by: Cameron Nemo <cnemo@tutanota.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
drivers/usb/dwc3/dwc3-of-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c
index e62ecd22b..93bc34328 100644
--- a/drivers/usb/dwc3/dwc3-of-simple.c
+++ b/drivers/usb/dwc3/dwc3-of-simple.c
@@ -171,6 +171,7 @@ static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
};
static const struct of_device_id of_dwc3_simple_match[] = {
+ { .compatible = "rockchip,rk3328-dwc3" },
{ .compatible = "rockchip,rk3399-dwc3" },
{ .compatible = "xlnx,zynqmp-dwc3" },
{ .compatible = "cavium,octeon-7130-usb-uctl" },
--
2.11.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 6/7] arm64: dts: rockchip: add rk3328 dwc3 usb controller node
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (3 preceding siblings ...)
2021-02-03 16:52 ` [PATCH v2 5/7] usb: dwc3: of-simple: add compatible " Johan Jonker
@ 2021-02-03 16:52 ` Johan Jonker
2021-02-03 16:52 ` [PATCH v2 7/7] dts64: rockchip: enable dwc3 usb for A95X Z2 Johan Jonker
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 16:52 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
From: Cameron Nemo <cnemo@tutanota.com>
RK3328 SoCs have one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Cameron Nemo <cnemo@tutanota.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 4d4cd1830..a3b069a10 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -988,6 +988,25 @@
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.11.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 7/7] dts64: rockchip: enable dwc3 usb for A95X Z2
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (4 preceding siblings ...)
2021-02-03 16:52 ` [PATCH v2 6/7] arm64: dts: rockchip: add rk3328 dwc3 usb controller node Johan Jonker
@ 2021-02-03 16:52 ` Johan Jonker
2021-02-03 20:45 ` [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 16:52 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
Enable dwc3 usb for A95X Z2.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
index 30c73ef25..e71870768 100644
--- a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
@@ -357,6 +357,11 @@
status = "okay";
};
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host0_ehci {
status = "okay";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (5 preceding siblings ...)
2021-02-03 16:52 ` [PATCH v2 7/7] dts64: rockchip: enable dwc3 usb for A95X Z2 Johan Jonker
@ 2021-02-03 20:45 ` Johan Jonker
2021-02-04 11:35 ` Robin Murphy
2021-02-04 15:20 ` Rob Herring
8 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-03 20:45 UTC (permalink / raw)
To: heiko
Cc: robh+dt, gregkh, balbi, linux-usb, devicetree, linux-rockchip,
linux-arm-kernel, linux-kernel
Hi Rob, Heiko,
Version 2 without node wrapper.
Is that OK for backwards compatibility?
New SoC rk3568 and rk3566 in the manufacturer tree also seem to use dwc3
usb, so now only a rk3399 node restyle in mainline with conversion to yaml.
On 2/3/21 5:52 PM, Johan Jonker wrote:
> In the past Rockchip dwc3 usb nodes were manually checked.
> With the conversion of snps,dwc3.yaml as common document
> we now can convert rockchip,dwc3.txt to yaml as well.
> Remove node wrapper.
>
> Added properties for rk3399 are:
> power-domains
> resets
> reset-names
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> .../devicetree/bindings/usb/rockchip,dwc3.txt | 56 -----------
> .../devicetree/bindings/usb/rockchip,dwc3.yaml | 103 +++++++++++++++++++++
> 2 files changed, 103 insertions(+), 56 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> create mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> deleted file mode 100644
> index 945204932..000000000
> --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -Rockchip SuperSpeed DWC3 USB SoC controller
> -
> -Required properties:
> -- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
> -- clocks: A list of phandle + clock-specifier pairs for the
> - clocks listed in clock-names
> -- clock-names: Should contain the following:
> - "ref_clk" Controller reference clk, have to be 24 MHz
> - "suspend_clk" Controller suspend clk, have to be 24 MHz or 32 KHz
> - "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
> - operation and >= 30MHz for HS operation
> - "grf_clk" Controller grf clk
> -
> -Required child node:
> -A child node must exist to represent the core DWC3 IP block. The name of
> -the node is not important. The content of the node is defined in dwc3.txt.
> -
> -Phy documentation is provided in the following places:
> -Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY
> -Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY
> -
> -Example device nodes:
> -
> - usbdrd3_0: usb@fe800000 {
> - compatible = "rockchip,rk3399-dwc3";
> - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
> - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
> - clock-names = "ref_clk", "suspend_clk",
> - "bus_clk", "grf_clk";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - usbdrd_dwc3_0: dwc3@fe800000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0xfe800000 0x0 0x100000>;
> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> - dr_mode = "otg";
> - };
> - };
> -
> - usbdrd3_1: usb@fe900000 {
> - compatible = "rockchip,rk3399-dwc3";
> - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
> - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
> - clock-names = "ref_clk", "suspend_clk",
> - "bus_clk", "grf_clk";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - usbdrd_dwc3_1: dwc3@fe900000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0xfe900000 0x0 0x100000>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - dr_mode = "otg";
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> new file mode 100644
> index 000000000..fdf9497bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> @@ -0,0 +1,103 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip SuperSpeed DWC3 USB SoC controller
> +
> +maintainers:
> + - Heiko Stuebner <heiko@sntech.de>
> +
> +description:
> + The common content of the node is defined in snps,dwc3.yaml.
> +
> + Phy documentation is provided in the following places.
> +
> + USB2.0 PHY
> + Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +
> + Type-C PHY
> + Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
wrong indentation: expected 2 but found 6 (indentation)
yamllint ./Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
This warning doesn't seem to show up with the command below.
make ARCH=arm64 dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> +
> +allOf:
> + - $ref: snps,dwc3.yaml#
No warning is given here with dt_binding_check.
From patchwork log:
Unknown file referenced: [Errno 2] No such file or directory:
'/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/snps,dwc3.yaml'
/////
What's the correct format?
- $ref: snps,dwc3.yaml#
or
- $ref: "snps,dwc3.yaml#"
/////
This serie is for linux-next.
What kernel version does patchwork work test with?
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210203165233.22177-1-jbx6244@gmail.com/
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - rockchip,rk3399-dwc3
> + - const: snps,dwc3
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description:
> + Controller reference clock, must to be 24 MHz
> + - description:
> + Controller suspend clock, must to be 24 MHz or 32 KHz
> + - description:
> + Master/Core clock, must to be >= 62.5 MHz for SS
> + operation and >= 30MHz for HS operation
> + - description:
> + Controller aclk_usb3_rksoc_axi_perf clock
> + - description:
> + Controller aclk_usb3 clock
> + - description:
> + Controller grf clock
> +
> + clock-names:
> + items:
> + - const: ref_clk
> + - const: suspend_clk
> + - const: bus_clk
> + - const: aclk_usb3_rksoc_axi_perf
> + - const: aclk_usb3
> + - const: grf_clk
> +
> + power-domains:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + const: usb3-otg
> +
> +unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rk3399-cru.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + usbdrd3_0: usb@fe800000 {
> + compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
> + reg = <0x0 0xfe800000 0x0 0x100000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
> + <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
> + <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
> + clock-names = "ref_clk", "suspend_clk",
> + "bus_clk", "aclk_usb3_rksoc_axi_perf",
> + "aclk_usb3", "grf_clk";
> + dr_mode = "otg";
> + };
> + };
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (6 preceding siblings ...)
2021-02-03 20:45 ` [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
@ 2021-02-04 11:35 ` Robin Murphy
2021-02-04 15:03 ` Johan Jonker
2021-02-04 15:20 ` Rob Herring
8 siblings, 1 reply; 11+ messages in thread
From: Robin Murphy @ 2021-02-04 11:35 UTC (permalink / raw)
To: Johan Jonker, heiko, Elaine Zhang
Cc: devicetree, balbi, gregkh, linux-usb, linux-kernel,
linux-rockchip, robh+dt, linux-arm-kernel
On 2021-02-03 16:52, Johan Jonker wrote:
> In the past Rockchip dwc3 usb nodes were manually checked.
> With the conversion of snps,dwc3.yaml as common document
> we now can convert rockchip,dwc3.txt to yaml as well.
> Remove node wrapper.
>
> Added properties for rk3399 are:
> power-domains
> resets
> reset-names
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> .../devicetree/bindings/usb/rockchip,dwc3.txt | 56 -----------
> .../devicetree/bindings/usb/rockchip,dwc3.yaml | 103 +++++++++++++++++++++
> 2 files changed, 103 insertions(+), 56 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> create mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> deleted file mode 100644
> index 945204932..000000000
> --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -Rockchip SuperSpeed DWC3 USB SoC controller
> -
> -Required properties:
> -- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
> -- clocks: A list of phandle + clock-specifier pairs for the
> - clocks listed in clock-names
> -- clock-names: Should contain the following:
> - "ref_clk" Controller reference clk, have to be 24 MHz
> - "suspend_clk" Controller suspend clk, have to be 24 MHz or 32 KHz
> - "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
> - operation and >= 30MHz for HS operation
> - "grf_clk" Controller grf clk
> -
> -Required child node:
> -A child node must exist to represent the core DWC3 IP block. The name of
> -the node is not important. The content of the node is defined in dwc3.txt.
> -
> -Phy documentation is provided in the following places:
> -Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY
> -Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY
> -
> -Example device nodes:
> -
> - usbdrd3_0: usb@fe800000 {
> - compatible = "rockchip,rk3399-dwc3";
> - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
> - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
> - clock-names = "ref_clk", "suspend_clk",
> - "bus_clk", "grf_clk";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - usbdrd_dwc3_0: dwc3@fe800000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0xfe800000 0x0 0x100000>;
> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> - dr_mode = "otg";
> - };
> - };
> -
> - usbdrd3_1: usb@fe900000 {
> - compatible = "rockchip,rk3399-dwc3";
> - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
> - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
> - clock-names = "ref_clk", "suspend_clk",
> - "bus_clk", "grf_clk";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - usbdrd_dwc3_1: dwc3@fe900000 {
> - compatible = "snps,dwc3";
> - reg = <0x0 0xfe900000 0x0 0x100000>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - dr_mode = "otg";
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> new file mode 100644
> index 000000000..fdf9497bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> @@ -0,0 +1,103 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip SuperSpeed DWC3 USB SoC controller
> +
> +maintainers:
> + - Heiko Stuebner <heiko@sntech.de>
> +
> +description:
> + The common content of the node is defined in snps,dwc3.yaml.
> +
> + Phy documentation is provided in the following places.
> +
> + USB2.0 PHY
> + Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +
> + Type-C PHY
> + Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
> +
> +allOf:
> + - $ref: snps,dwc3.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - rockchip,rk3399-dwc3
> + - const: snps,dwc3
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description:
> + Controller reference clock, must to be 24 MHz
> + - description:
> + Controller suspend clock, must to be 24 MHz or 32 KHz
> + - description:
> + Master/Core clock, must to be >= 62.5 MHz for SS
> + operation and >= 30MHz for HS operation
> + - description:
> + Controller aclk_usb3_rksoc_axi_perf clock
I'm pretty sure these last 3 don't belong to the controller itself,
hence why they were in the glue layer node to being with.
> + - description:
> + Controller aclk_usb3 clock
Does anything in the USB3 block actually consume this clock directly? If
not, then I don't think it needs to be specified since it's already the
parent of the controller's required bus_clk.
I'm similarly suspicious of ACLK_USB3_NOC which is currently marked as
CLK_IGNORE_UNUSED - if that's necessary for USB3 to function then it
probably *should* be specified as part of the glue layer binding here.
Robin.
> + - description:
> + Controller grf clock
> +
> + clock-names:
> + items:
> + - const: ref_clk
> + - const: suspend_clk
> + - const: bus_clk
> + - const: aclk_usb3_rksoc_axi_perf
> + - const: aclk_usb3
> + - const: grf_clk
> +
> + power-domains:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + const: usb3-otg
> +
> +unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rk3399-cru.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + usbdrd3_0: usb@fe800000 {
> + compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
> + reg = <0x0 0xfe800000 0x0 0x100000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
> + <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
> + <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
> + clock-names = "ref_clk", "suspend_clk",
> + "bus_clk", "aclk_usb3_rksoc_axi_perf",
> + "aclk_usb3", "grf_clk";
> + dr_mode = "otg";
> + };
> + };
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml
2021-02-04 11:35 ` Robin Murphy
@ 2021-02-04 15:03 ` Johan Jonker
0 siblings, 0 replies; 11+ messages in thread
From: Johan Jonker @ 2021-02-04 15:03 UTC (permalink / raw)
To: Robin Murphy, heiko, Elaine Zhang
Cc: devicetree, balbi, gregkh, linux-usb, linux-kernel,
linux-rockchip, robh+dt, linux-arm-kernel
Hi Robin,
Thank you for your comments.
The old binding txt is not so up to date.
The question is now what do we add or not..
On 2/4/21 12:35 PM, Robin Murphy wrote:
> On 2021-02-03 16:52, Johan Jonker wrote:
>> In the past Rockchip dwc3 usb nodes were manually checked.
>> With the conversion of snps,dwc3.yaml as common document
>> we now can convert rockchip,dwc3.txt to yaml as well.
>> Remove node wrapper.
>>
>> Added properties for rk3399 are:
>> power-domains
>> resets
>> reset-names
>>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>> ---
>> .../devicetree/bindings/usb/rockchip,dwc3.txt | 56 -----------
>> .../devicetree/bindings/usb/rockchip,dwc3.yaml | 103
>> +++++++++++++++++++++
>> 2 files changed, 103 insertions(+), 56 deletions(-)
>> delete mode 100644
>> Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
>> create mode 100644
>> Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
>> b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
>> deleted file mode 100644
>> index 945204932..000000000
>> --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
>> +++ /dev/null
>> @@ -1,56 +0,0 @@
>> -Rockchip SuperSpeed DWC3 USB SoC controller
>> -
>> -Required properties:
>> -- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
>> -- clocks: A list of phandle + clock-specifier pairs for the
>> - clocks listed in clock-names
>> -- clock-names: Should contain the following:
>> - "ref_clk" Controller reference clk, have to be 24 MHz
>> - "suspend_clk" Controller suspend clk, have to be 24 MHz or 32 KHz
>> - "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
>> - operation and >= 30MHz for HS operation
>> - "grf_clk" Controller grf clk
>> -
>> -Required child node:
>> -A child node must exist to represent the core DWC3 IP block. The name of
>> -the node is not important. The content of the node is defined in
>> dwc3.txt.
>> -
>> -Phy documentation is provided in the following places:
>> -Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml -
>> USB2.0 PHY
>> -Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt -
>> Type-C PHY
>> -
>> -Example device nodes:
>> -
>> - usbdrd3_0: usb@fe800000 {
>> - compatible = "rockchip,rk3399-dwc3";
>> - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
>> - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
>> - clock-names = "ref_clk", "suspend_clk",
>> - "bus_clk", "grf_clk";
>> - #address-cells = <2>;
>> - #size-cells = <2>;
>> - ranges;
>> - usbdrd_dwc3_0: dwc3@fe800000 {
>> - compatible = "snps,dwc3";
>> - reg = <0x0 0xfe800000 0x0 0x100000>;
>> - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>> - dr_mode = "otg";
>> - };
>> - };
>> -
>> - usbdrd3_1: usb@fe900000 {
>> - compatible = "rockchip,rk3399-dwc3";
>> - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
>> - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
>> - clock-names = "ref_clk", "suspend_clk",
>> - "bus_clk", "grf_clk";
>> - #address-cells = <2>;
>> - #size-cells = <2>;
>> - ranges;
>> - usbdrd_dwc3_1: dwc3@fe900000 {
>> - compatible = "snps,dwc3";
>> - reg = <0x0 0xfe900000 0x0 0x100000>;
>> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
>> - dr_mode = "otg";
>> - };
>> - };
>> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>> b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>> new file mode 100644
>> index 000000000..fdf9497bc
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>> @@ -0,0 +1,103 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Rockchip SuperSpeed DWC3 USB SoC controller
>> +
>> +maintainers:
>> + - Heiko Stuebner <heiko@sntech.de>
>> +
>> +description:
>> + The common content of the node is defined in snps,dwc3.yaml.
>> +
>> + Phy documentation is provided in the following places.
>> +
>> + USB2.0 PHY
>> + Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
>> +
>> + Type-C PHY
>> + Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
>> +
>> +allOf:
>> + - $ref: snps,dwc3.yaml#
Could Rob advise here? Is this OK or not?
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - enum:
>> + - rockchip,rk3399-dwc3
>> + - const: snps,dwc3
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + clocks:
>> + items:
>> + - description:
>> + Controller reference clock, must to be 24 MHz
>> + - description:
>> + Controller suspend clock, must to be 24 MHz or 32 KHz
>> + - description:
>> + Master/Core clock, must to be >= 62.5 MHz for SS
>> + operation and >= 30MHz for HS operation
>> + - description:
>> + Controller aclk_usb3_rksoc_axi_perf clock
>
> I'm pretty sure these last 3 don't belong to the controller itself,
> hence why they were in the glue layer node to being with.
New proposal:
clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "grf_clk";
Clocks seem to be enabled in bulk.
ret = clk_bulk_get_all(simple->dev, &simple->clks);
With dt checks no longer able to add "@" in the nodename without reg
property in the node.
Given only clocks left in parent node and Rob's comment I've combined
all in 1 node.
>
>> + - description:
>> + Controller aclk_usb3 clock
>
> Does anything in the USB3 block actually consume this clock directly? If
> not, then I don't think it needs to be specified since it's already the
> parent of the controller's required bus_clk.
The patch from the manufacturer tree in the link below seems to confirm
this.
////
From manufacturer tree:
arm64: dts: rockchip: optimize clks for rk3399 dwc3
https://github.com/rockchip-linux/kernel/commit/1948bffacbc7a893d550141a63664b596717623a
remove unnecessary clocks, refer to rk3399 TRM, aclk_usb3 is the
parent of aclk_usb3otg0/1 and aclk_usb3_grf, and we will enable
aclk_usb3otg0/1 and aclk_usb3_grf, so don't need to enable aclk_usb3
again. In addition, the aclk_usb3_rksoc_axi_perf clk is used for usb3
performance monitor module which we don't use now, so don't need to
enable it.
////
>
> I'm similarly suspicious of ACLK_USB3_NOC which is currently marked as
> CLK_IGNORE_UNUSED - if that's necessary for USB3 to function then it
> probably *should* be specified as part of the glue layer binding here.
Don't know about ACLK_USB3_NOC. I leave it as it is for now.
>
> Robin.
>
>> + - description:
>> + Controller grf clock
>> +
>> + clock-names:
>> + items:
>> + - const: ref_clk
>> + - const: suspend_clk
>> + - const: bus_clk
>> + - const: aclk_usb3_rksoc_axi_perf
>> + - const: aclk_usb3
Remove these ??
>> + - const: grf_clk
>> +
>> + power-domains:
>> + maxItems: 1
>> +
>> + resets:
>> + maxItems: 1
>> +
>> + reset-names:
>> + const: usb3-otg
From manufacturer tree:
arm64: dts: rockchip: move resets to the subnode of dwc3 for rk3399
https://github.com/rockchip-linux/kernel/commit/966da4dbacab847825f50a70036baacd74b2358d
////
In mainline:
/*
* Some controllers need to toggle the usb3-otg reset before trying to
* initialize the PHY, otherwise the PHY times out.
*/
if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
simple->need_reset = true;
simple->resets = of_reset_control_array_get(np, false, true,
true);
////
Do we still need "reset-names" here??
>> +
>> +unevaluatedProperties: false
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - clocks
>> + - clock-names
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/rk3399-cru.h>
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> + bus {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + usbdrd3_0: usb@fe800000 {
>> + compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
>> + reg = <0x0 0xfe800000 0x0 0x100000>;
>> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
>> + <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
>> + <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
>> + clock-names = "ref_clk", "suspend_clk",
>> + "bus_clk", "aclk_usb3_rksoc_axi_perf",
>> + "aclk_usb3", "grf_clk";
>> + dr_mode = "otg";
>> + };
>> + };
>>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml
2021-02-03 16:52 [PATCH v2 1/7] dt-bindings: usb: convert rockchip,dwc3.txt to yaml Johan Jonker
` (7 preceding siblings ...)
2021-02-04 11:35 ` Robin Murphy
@ 2021-02-04 15:20 ` Rob Herring
8 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2021-02-04 15:20 UTC (permalink / raw)
To: Johan Jonker
Cc: balbi, heiko, linux-kernel, linux-rockchip, linux-arm-kernel,
devicetree, gregkh, robh+dt, linux-usb
On Wed, 03 Feb 2021 17:52:27 +0100, Johan Jonker wrote:
> In the past Rockchip dwc3 usb nodes were manually checked.
> With the conversion of snps,dwc3.yaml as common document
> we now can convert rockchip,dwc3.txt to yaml as well.
> Remove node wrapper.
>
> Added properties for rk3399 are:
> power-domains
> resets
> reset-names
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> .../devicetree/bindings/usb/rockchip,dwc3.txt | 56 -----------
> .../devicetree/bindings/usb/rockchip,dwc3.yaml | 103 +++++++++++++++++++++
> 2 files changed, 103 insertions(+), 56 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> create mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml:13:7: [warning] wrong indentation: expected 2 but found 6 (indentation)
dtschema/dtc warnings/errors:
Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/snps,dwc3.yaml'
xargs: dt-doc-validate: exited with status 255; aborting
make[1]: *** Deleting file 'Documentation/devicetree/bindings/usb/qcom,dwc3.example.dt.yaml'
Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/snps,dwc3.yaml'
make[1]: *** [scripts/Makefile.lib:344: Documentation/devicetree/bindings/usb/qcom,dwc3.example.dt.yaml] Error 255
make[1]: *** Waiting for unfinished jobs....
make[1]: *** Deleting file 'Documentation/devicetree/bindings/usb/intel,keembay-dwc3.example.dt.yaml'
Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/snps,dwc3.yaml'
make[1]: *** [scripts/Makefile.lib:344: Documentation/devicetree/bindings/usb/intel,keembay-dwc3.example.dt.yaml] Error 255
make[1]: *** Deleting file 'Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml'
Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/snps,dwc3.yaml'
make[1]: *** [scripts/Makefile.lib:344: Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml] Error 255
make: *** [Makefile:1370: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1435466
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 11+ messages in thread