From: Charles Yeh <charlesyeh522@gmail.com>
To: Johan Hovold <johan@kernel.org>
Cc: "Greg KH" <gregkh@linuxfoundation.org>,
linux-usb@vger.kernel.org,
"Yeh.Charles [葉榮鑫]" <charles-yeh@prolific.com.tw>
Subject: Re: [PATCH] [PATCH v7] USB: serial: pl2303: Add new PID to support PL2303HXN (TYPE_HXN)
Date: Wed, 18 Sep 2019 13:46:15 +0800 [thread overview]
Message-ID: <CAAZvQQ5aK8+bT73yfMt4BpT=F=+evoi-d59ByTHmLsVDUKnMZQ@mail.gmail.com> (raw)
In-Reply-To: <CAAZvQQ5pJDmZ-F8E8AhGxNK6ohuq3ev8OnySE-+zQNThBcu3Ag@mail.gmail.com>
Hello ,
Any update on this?
Charles.
Charles Yeh <charlesyeh522@gmail.com> 於 2019年8月27日 週二 下午4:40寫道:
>
> Johan Hovold <johan@kernel.org> 於 2019年7月16日 週二 下午4:49寫道:
> > > #define PL2303_FLOWCTRL_MASK 0xf0
> > > +#define PL2303_HXN_FLOWCTRL_MASK 0x1C
> > > +#define PL2303_HXN_FLOWCTRL 0x0A
> >
> > I asked you to keep related defines together (and to move the mask where
> > the register define was, not the other way round). Please move these to
> > the other HXN defines below, and keep the register address defines
> > before the corresponding bit defines.
>
> Charles Ans:
> I am not 100% sure what you mean, please see if it is defined below
>
> #define PL2303_FLOWCTRL_MASK 0xf0
>
> #define PL2303_READ_TYPE_HX_STATUS 0x8080
>
> #define PL2303_HXN_CTRL_XON_XOFF 0x0C
> #define PL2303_HXN_CTRL_RTS_CTS 0x18
> #define PL2303_HXN_CTRL_NONE 0x1C
> #define PL2303_HXN_FLOWCTRL_MASK 0x1C
> #define PL2303_HXN_FLOWCTRL 0x0A
>
> #define PL2303_HXN_RESET_UP_DOWNSTREAM_DATA_PIPE 0x03
> #define PL2303_HXN_RESET_UP_DOWNSTREAM_DATA_PIPE_MASK 0x03
> #define PL2303_HXN_RESET_CONTROL 0x07
>
> > > +
> > > +#define PL2303_HXN_RESET_CONTROL_MASK 0x03
> > This makes no sense. The whole register is used for reset. If you want a
> > define that can be used for resetting both pipes then add two separate
> > defines for up and down respectively, and add a third define for
> > resetting both buffer as a bitwise OR of the two.
>
> Charles Ans:
> Yes,The whole register is used for reset.
> Bit 0 and bit 1 are used for up & downstream data pipe,
> Bit 2 for interface reset
> Bit 4 for chip reset.
>
> But I only reset bit 0 & bit 1.
>
>
> > Also move this one after the corresponding register address define
> > below.
> >
> > > +#define PL2303_HXN_RESET_CONTROL 0x07
> > > +#define PL2303_HXN_CTRL_XON_XOFF 0x0C
> > > +#define PL2303_HXN_CTRL_RTS_CTS 0x18
> > > +#define PL2303_HXN_CTRL_NONE 0x1C
>
> Charles Ans:
> I am not 100% sure what you mean, please see if it is defined below
>
> #define PL2303_FLOWCTRL_MASK 0xf0
>
> #define PL2303_READ_TYPE_HX_STATUS 0x8080
>
> #define PL2303_HXN_CTRL_XON_XOFF 0x0C
> #define PL2303_HXN_CTRL_RTS_CTS 0x18
> #define PL2303_HXN_CTRL_NONE 0x1C
> #define PL2303_HXN_FLOWCTRL_MASK 0x1C
> #define PL2303_HXN_FLOWCTRL 0x0A
>
> #define PL2303_HXN_RESET_UP_DOWNSTREAM_DATA_PIPE 0x03
> #define PL2303_HXN_RESET_UP_DOWNSTREAM_DATA_PIPE_MASK 0x03
> #define PL2303_HXN_RESET_CONTROL 0x07
>
> > > + } else if (spriv->type == &pl2303_type_data[TYPE_HXN]) {
> > > /* reset upstream data pipes */
> >
> > This comment belongs in the last else block. Your new code shouldn't
> > need one.
>
> Charles Ans:
> OK, I will remove this comment.
>
>
> >
> > > + pl2303_update_reg(serial, PL2303_HXN_RESET_CONTROL,
> > > + PL2303_HXN_RESET_CONTROL_MASK, 0x03);
> >
> > So two things; first, do you really need to read back the current value?
> > I would assume that it always reads back as 0 and that writing 0x03 in
> > this case would be sufficient to reset both buffers.
> >
>
> Charles Ans:
> Yes, I want to read back the current value.
> because the whole register is used for reset.
> Bit 0 and bit 1 are used for up & downstream data pipe,
> Bit 2 for interface reset
> Bit 4 for chip reset.
>
> But I only reset bit 0 & bit 1.
>
> > Second, please use a define for 0x03; no magic constants, as we have
> > discussed before. You don't need a separate mask define if you're always
> > resetting both buffers together (just use the same value define twice).
>
> Charles Ans:
> OK, I will define for 0x03.
>
> #define PL2303_HXN_RESET_UP_DOWNSTREAM_DATA_PIPE 0x03
>
>
> Charles Yeh.
next prev parent reply other threads:[~2019-09-18 5:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-02 12:30 [PATCH] [PATCH v7] USB: serial: pl2303: Add new PID to support PL2303HXN (TYPE_HXN) Charles Yeh
2019-07-05 2:57 ` Charles Yeh
2019-07-05 5:18 ` Greg KH
2019-07-16 8:49 ` Johan Hovold
2019-08-27 8:40 ` Charles Yeh
2019-09-18 5:46 ` Charles Yeh [this message]
2019-09-20 7:56 ` Johan Hovold
2019-09-23 9:53 ` Charles Yeh
2019-09-23 10:24 ` Johan Hovold
2019-09-23 10:35 ` Charles Yeh
2019-09-23 13:08 ` Johan Hovold
2019-09-25 1:20 ` Charles Yeh
2019-09-25 8:06 ` Johan Hovold
2019-09-25 9:36 ` Charles Yeh
2019-09-25 9:38 ` Johan Hovold
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