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From: Sam Shih <sam.shih@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Sean Wang <sean.wang@kernel.org>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Matt Mackall <mpm@selenic.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Wim Van Sebroeck <wim@linux-watchdog.org>,
	Guenter Roeck <linux@roeck-us.net>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	Fabien Parent <fparent@baylibre.com>,
	Seiya Wang <seiya.wang@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-gpio@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-crypto@vger.kernel.org>, <linux-serial@vger.kernel.org>,
	<linux-watchdog@vger.kernel.org>, <linux-clk@vger.kernel.org>
Cc: John Crispin <john@phrozen.org>,
	Ryder Lee <Ryder.Lee@mediatek.com>,
	"Sam Shih" <sam.shih@mediatek.com>
Subject: [v2,04/12] pinctrl: mediatek: moore: check if pin_desc is valid before use
Date: Tue, 17 Aug 2021 15:45:49 +0800	[thread overview]
Message-ID: <20210817074557.30953-5-sam.shih@mediatek.com> (raw)
In-Reply-To: <20210817074557.30953-1-sam.shih@mediatek.com>

Certain SoC are missing the middle part gpios in consecutive pins,
it's better to check if mtk_pin_desc is a valid pin for the extensibility

Signed-off-by: Sam Shih <sam.shih@mediatek.com>

---
v2: applied the comment suggested by reviewers:
    - for the pins not ballout, we can fill .name in struct mtk_pin_desc
      as NULL and return -ENOTSUPP in gpio/pinconf ops.

---
 drivers/pinctrl/mediatek/pinctrl-moore.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c
index 3a4a23c40a71..ad3b67163973 100644
--- a/drivers/pinctrl/mediatek/pinctrl-moore.c
+++ b/drivers/pinctrl/mediatek/pinctrl-moore.c
@@ -60,6 +60,8 @@ static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
 		int pin = grp->pins[i];
 
 		desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
+		if (!desc->name)
+			return -ENOTSUPP;
 
 		mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
 				 pin_modes[i]);
@@ -76,6 +78,8 @@ static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
 	const struct mtk_pin_desc *desc;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
+	if (!desc->name)
+		return -ENOTSUPP;
 
 	return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
 				hw->soc->gpio_m);
@@ -89,6 +93,8 @@ static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
 	const struct mtk_pin_desc *desc;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
+	if (!desc->name)
+		return -ENOTSUPP;
 
 	/* hardware would take 0 as input direction */
 	return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
@@ -103,6 +109,8 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
 	const struct mtk_pin_desc *desc;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
+	if (!desc->name)
+		return -ENOTSUPP;
 
 	switch (param) {
 	case PIN_CONFIG_BIAS_DISABLE:
@@ -218,6 +226,8 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
 	int cfg, err = 0;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
+	if (!desc->name)
+		return -ENOTSUPP;
 
 	for (cfg = 0; cfg < num_configs; cfg++) {
 		param = pinconf_to_config_param(configs[cfg]);
@@ -435,6 +445,8 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
 	int value, err;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
+	if (!desc->name)
+		return -ENOTSUPP;
 
 	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
 	if (err)
@@ -449,6 +461,10 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
 	const struct mtk_pin_desc *desc;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
+	if (!desc->name) {
+		dev_err(hw->dev, "Failed to set gpio %d\n", gpio);
+		return;
+	}
 
 	mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
 }
@@ -490,6 +506,8 @@ static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
 	u32 debounce;
 
 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
+	if (!desc->name)
+		return -ENOTSUPP;
 
 	if (!hw->eint ||
 	    pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
-- 
2.29.2


  parent reply	other threads:[~2021-08-17  7:46 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-17  7:45 [v2,00/12] Add basic SoC support for mediatek mt7986 Sam Shih
2021-08-17  7:45 ` [v2,01/12] dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC Sam Shih
2021-08-18  1:20   ` Rob Herring
2021-08-17  7:45 ` [v2,02/12] clk: mediatek: add mt7986 clock IDs Sam Shih
2021-08-18  1:20   ` Rob Herring
2021-08-17  7:45 ` [v2,03/12] clk: mediatek: add mt7986 clock support Sam Shih
2021-08-17  7:45 ` Sam Shih [this message]
2021-08-17  7:45 ` [v2,05/12] dt-bindings: pinctrl: update bindings for MT7986 SoC Sam Shih
2021-08-31 19:27   ` Rob Herring
2021-08-17  7:45 ` [v2,06/12] pinctrl: mediatek: add support " Sam Shih
2021-08-17  7:45 ` [v2,07/12] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih
2021-08-17  7:45 ` [v2,08/12] dt-bindings: rng: mediatek: add mt7986 to mtk rng binding Sam Shih
2021-08-17 18:35   ` Rob Herring
2021-08-17  7:45 ` [v2,09/12] dt-bindings: serial: Add compatible for Mediatek MT7986 Sam Shih
2021-08-17  7:45 ` [v2,10/12] dt-bindings: watchdog: " Sam Shih
2021-08-17  7:45 ` [v2,11/12] arm64: dts: mediatek: add mt7986a support Sam Shih
2021-08-17  7:45 ` [v2,12/12] arm64: dts: mediatek: add mt7986b support Sam Shih
     [not found] <20210817074557.30953-5-sam.shih@mediatek.com--annotate>
2021-08-20  7:01 ` [v2, 04/12] pinctrl: mediatek: moore: check if pin_desc is valid before use sean.wang

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