From: Paul Mackerras <paulus@ozlabs.org>
To: Balbir Singh <bsingharora@gmail.com>
Cc: kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org
Subject: Re: [PATCH 05/13] KVM: PPC: Book3S HV: Adapt to new HPTE format on POWER9
Date: Mon, 21 Nov 2016 13:02:01 +1100 [thread overview]
Message-ID: <20161121020201.GB26748@fergus.ozlabs.ibm.com> (raw)
In-Reply-To: <8919b2ab-0702-d1d8-a391-b6c36571a8cf@gmail.com>
On Sat, Nov 19, 2016 at 11:38:40AM +1100, Balbir Singh wrote:
>
>
> On 18/11/16 18:28, Paul Mackerras wrote:
> > This adapts the KVM-HV hashed page table (HPT) code to read and write
> > HPT entries in the new format defined in Power ISA v3.00 on POWER9
> > machines. The new format moves the B (segment size) field from the
> > first doubleword to the second, and trims some bits from the AVA
> > (abbreviated virtual address) and ARPN (abbreviated real page number)
> > fields. As far as possible, the conversion is done when reading or
> > writing the HPT entries, and the rest of the code continues to use
> > the old format.
[snip]
> > @@ -440,6 +442,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
> > {
> > struct kvm *kvm = vcpu->kvm;
> > unsigned long hpte[3], r;
> > + unsigned long hnow_v, hnow_r;
> > __be64 *hptep;
> > unsigned long mmu_seq, psize, pte_size;
> > unsigned long gpa_base, gfn_base;
> > @@ -488,6 +491,10 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
> > unlock_hpte(hptep, hpte[0]);
> > preempt_enable();
> >
> > + if (cpu_has_feature(CPU_FTR_ARCH_300)) {
> > + hpte[0] = hpte_new_to_old_v(hpte[0], hpte[1]);
> > + hpte[1] = hpte_new_to_old_r(hpte[1]);
> > + }
>
> I think we can avoid this, if we avoid the conversion in kvmppc_hpte_hv_fault().
> If we decide not to do this, then gpa will need to use a new mask to extract
> the correct gpa.
Yes, we could store vcpu->arch.pgfault[] in native format, i.e. new
format on P9. That might make the code a bit simpler indeed.
Paul.
next prev parent reply other threads:[~2016-11-21 2:02 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-18 7:28 [PATCH 00/13] KVM: PPC: Support POWER9 guests Paul Mackerras
2016-11-18 7:28 ` [PATCH 01/13] powerpc/64: Add some more SPRs and SPR bits for POWER9 Paul Mackerras
2016-11-18 7:28 ` [PATCH 02/13] powerpc/64: Provide functions for accessing POWER9 partition table Paul Mackerras
2016-11-18 14:27 ` Aneesh Kumar K.V
2016-11-19 4:19 ` Paul Mackerras
2016-11-19 6:35 ` Aneesh Kumar K.V
2016-11-21 2:14 ` Paul Mackerras
2016-11-19 0:45 ` Balbir Singh
2016-11-19 4:23 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 03/13] powerpc/powernv: Define real-mode versions of OPAL XICS accessors Paul Mackerras
2016-11-18 7:28 ` [PATCH 04/13] KVM: PPC: Book3S HV: Don't lose hardware R/C bit updates in H_PROTECT Paul Mackerras
2016-11-18 7:28 ` [PATCH 05/13] KVM: PPC: Book3S HV: Adapt to new HPTE format on POWER9 Paul Mackerras
2016-11-19 0:38 ` Balbir Singh
2016-11-21 2:02 ` Paul Mackerras [this message]
2016-11-18 7:28 ` [PATCH 06/13] KVM: PPC: Book3S HV: Set partition table rather than SDR1 " Paul Mackerras
2016-11-19 1:01 ` Balbir Singh
2016-11-18 7:28 ` [PATCH 07/13] KVM: PPC: Book3S HV: Adjust host/guest context switch for POWER9 Paul Mackerras
2016-11-18 14:35 ` Aneesh Kumar K.V
2016-11-19 4:02 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 08/13] KVM: PPC: Book3S HV: Add new POWER9 guest-accessible SPRs Paul Mackerras
2016-11-18 7:28 ` [PATCH 09/13] KVM: PPC: Book3S HV: Adapt TLB invalidations to work on POWER9 Paul Mackerras
2016-11-18 14:41 ` Aneesh Kumar K.V
2016-11-18 21:57 ` Benjamin Herrenschmidt
2016-11-19 4:14 ` Paul Mackerras
2016-11-19 4:41 ` Benjamin Herrenschmidt
2016-11-19 4:13 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 10/13] KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores " Paul Mackerras
2016-11-18 14:47 ` Aneesh Kumar K.V
2016-11-19 3:53 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 11/13] KVM: PPC: Book3S HV: Use OPAL XICS emulation " Paul Mackerras
2016-11-18 7:28 ` [PATCH 12/13] KVM: PPC: Book3S HV: Use stop instruction rather than nap " Paul Mackerras
2016-11-18 7:28 ` [PATCH 13/13] KVM: PPC: Book3S HV: Treat POWER9 CPU threads as independent subcores Paul Mackerras
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161121020201.GB26748@fergus.ozlabs.ibm.com \
--to=paulus@ozlabs.org \
--cc=bsingharora@gmail.com \
--cc=kvm-ppc@vger.kernel.org \
--cc=kvm@vger.kernel.org \
--cc=linuxppc-dev@ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).