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From: kajoljain <kjain@linux.ibm.com>
To: Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
	mpe@ellerman.id.au, acme@kernel.org, jolsa@kernel.org
Cc: maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org,
	rnsastry@linux.ibm.com
Subject: Re: [V3 0/4] powerpc/perf: Add instruction and data address registers to extended regs
Date: Mon, 11 Oct 2021 18:39:18 +0530	[thread overview]
Message-ID: <f9064648-adba-92f9-08bc-52ad179de357@linux.ibm.com> (raw)
In-Reply-To: <20211007065505.27809-1-atrajeev@linux.vnet.ibm.com>



On 10/7/21 12:25 PM, Athira Rajeev wrote:
> Patch set adds PMU registers namely Sampled Instruction Address Register
> (SIAR) and Sampled Data Address Register (SDAR) as part of extended regs
> in PowerPC. These registers provides the instruction/data address and
> adding these to extended regs helps in debug purposes.
> 
> Patch 1/4 and 2/4 refactors the existing macro definition of
> PERF_REG_PMU_MASK_300 and PERF_REG_PMU_MASK_31 to make it more
> readable.
> Patch 3/4 adds SIAR and SDAR as part of the extended regs mask.
> Patch 4/4 includes perf tools side changes to add the SPRs to
> sample_reg_mask to use with -I? option.
> 
> Changelog:
> Change from v2 -> v3:
> Addressed review comments from Michael Ellerman
> - Fixed the macro definition to use "unsigned long long"
>   which otherwise will cause build error with perf on
>   32-bit.
> - Added Reviewed-by from Daniel Axtens for patch3.
> 
> Change from v1 -> v2:
> Addressed review comments from Michael Ellerman
> - Refactored the perf reg extended mask value macros for
>   PERF_REG_PMU_MASK_300 and PERF_REG_PMU_MASK_31 to
>   make it more readable. Also moved PERF_REG_EXTENDED_MAX
>   along with enum definition similar to PERF_REG_POWERPC_MAX.
> 
> Athira Rajeev (4):
>   powerpc/perf: Refactor the code definition of perf reg extended mask
>   tools/perf: Refactor the code definition of perf reg extended mask in
>     tools side header file
>   powerpc/perf: Expose instruction and data address registers as part of
>     extended regs
>   tools/perf: Add perf tools support to expose instruction and data
>     address registers as part of extended regs

Patch-set looks good to me.

Reviewed-by: Kajol Jain<kjain@linux.ibm.com>

Thanks,
Kajol Jain
> 
>  arch/powerpc/include/uapi/asm/perf_regs.h     | 28 ++++++++++++-------
>  arch/powerpc/perf/perf_regs.c                 |  4 +++
>  .../arch/powerpc/include/uapi/asm/perf_regs.h | 28 ++++++++++++-------
>  tools/perf/arch/powerpc/include/perf_regs.h   |  2 ++
>  tools/perf/arch/powerpc/util/perf_regs.c      |  2 ++
>  5 files changed, 44 insertions(+), 20 deletions(-)
> 

  parent reply	other threads:[~2021-10-11 13:10 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-07  6:55 [V3 0/4] powerpc/perf: Add instruction and data address registers to extended regs Athira Rajeev
2021-10-07  6:55 ` [V3 1/4] powerpc/perf: Refactor the code definition of perf reg extended mask Athira Rajeev
2021-10-07  6:55 ` [V3 2/4] tools/perf: Refactor the code definition of perf reg extended mask in tools side header file Athira Rajeev
2021-10-07  6:55 ` [V3 3/4] powerpc/perf: Expose instruction and data address registers as part of extended regs Athira Rajeev
2021-10-07  6:55 ` [V3 4/4] tools/perf: Add perf tools support to expose " Athira Rajeev
2021-10-11 13:09 ` kajoljain [this message]
2021-10-17 12:32 ` [V3 0/4] powerpc/perf: Add instruction and data address registers to " Michael Ellerman

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