From: "Liang, Kan" <kan.liang@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org,
tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com
Subject: Re: [PATCH V4 07/14] perf/x86/intel: Support hardware TopDown metrics
Date: Mon, 30 Sep 2019 12:17:57 -0400 [thread overview]
Message-ID: <06e16f73-f6af-5019-3d85-bc33740e0c8f@linux.intel.com> (raw)
In-Reply-To: <20190930145321.GF4581@hirez.programming.kicks-ass.net>
On 9/30/2019 10:53 AM, Peter Zijlstra wrote:
>
> After that, I think we can simply do something like:
>
> icl_update_topdown_event(..)
We should call this function in x86_pmu_commit_txn()?
In intel_pmu_read_event(), we just simply return, when TXN_READ is set
and is_topdown_count().
If so, it looks like we need add a per-cpu variable to store the topdown
group events which user tries to read. Then we can update these events
in x86_pmu_commit_txn(). The same method as Power does.
Is my understanding correct?
> {
> int idx = event->hwc.idx;
>
> if (is_metric_idx(idx))
> return;
>
> // must be FIXED_SLOTS
The FIXED_SLOTS may not be in the group.
Thanks,
Kan
>
> /* do teh thing and update SLOTS and METRIC together */
> }
>
> Hmmm?
next prev parent reply other threads:[~2019-09-30 16:18 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-16 13:41 [PATCH V4 00/14] TopDown metrics support for Icelake kan.liang
2019-09-16 13:41 ` [PATCH V4 01/14] perf/x86/intel: Introduce the fourth fixed counter kan.liang
2019-09-16 13:41 ` [PATCH V4 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS kan.liang
2019-09-16 13:41 ` [PATCH V4 03/14] perf/x86/intel: Move BTS index to 47 kan.liang
2019-09-16 13:41 ` [PATCH V4 04/14] perf/x86/intel: Basic support for metrics counters kan.liang
2019-09-16 13:41 ` [PATCH V4 05/14] perf/x86/intel: Fix the name of perf capabilities for perf METRICS kan.liang
2019-09-16 13:41 ` [PATCH V4 06/14] x86/math64: Provide a sane mul_u64_u32_div() implementation for x86_64 kan.liang
2019-09-16 13:41 ` [PATCH V4 07/14] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-09-30 13:06 ` Peter Zijlstra
2019-09-30 14:07 ` Peter Zijlstra
2019-09-30 14:53 ` Peter Zijlstra
2019-09-30 16:17 ` Liang, Kan [this message]
2019-09-30 16:21 ` Peter Zijlstra
2019-09-30 16:45 ` Liang, Kan
2019-09-30 18:18 ` Andi Kleen
2019-09-30 13:36 ` Peter Zijlstra
2019-09-16 13:41 ` [PATCH V4 08/14] perf/x86/intel: Support per thread RDPMC " kan.liang
2019-09-30 15:52 ` Peter Zijlstra
2019-09-30 18:18 ` Liang, Kan
2019-09-16 13:41 ` [PATCH V4 09/14] perf/x86/intel: Export TopDown events for Icelake kan.liang
2019-09-16 13:41 ` [PATCH V4 10/14] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-09-16 13:41 ` [PATCH V4 11/14] perf/x86/intel: Name global status bit in NMI handler kan.liang
2019-09-16 13:41 ` [PATCH V4 12/14] perf/x86: Use event_base_rdpmc for RDPMC userspace support kan.liang
2019-09-16 13:41 ` [PATCH V4 13/14] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-09-16 13:41 ` [PATCH V4 14/14] perf, tools: Add documentation for topdown metrics kan.liang
2019-09-30 12:48 ` [PATCH V4 00/14] TopDown metrics support for Icelake Liang, Kan
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