From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org,
tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com
Subject: Re: [PATCH V4 08/14] perf/x86/intel: Support per thread RDPMC TopDown metrics
Date: Mon, 30 Sep 2019 17:52:44 +0200 [thread overview]
Message-ID: <20190930155244.GP4553@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190916134128.18120-9-kan.liang@linux.intel.com>
On Mon, Sep 16, 2019 at 06:41:22AM -0700, kan.liang@linux.intel.com wrote:
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 71f3086a8adc..7ec0f350d2ac 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -2262,6 +2262,11 @@ static int icl_set_topdown_event_period(struct perf_event *event)
> local64_set(&hwc->period_left, 0);
> }
>
> + if ((hwc->saved_slots) && is_first_topdown_event_in_group(event)) {
> + wrmsrl(MSR_CORE_PERF_FIXED_CTR3, hwc->saved_slots);
> + wrmsrl(MSR_PERF_METRICS, hwc->saved_metric);
> + }
> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> index 61448c19a132..c125068f2e16 100644
> --- a/include/linux/perf_event.h
> +++ b/include/linux/perf_event.h
> @@ -133,6 +133,9 @@ struct hw_perf_event {
>
> struct hw_perf_event_extra extra_reg;
> struct hw_perf_event_extra branch_reg;
> +
> + u64 saved_slots;
> + u64 saved_metric;
> };
> struct { /* software */
> struct hrtimer hrtimer;
Normal counters save their counter value in hwc->period_left, why does
slots need a new word for that?
And since using METRIC means non-sampling, why can't we stick that
saved_metric field in one of the unused sampling fields?
ISTR asking this before...
next prev parent reply other threads:[~2019-09-30 15:52 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-16 13:41 [PATCH V4 00/14] TopDown metrics support for Icelake kan.liang
2019-09-16 13:41 ` [PATCH V4 01/14] perf/x86/intel: Introduce the fourth fixed counter kan.liang
2019-09-16 13:41 ` [PATCH V4 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS kan.liang
2019-09-16 13:41 ` [PATCH V4 03/14] perf/x86/intel: Move BTS index to 47 kan.liang
2019-09-16 13:41 ` [PATCH V4 04/14] perf/x86/intel: Basic support for metrics counters kan.liang
2019-09-16 13:41 ` [PATCH V4 05/14] perf/x86/intel: Fix the name of perf capabilities for perf METRICS kan.liang
2019-09-16 13:41 ` [PATCH V4 06/14] x86/math64: Provide a sane mul_u64_u32_div() implementation for x86_64 kan.liang
2019-09-16 13:41 ` [PATCH V4 07/14] perf/x86/intel: Support hardware TopDown metrics kan.liang
2019-09-30 13:06 ` Peter Zijlstra
2019-09-30 14:07 ` Peter Zijlstra
2019-09-30 14:53 ` Peter Zijlstra
2019-09-30 16:17 ` Liang, Kan
2019-09-30 16:21 ` Peter Zijlstra
2019-09-30 16:45 ` Liang, Kan
2019-09-30 18:18 ` Andi Kleen
2019-09-30 13:36 ` Peter Zijlstra
2019-09-16 13:41 ` [PATCH V4 08/14] perf/x86/intel: Support per thread RDPMC " kan.liang
2019-09-30 15:52 ` Peter Zijlstra [this message]
2019-09-30 18:18 ` Liang, Kan
2019-09-16 13:41 ` [PATCH V4 09/14] perf/x86/intel: Export TopDown events for Icelake kan.liang
2019-09-16 13:41 ` [PATCH V4 10/14] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2019-09-16 13:41 ` [PATCH V4 11/14] perf/x86/intel: Name global status bit in NMI handler kan.liang
2019-09-16 13:41 ` [PATCH V4 12/14] perf/x86: Use event_base_rdpmc for RDPMC userspace support kan.liang
2019-09-16 13:41 ` [PATCH V4 13/14] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2019-09-16 13:41 ` [PATCH V4 14/14] perf, tools: Add documentation for topdown metrics kan.liang
2019-09-30 12:48 ` [PATCH V4 00/14] TopDown metrics support for Icelake Liang, Kan
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