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From: Andi Kleen <andi@firstfloor.org>
To: linux-kernel@vger.kernel.org
Cc: acme@redhat.com, peterz@infradead.org, jolsa@redhat.com,
	eranian@google.com, mingo@kernel.org, namhyung@kernel.org,
	Andi Kleen <ak@linux.intel.com>
Subject: [PATCH 19/32] perf, core: Add generic transaction flags v2
Date: Fri,  9 Nov 2012 17:27:35 -0800	[thread overview]
Message-ID: <1352510868-7911-20-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1352510868-7911-1-git-send-email-andi@firstfloor.org>

From: Andi Kleen <ak@linux.intel.com>

Add a generic qualifier for transaction events, as a new sample
type that returns a flag word. This is particularly useful
for qualifying aborts: to distinguish aborts which happen
due to asynchronous events (like conflicts caused by another
CPU) versus instructions that lead to an abort.

The tuning strategies are very different for those cases,
so it's important to distinguish them easily and early.

Since it's inconvenient and inflexible to filter for this
in the kernel we report all the events out and allow
some post processing in user space.

The flags are based on the Intel TSX events, but should be fairly
generic and mostly applicable to other architectures too. In addition
to various flag words there's also reserved space to report an
program supplied abort code. For TSX this is used to distinguish specific
classes of aborts, like a lock busy abort when doing lock elision.

This adds the perf core glue needed for reporting the new flag word out.

v2: Add MEM/MISC
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
 include/linux/perf_event.h      |    2 ++
 include/uapi/linux/perf_event.h |   26 ++++++++++++++++++++++++--
 kernel/events/core.c            |    6 ++++++
 3 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index c9686c8..c32fba3 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -589,6 +589,7 @@ struct perf_sample_data {
 	struct perf_regs_user		regs_user;
 	u64				stack_user_size;
 	u64				weight;
+	u64				transaction;
 };
 
 static inline void perf_sample_data_init(struct perf_sample_data *data,
@@ -603,6 +604,7 @@ static inline void perf_sample_data_init(struct perf_sample_data *data,
 	data->regs_user.regs = NULL;
 	data->stack_user_size = 0;
 	data->weight = 0;
+	data->transaction = 0;
 }
 
 extern void perf_output_sample(struct perf_output_handle *handle,
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 809a5fd..e7b1a48 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -133,9 +133,9 @@ enum perf_event_sample_format {
 	PERF_SAMPLE_REGS_USER			= 1U << 12,
 	PERF_SAMPLE_STACK_USER			= 1U << 13,
 	PERF_SAMPLE_WEIGHT			= 1U << 14,
+	PERF_SAMPLE_TRANSACTION			= 1U << 15,
 
-	PERF_SAMPLE_MAX = 1U << 15,		/* non-ABI */
-
+	PERF_SAMPLE_MAX = 1U << 16,		/* non-ABI */
 };
 
 /*
@@ -179,6 +179,28 @@ enum perf_sample_regs_abi {
 };
 
 /*
+ * Values for the transaction event qualifier, mostly for abort events.
+ */
+enum {
+	PERF_SAMPLE_TXN_ELISION     = (1 << 0), /* From elision */
+	PERF_SAMPLE_TXN_TRANSACTION = (1 << 1), /* From transaction */
+	PERF_SAMPLE_TXN_SYNC        = (1 << 2), /* Instruction is related */
+	PERF_SAMPLE_TXN_ASYNC       = (1 << 3), /* Instruction not related */
+	PERF_SAMPLE_TXN_RETRY       = (1 << 4), /* Retry possible */
+	PERF_SAMPLE_TXN_CONFLICT    = (1 << 5), /* Conflict abort */
+	PERF_SAMPLE_TXN_CAPACITY    = (1 << 6), /* Capacity abort */
+	PERF_SAMPLE_TXN_MEMORY      = (1 << 7), /* Memory related abort */
+	PERF_SAMPLE_TXN_MISC        = (1 << 8), /* Misc aborts */
+
+	PERF_SAMPLE_TXN_MAX	    = (1 << 9),  /* non-ABI */
+
+	/* bits 24..31 are reserved for the abort code */
+
+	PERF_SAMPLE_TXN_ABORT_MASK  = 0xff000000,
+	PERF_SAMPLE_TXN_ABORT_SHIFT = 24,
+};
+
+/*
  * The format of the data returned by read() on a perf event fd,
  * as specified by attr.read_format:
  *
diff --git a/kernel/events/core.c b/kernel/events/core.c
index d633581..534810d 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -955,6 +955,9 @@ static void perf_event__header_size(struct perf_event *event)
 	if (sample_type & PERF_SAMPLE_WEIGHT)
 		size += sizeof(data->weight);
 
+	if (sample_type & PERF_SAMPLE_TRANSACTION)
+		size += sizeof(data->transaction);
+
 	if (sample_type & PERF_SAMPLE_READ)
 		size += event->read_size;
 
@@ -4086,6 +4089,9 @@ void perf_output_sample(struct perf_output_handle *handle,
 	if (sample_type & PERF_SAMPLE_WEIGHT)
 		perf_output_put(handle, data->weight);
 
+	if (sample_type & PERF_SAMPLE_TRANSACTION)
+		perf_output_put(handle, data->transaction);
+
 	if (sample_type & PERF_SAMPLE_READ)
 		perf_output_read(handle, event);
 
-- 
1.7.7.6


  parent reply	other threads:[~2012-11-10  1:30 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-10  1:27 perf PMU support for Haswell v6 Andi Kleen
2012-11-10  1:27 ` [PATCH 01/32] perf, x86: Add PEBSv2 record support Andi Kleen
2012-11-10  1:27 ` [PATCH 02/32] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 03/32] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2012-11-10  1:27 ` [PATCH 04/32] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 05/32] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v4 Andi Kleen
2012-11-12 12:43   ` Gleb Natapov
2012-11-10  1:27 ` [PATCH 06/32] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2012-11-10  1:27 ` [PATCH 07/32] perf, x86: Support Haswell v4 LBR format Andi Kleen
2012-11-10  1:27 ` [PATCH 08/32] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2012-11-10  1:27 ` [PATCH 09/32] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 10/32] perf, tools: Add abort_tx,no_tx,in_tx branch filter options to perf record -j v3 Andi Kleen
2012-11-10  1:27 ` [PATCH 11/32] perf, tools: Support sorting by intx, abort branch flags Andi Kleen
2012-11-10  1:27 ` [PATCH 12/32] perf, x86: Support full width counting Andi Kleen
2012-11-10  1:27 ` [PATCH 13/32] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2012-11-10  1:27 ` [PATCH 14/32] perf, core: Add a concept of a weightened sample Andi Kleen
2012-11-10  1:27 ` [PATCH 15/32] perf, x86: Support weight samples for PEBS Andi Kleen
2012-11-10  1:27 ` [PATCH 16/32] perf, tools: Add support for weight v3 Andi Kleen
2012-11-10  1:27 ` [PATCH 17/32] perf, tools: Handle XBEGIN like a jump Andi Kleen
2012-11-10  1:27 ` [PATCH 18/32] perf, x86: Support for printing PMU state on spurious PMIs v3 Andi Kleen
2012-11-10  1:27 ` Andi Kleen [this message]
2012-11-10  1:27 ` [PATCH 20/32] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2012-11-10  1:27 ` [PATCH 21/32] perf, tools: Add support for record transaction flags v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 22/32] perf, tools: Point --sort documentation to --help Andi Kleen
2012-11-10  1:27 ` [PATCH 23/32] perf, tools: Add browser support for transaction flags v3 Andi Kleen
2012-11-10  1:27 ` [PATCH 24/32] perf, tools: Add arbitary aliases and support names with - Andi Kleen
2012-11-10  1:27 ` [PATCH 25/32] tools, perf: Add a precise event qualifier Andi Kleen
2012-11-28 15:40   ` Jiri Olsa
2012-11-28 20:37     ` Andi Kleen
2012-11-10  1:27 ` [PATCH 26/32] perf, x86: improve sysfs event mapping with event string Andi Kleen
2012-11-10  1:27 ` [PATCH 27/32] perf, x86: Support CPU specific sysfs events Andi Kleen
2012-11-10  1:27 ` [PATCH 28/32] perf, x86: Add Haswell TSX event aliases v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 29/32] perf, tools: Add perf stat --transaction v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 30/32] perf, x86: Add a Haswell precise instructions event v2 Andi Kleen
2012-11-10  1:27 ` [PATCH 31/32] perf, tools: Default to cpu// for events v3 Andi Kleen
2012-11-28 15:53   ` Jiri Olsa
2012-11-28 19:04     ` Andi Kleen
2012-11-28 19:42       ` Arnaldo Carvalho de Melo
2012-11-10  1:27 ` [PATCH 32/32] perf, tools: List kernel supplied event aliases in perf list v2 Andi Kleen
  -- strict thread matches above, loose matches on Subject: below --
2012-10-31  0:33 perf PMU support for Haswell v5 Andi Kleen
2012-10-31  0:34 ` [PATCH 19/32] perf, core: Add generic transaction flags v2 Andi Kleen

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