[PATCH v3 0/6] arm: Add basic support for Mediatek Cortex-A7 SoCs

[PATCH v3 0/6] arm: Add basic support for Mediatek Cortex-A7 SoCs

[Matthias Brugger]

Third round for the Mediatek patches.

I split up the patch which introduced the basic support for Mediatek devices.
The series contains instead of the one patch:
a patch with dt board file and dtsi, one for the vendor prefix
and one for the documentation of the SoC DT bindings.

---
This patch set adds basic support for the Mediatek Cortex-A7 SoCs.
Support is quite basic, as the only component working up to now are the
timers.

The patch series is build against torvalds/master tree.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Changes for v3:
1. Clocksource timer
- Set cpu_mask_all and irq in clock_event_device
- Use device private structure for driver specific values

2. Timer DT bindings
- Define order of the clock phandles
- Fix typos

3. Basic SoC support
- DTS: set gic to a15-gic
- DTS: order by physical address
- Remove call to dt_init function


Changes for v2:
1. Clocksource timer
- Delete unused parts for sched_clock_source
- Use irq_request instead of setup_irq
- Remove unused SMP parts
- Fix some style issues
- use of_address_to resource and request_mem_region
- delete use of named clock
- select CLKSRC_MMIO in driver Kconfig

2. DT bindings
- delete named clock bindings

3. Basic SoC support
- Clean-up Kconfig
- Add documentation of the SoC compatible property 
- DTS: rename SoC file to mt6589.dts
- DTS: Delete not present cache controller
- DTS: Add missing GICv2 properties
- DTS: Change clock names
- DTS: Add Aquaris5 board

4. Add earlyprintk
- patch droped until serial driver is available

5. Add support for Aquaris5 mobile phone

---

Matthias Brugger (6):
  clocksource: Add support for the Mediatek SoCs
  dt-bindings: add mtk-timer bindings
  vendor-prefixes: add prefix for Mediaktek Inc.
  arm: add basic support for Mediatek MT6589 boards
  dt-bindings: add documentation for Mediatek SoC
  arm: mediatek: add dts for Aquaris5 mobile phone

 .../devicetree/bindings/arm/mediatek-mt65xx.txt    |   8 +
 .../bindings/timer/mediatek,mtk-timer.txt          |  18 ++
 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 arch/arm/Kconfig                                   |   2 +
 arch/arm/Makefile                                  |   1 +
 arch/arm/boot/dts/mt6589-aquaris5.dts              |  25 ++
 arch/arm/boot/dts/mt6589.dtsi                      |  93 ++++++++
 arch/arm/mach-mediatek/Kconfig                     |   6 +
 arch/arm/mach-mediatek/Makefile                    |   1 +
 arch/arm/mach-mediatek/mediatek.c                  |  32 +++
 drivers/clocksource/Kconfig                        |   4 +
 drivers/clocksource/Makefile                       |   1 +
 drivers/clocksource/mtk_timer.c                    | 263 +++++++++++++++++++++
 13 files changed, 455 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek-mt65xx.txt
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
 create mode 100644 arch/arm/boot/dts/mt6589-aquaris5.dts
 create mode 100644 arch/arm/boot/dts/mt6589.dtsi
 create mode 100644 arch/arm/mach-mediatek/Kconfig
 create mode 100644 arch/arm/mach-mediatek/Makefile
 create mode 100644 arch/arm/mach-mediatek/mediatek.c
 create mode 100644 drivers/clocksource/mtk_timer.c

-- 
1.8.1.2

[PATCH v3 1/6] clocksource: Add support for the Mediatek SoCs

[Matthias Brugger]

This patch adds a clock source and clock event for the timer found
on the Mediatek SoCs.

The Mediatek General Porpose Timer block provides five 32 bit timers and
one 64 bit timer.

Two 32 bit timers are used:
TIMER1: clock events supporting periodic and oneshot events
TIMER2: clock source configured as a free running counter

The General Porpose Timer block can be run with two clocks. A 13 MHz system
clock and the RTC clock running at 32 KHz. This implementation uses the system
clock.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 drivers/clocksource/Kconfig     |   4 +
 drivers/clocksource/Makefile    |   1 +
 drivers/clocksource/mtk_timer.c | 263 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 268 insertions(+)
 create mode 100644 drivers/clocksource/mtk_timer.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 96918e1..1f73740 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -144,6 +144,10 @@ config VF_PIT_TIMER
 config SYS_SUPPORTS_SH_CMT
         bool
 
+config MTK_TIMER
+	select CLKSRC_MMIO
+	bool
+
 config SYS_SUPPORTS_SH_MTU2
         bool
 
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 98cb6c5..619d302 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CLKSRC_EXYNOS_MCT)	+= exynos_mct.o
 obj-$(CONFIG_CLKSRC_SAMSUNG_PWM)	+= samsung_pwm_timer.o
 obj-$(CONFIG_VF_PIT_TIMER)	+= vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)	+= qcom-timer.o
+obj-$(CONFIG_MTK_TIMER)		+= mtk_timer.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER)		+= arm_global_timer.o
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
new file mode 100644
index 0000000..4b88065
--- /dev/null
+++ b/drivers/clocksource/mtk_timer.c
@@ -0,0 +1,263 @@
+/*
+ * Mediatek SoCs General-Purpose Timer handling.
+ *
+ * Copyright (C) 2014 Matthias Brugger
+ *
+ * Matthias Brugger <matthias.bgg@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/slab.h>
+
+#define GPT_IRQ_EN_REG		0x00
+#define GPT_IRQ_ENABLE(val)	BIT(val-1)
+#define GPT_IRQ_ST_REG		0x04
+#define GPT_IRQ_ACK_REG		0x08
+#define GPT_IRQ_ACK(val)	BIT(val-1)
+
+#define TIMER_CTRL_REG(val)	(0x10 * val)
+#define TIMER_CTRL_OP(val)	(((val) & 0x3) << 4)
+#define TIMER_CTRL_OP_ONESHOT	(0)
+#define TIMER_CTRL_OP_REPEAT	(1)
+#define TIMER_CTRL_OP_KEEPGO	(2)
+#define TIMER_CTRL_OP_FREERUN	(3)
+#define TIMER_CTRL_CLEAR	(2)
+#define TIMER_CTRL_ENABLE	(1)
+#define TIMER_CTRL_DISABLE	(0)
+
+#define TIMER_CLK_REG(val)	(0x04 + (0x10 * val))
+#define TIMER_CLK_SRC(val)	(((val) & 0x1) << 4)
+#define TIMER_CLK_SRC_SYS13M	(0)
+#define TIMER_CLK_SRC_RTC32K	(1)
+#define TIMER_CLK_DIV1		(0x0)
+#define TIMER_CLK_DIV2		(0x1)
+#define TIMER_CLK_DIV3		(0x2)
+#define TIMER_CLK_DIV4		(0x3)
+#define TIMER_CLK_DIV5		(0x4)
+#define TIMER_CLK_DIV6		(0x5)
+#define TIMER_CLK_DIV7		(0x6)
+#define TIMER_CLK_DIV8		(0x7)
+#define TIMER_CLK_DIV9		(0x8)
+#define TIMER_CLK_DIV10		(0x9)
+#define TIMER_CLK_DIV11		(0xA)
+#define TIMER_CLK_DIV12		(0xB)
+#define TIMER_CLK_DIV13		(0xC)
+#define TIMER_CLK_DIV16		(0xD)
+#define TIMER_CLK_DIV32		(0xE)
+#define TIMER_CLK_DIV64		(0xF)
+
+#define TIMER_CNT_REG(val)	(0x08 + (0x10 * val))
+#define TIMER_CMP_REG(val)	(0x0C + (0x10 * val))
+
+#define GPT_CLK_EVT	1
+#define GPT_CLK_SRC	2
+
+
+
+struct mtk_clock_event_device {
+	void __iomem *gpt_base;
+	u32 ticks_per_jiffy;
+	struct clock_event_device dev;
+};
+
+static inline struct mtk_clock_event_device *to_mtk_clk(
+				struct clock_event_device *c)
+{
+	return container_of(c, struct mtk_clock_event_device, dev);
+}
+
+static void mtk_clkevt_time_stop(struct mtk_clock_event_device *evt, u8 timer)
+{
+	u32 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
+	writel(val & ~TIMER_CTRL_ENABLE, evt->gpt_base +
+			TIMER_CTRL_REG(timer));
+}
+
+static void mtk_clkevt_time_setup(struct mtk_clock_event_device *evt,
+				unsigned long delay, u8 timer)
+{
+	writel(delay, evt->gpt_base + TIMER_CMP_REG(timer));
+}
+
+static void mtk_clkevt_time_start(struct mtk_clock_event_device *evt,
+		bool periodic, u8 timer)
+{
+	u32 val;
+
+	/* Acknowledge interrupt */
+	writel(GPT_IRQ_ACK(timer), evt->gpt_base + GPT_IRQ_ACK_REG);
+
+	val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
+
+	/* Clear 2 bit timer operation mode field */
+	val &= ~TIMER_CTRL_OP(0x3);
+
+	if (periodic)
+		val |= TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT);
+	else
+		val |= TIMER_CTRL_OP(TIMER_CTRL_OP_ONESHOT);
+
+	writel(val | TIMER_CTRL_ENABLE | TIMER_CTRL_CLEAR,
+	       evt->gpt_base + TIMER_CTRL_REG(timer));
+}
+
+static void mtk_clkevt_mode(enum clock_event_mode mode,
+				struct clock_event_device *clk)
+{
+	struct mtk_clock_event_device *evt = to_mtk_clk(clk);
+
+	mtk_clkevt_time_stop(evt, GPT_CLK_EVT);
+
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		mtk_clkevt_time_setup(evt, evt->ticks_per_jiffy, GPT_CLK_EVT);
+		mtk_clkevt_time_start(evt, true, GPT_CLK_EVT);
+		break;
+	case CLOCK_EVT_MODE_ONESHOT:
+		mtk_clkevt_time_start(evt, false, GPT_CLK_EVT);
+		break;
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	default:
+		/* No more interrupts will occur as source is disabled */
+		break;
+	}
+}
+
+static int mtk_clkevt_next_event(unsigned long event,
+				   struct clock_event_device *clk)
+{
+	struct mtk_clock_event_device *evt = to_mtk_clk(clk);
+
+	mtk_clkevt_time_stop(evt, GPT_CLK_EVT);
+	mtk_clkevt_time_setup(evt, event, GPT_CLK_EVT);
+	mtk_clkevt_time_start(evt, false, GPT_CLK_EVT);
+
+	return 0;
+}
+
+static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
+{
+	struct mtk_clock_event_device *evt = dev_id;
+
+	/* Acknowledge timer0 irq */
+	writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
+	evt->dev.event_handler(&evt->dev);
+
+	return IRQ_HANDLED;
+}
+
+static void mtk_timer_global_reset(struct mtk_clock_event_device *evt)
+{
+	/* Disable all interrupts */
+	writel(0x0, evt->gpt_base + GPT_IRQ_EN_REG);
+	/* Acknowledge all interrupts */
+	writel(0x3f, evt->gpt_base + GPT_IRQ_ACK_REG);
+}
+
+static void mtk_timer_reset(struct mtk_clock_event_device *evt, u8 timer)
+{
+	writel(TIMER_CTRL_CLEAR | TIMER_CTRL_DISABLE,
+		evt->gpt_base + TIMER_CTRL_REG(timer));
+	writel(0x0, evt->gpt_base + TIMER_CMP_REG(timer));
+}
+
+static void __init mtk_timer_init(struct device_node *node)
+{
+	struct mtk_clock_event_device *evt;
+	struct resource res;
+	unsigned long rate = 0;
+	struct clk *clk;
+	int ret;
+	u32 val;
+
+	evt = kzalloc(sizeof(*evt), GFP_KERNEL);
+	if (!evt)
+		panic("Can't allocate mtk clock event driver struct");
+
+	evt->dev.name = "mtk_tick";
+	evt->dev.rating = 300;
+	evt->dev.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+	evt->dev.set_mode = mtk_clkevt_mode;
+	evt->dev.set_next_event = mtk_clkevt_next_event;
+	evt->dev.cpumask = cpu_all_mask;
+
+	if (of_address_to_resource(node, 0, &res))
+		panic("Failed to parse resource\n");
+
+	if (!request_mem_region(res.start, resource_size(&res), "mtk-timer"))
+		panic("Registers are a busy IO resource");
+
+	evt->gpt_base = ioremap(res.start, resource_size(&res));
+	if (!evt->gpt_base)
+		panic("Can't map registers");
+
+	evt->dev.irq = irq_of_parse_and_map(node, 0);
+	if (evt->dev.irq <= 0)
+		panic("Can't parse IRQ");
+
+	clk = of_clk_get(node, 0);
+	if (IS_ERR(clk))
+		panic("Can't get timer clock");
+
+	clk_prepare_enable(clk);
+	rate = clk_get_rate(clk);
+
+	mtk_timer_global_reset(evt);
+
+	/* Configure clock source */
+	mtk_timer_reset(evt, GPT_CLK_SRC);
+
+	writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
+			evt->gpt_base + TIMER_CLK_REG(GPT_CLK_SRC));
+
+	writel(TIMER_CTRL_OP(TIMER_CTRL_OP_FREERUN) | TIMER_CTRL_ENABLE,
+			evt->gpt_base + TIMER_CTRL_REG(GPT_CLK_SRC));
+
+	clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
+			node->name, rate, 300, 32, clocksource_mmio_readl_up);
+
+	evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
+
+	/* Configure clock event */
+	mtk_timer_reset(evt, GPT_CLK_EVT);
+
+	writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
+			evt->gpt_base + TIMER_CLK_REG(GPT_CLK_EVT));
+	writel(0, evt->gpt_base + TIMER_CMP_REG(GPT_CLK_EVT));
+
+	writel(TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT) | TIMER_CTRL_ENABLE,
+			evt->gpt_base + TIMER_CTRL_REG(GPT_CLK_EVT));
+
+	ret = request_irq(evt->dev.irq, mtk_timer_interrupt,
+			IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt);
+	if (ret)
+		pr_warn("failed to setup irq %d\n", evt->dev.irq);
+
+	/* Enable timer0 interrupt */
+	val = readl(evt->gpt_base + GPT_IRQ_EN_REG);
+	writel(val | GPT_IRQ_ENABLE(GPT_CLK_EVT),
+			evt->gpt_base + GPT_IRQ_EN_REG);
+
+	clockevents_config_and_register(&evt->dev, rate, 0x3,
+					0xffffffff);
+}
+CLOCKSOURCE_OF_DECLARE(mtk_mt6589, "mediatek,mtk6589-timer", mtk_timer_init);
+
-- 
1.8.1.2

[PATCH v3 2/6] dt-bindings: add mtk-timer bindings

[Matthias Brugger]

Add binding documentation for the General Porpose Timer driver of
the Mediatek SoCs.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 .../devicetree/bindings/timer/mediatek,mtk-timer.txt   | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
new file mode 100644
index 0000000..d0f2df3
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
@@ -0,0 +1,18 @@
+Mediatek MT6589, MT6577 and MT6572 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mtk6589-timer"
+- reg: Should contain location and length for timers register.
+- clocks: phandle to the clock source; the first refers to a 13 MHz fixed
+		system clock and the second handle to a 32 KHz fixed RTC
+		clock.
+
+Examples:
+
+	timer {
+		compatible = "mediatek,mtk6589-timer";
+		reg = <0x10008000 0x80>;
+		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&system_clk>, <&rtc_clk>;
+	};
-- 
1.8.1.2

[PATCH v3 3/6] vendor-prefixes: add prefix for Mediaktek Inc.

[Matthias Brugger]

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index abc3080..73f9e4c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -75,6 +75,7 @@ linux	Linux-specific binding
 lsi	LSI Corp. (LSI Logic)
 marvell	Marvell Technology Group Ltd.
 maxim	Maxim Integrated Products
+mediatek	MediaTek Inc.
 microchip	Microchip Technology Inc.
 mosaixtech	Mosaix Technologies, Inc.
 moxa	Moxa
-- 
1.8.1.2

[PATCH v3 4/6] arm: add basic support for Mediatek MT6589 boards

[Matthias Brugger]

This adds a generic devicetree board file and a dtsi for boards
based on MT6589 SoCs from Mediatek.

Apart from the generic parts (gic, clocks) the only component
currently supported are the timers.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 arch/arm/Kconfig                  |  2 +
 arch/arm/Makefile                 |  1 +
 arch/arm/boot/dts/mt6589.dtsi     | 93 +++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-mediatek/Kconfig    |  6 +++
 arch/arm/mach-mediatek/Makefile   |  1 +
 arch/arm/mach-mediatek/mediatek.c | 32 ++++++++++++++
 6 files changed, 135 insertions(+)
 create mode 100644 arch/arm/boot/dts/mt6589.dtsi
 create mode 100644 arch/arm/mach-mediatek/Kconfig
 create mode 100644 arch/arm/mach-mediatek/Makefile
 create mode 100644 arch/arm/mach-mediatek/mediatek.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index db3c541..0fc8acd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -997,6 +997,8 @@ source "arch/arm/mach-mv78xx0/Kconfig"
 
 source "arch/arm/mach-imx/Kconfig"
 
+source "arch/arm/mach-mediatek/Kconfig"
+
 source "arch/arm/mach-mxs/Kconfig"
 
 source "arch/arm/mach-netx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 41c1931..8ce9774 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -170,6 +170,7 @@ machine-$(CONFIG_ARCH_MSM)		+= msm
 machine-$(CONFIG_ARCH_MV78XX0)		+= mv78xx0
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
 machine-$(CONFIG_ARCH_MXC)		+= imx
+machine-$(CONFIG_ARCH_MEDIATEK)		+= mediatek
 machine-$(CONFIG_ARCH_MXS)		+= mxs
 machine-$(CONFIG_ARCH_NETX)		+= netx
 machine-$(CONFIG_ARCH_NOMADIK)		+= nomadik
diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
new file mode 100644
index 0000000..ab554e8
--- /dev/null
+++ b/arch/arm/boot/dts/mt6589.dtsi
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <matthias.bgg@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "mediatek,mt6589";
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x0>;
+		};
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x1>;
+		};
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x2>;
+		};
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x3>;
+		};
+
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		dummy13m: dummy13m {
+			compatible = "fixed-clock";
+			clock-frequency = <13000000>;
+			#clock-cells = <0>;
+		};
+
+		dummy32k: dummy32k {
+			compatible = "fixed-clock";
+			clock-frequency = <32000>;
+			#clock-cells = <0>;
+		};
+	};
+
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		clock-ranges;
+		ranges;
+
+		timer: timer@10008000 {
+			compatible = "mediatek,mtk6589-timer";
+			reg = <0x10008000 0x80>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&dummy13m>, <&dummy32k>;
+		};
+
+		gic: interrupt-controller@10212000 {
+			compatible = "arm,cortex-a15-gic";
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			reg = <0x10211000 0x1000>,
+			      <0x10212000 0x1000>,
+			      <0x10214000 0x2000>,
+			      <0x10216000 0x2000>;
+		};
+	};
+};
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
new file mode 100644
index 0000000..2c043a2
--- /dev/null
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -0,0 +1,6 @@
+config ARCH_MEDIATEK
+	bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
+	select ARM_GIC
+	select MTK_TIMER
+	help
+	  Support for Mediatek Cortex-A7 Quad-Core-SoC MT6589.
diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
new file mode 100644
index 0000000..43e619f
--- /dev/null
+++ b/arch/arm/mach-mediatek/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
new file mode 100644
index 0000000..73dfb05
--- /dev/null
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -0,0 +1,32 @@
+/*
+ * Device Tree support for Mediatek SoCs
+ *
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <matthias.bgg@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <linux/irqchip.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static const char * const mediatek_board_dt_compat[] = {
+	"mediatek,mt6589",
+	NULL,
+};
+
+DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
+	.dt_compat	= mediatek_board_dt_compat,
+MACHINE_END
-- 
1.8.1.2

[PATCH v3 5/6] dt-bindings: add documentation for Mediatek SoC

[Matthias Brugger]

This adds a DT binding documentation for the MT6589 SoC from Mediatek.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 Documentation/devicetree/bindings/arm/mediatek-mt65xx.txt | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek-mt65xx.txt

diff --git a/Documentation/devicetree/bindings/arm/mediatek-mt65xx.txt b/Documentation/devicetree/bindings/arm/mediatek-mt65xx.txt
new file mode 100644
index 0000000..d6ac71f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek-mt65xx.txt
@@ -0,0 +1,8 @@
+Mediatek MT6589 Platforms Device Tree Bindings
+
+Boards with a SoC of the Mediatek MT6589 shall have the following property:
+
+Required root node property:
+
+compatible: must contain "mediatek,mt6589"
+
-- 
1.8.1.2

[PATCH v3 6/6] arm: mediatek: add dts for Aquaris5 mobile phone

[Matthias Brugger]

The Aquaris5 is a mobile phone based on the MT6589 SoC.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 arch/arm/boot/dts/mt6589-aquaris5.dts | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 arch/arm/boot/dts/mt6589-aquaris5.dts

diff --git a/arch/arm/boot/dts/mt6589-aquaris5.dts b/arch/arm/boot/dts/mt6589-aquaris5.dts
new file mode 100644
index 0000000..443b446
--- /dev/null
+++ b/arch/arm/boot/dts/mt6589-aquaris5.dts
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <matthias.bgg@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+#include "mt6589.dtsi"
+
+/ {
+	model = "bq Aquaris5";
+
+	memory {
+		reg = <0x80000000 0x40000000>;
+	};
+};
-- 
1.8.1.2

Re: [PATCH v3 1/6] clocksource: Add support for the Mediatek SoCs

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 8680 bytes --]

On Tue, May 13, 2014 at 01:49:25AM +0200, Matthias Brugger wrote:
> This patch adds a clock source and clock event for the timer found
> on the Mediatek SoCs.
> 
> The Mediatek General Porpose Timer block provides five 32 bit timers and
> one 64 bit timer.
> 
> Two 32 bit timers are used:
> TIMER1: clock events supporting periodic and oneshot events
> TIMER2: clock source configured as a free running counter
> 
> The General Porpose Timer block can be run with two clocks. A 13 MHz system
> clock and the RTC clock running at 32 KHz. This implementation uses the system
> clock.
> 
> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
>  drivers/clocksource/Kconfig     |   4 +
>  drivers/clocksource/Makefile    |   1 +
>  drivers/clocksource/mtk_timer.c | 263 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 268 insertions(+)
>  create mode 100644 drivers/clocksource/mtk_timer.c
> 
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 96918e1..1f73740 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -144,6 +144,10 @@ config VF_PIT_TIMER
>  config SYS_SUPPORTS_SH_CMT
>          bool
>  
> +config MTK_TIMER
> +	select CLKSRC_MMIO
> +	bool
> +
>  config SYS_SUPPORTS_SH_MTU2
>          bool
>  
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 98cb6c5..619d302 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -33,6 +33,7 @@ obj-$(CONFIG_CLKSRC_EXYNOS_MCT)	+= exynos_mct.o
>  obj-$(CONFIG_CLKSRC_SAMSUNG_PWM)	+= samsung_pwm_timer.o
>  obj-$(CONFIG_VF_PIT_TIMER)	+= vf_pit_timer.o
>  obj-$(CONFIG_CLKSRC_QCOM)	+= qcom-timer.o
> +obj-$(CONFIG_MTK_TIMER)		+= mtk_timer.o
>  
>  obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
>  obj-$(CONFIG_ARM_GLOBAL_TIMER)		+= arm_global_timer.o
> diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
> new file mode 100644
> index 0000000..4b88065
> --- /dev/null
> +++ b/drivers/clocksource/mtk_timer.c
> @@ -0,0 +1,263 @@
> +/*
> + * Mediatek SoCs General-Purpose Timer handling.
> + *
> + * Copyright (C) 2014 Matthias Brugger
> + *
> + * Matthias Brugger <matthias.bgg@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clockchips.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/irqreturn.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/slab.h>
> +
> +#define GPT_IRQ_EN_REG		0x00
> +#define GPT_IRQ_ENABLE(val)	BIT(val-1)
> +#define GPT_IRQ_ST_REG		0x04
> +#define GPT_IRQ_ACK_REG		0x08
> +#define GPT_IRQ_ACK(val)	BIT(val-1)
> +
> +#define TIMER_CTRL_REG(val)	(0x10 * val)
> +#define TIMER_CTRL_OP(val)	(((val) & 0x3) << 4)
> +#define TIMER_CTRL_OP_ONESHOT	(0)
> +#define TIMER_CTRL_OP_REPEAT	(1)
> +#define TIMER_CTRL_OP_KEEPGO	(2)
> +#define TIMER_CTRL_OP_FREERUN	(3)
> +#define TIMER_CTRL_CLEAR	(2)
> +#define TIMER_CTRL_ENABLE	(1)
> +#define TIMER_CTRL_DISABLE	(0)
> +
> +#define TIMER_CLK_REG(val)	(0x04 + (0x10 * val))
> +#define TIMER_CLK_SRC(val)	(((val) & 0x1) << 4)
> +#define TIMER_CLK_SRC_SYS13M	(0)
> +#define TIMER_CLK_SRC_RTC32K	(1)
> +#define TIMER_CLK_DIV1		(0x0)
> +#define TIMER_CLK_DIV2		(0x1)
> +#define TIMER_CLK_DIV3		(0x2)
> +#define TIMER_CLK_DIV4		(0x3)
> +#define TIMER_CLK_DIV5		(0x4)
> +#define TIMER_CLK_DIV6		(0x5)
> +#define TIMER_CLK_DIV7		(0x6)
> +#define TIMER_CLK_DIV8		(0x7)
> +#define TIMER_CLK_DIV9		(0x8)
> +#define TIMER_CLK_DIV10		(0x9)
> +#define TIMER_CLK_DIV11		(0xA)
> +#define TIMER_CLK_DIV12		(0xB)
> +#define TIMER_CLK_DIV13		(0xC)
> +#define TIMER_CLK_DIV16		(0xD)
> +#define TIMER_CLK_DIV32		(0xE)
> +#define TIMER_CLK_DIV64		(0xF)
> +
> +#define TIMER_CNT_REG(val)	(0x08 + (0x10 * val))
> +#define TIMER_CMP_REG(val)	(0x0C + (0x10 * val))
> +
> +#define GPT_CLK_EVT	1
> +#define GPT_CLK_SRC	2
> +
> +
> +
> +struct mtk_clock_event_device {
> +	void __iomem *gpt_base;
> +	u32 ticks_per_jiffy;
> +	struct clock_event_device dev;
> +};
> +
> +static inline struct mtk_clock_event_device *to_mtk_clk(
> +				struct clock_event_device *c)
> +{
> +	return container_of(c, struct mtk_clock_event_device, dev);
> +}
> +
> +static void mtk_clkevt_time_stop(struct mtk_clock_event_device *evt, u8 timer)
> +{
> +	u32 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
> +	writel(val & ~TIMER_CTRL_ENABLE, evt->gpt_base +
> +			TIMER_CTRL_REG(timer));
> +}
> +
> +static void mtk_clkevt_time_setup(struct mtk_clock_event_device *evt,
> +				unsigned long delay, u8 timer)
> +{
> +	writel(delay, evt->gpt_base + TIMER_CMP_REG(timer));
> +}
> +
> +static void mtk_clkevt_time_start(struct mtk_clock_event_device *evt,
> +		bool periodic, u8 timer)
> +{
> +	u32 val;
> +
> +	/* Acknowledge interrupt */
> +	writel(GPT_IRQ_ACK(timer), evt->gpt_base + GPT_IRQ_ACK_REG);
> +
> +	val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
> +
> +	/* Clear 2 bit timer operation mode field */
> +	val &= ~TIMER_CTRL_OP(0x3);
> +
> +	if (periodic)
> +		val |= TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT);
> +	else
> +		val |= TIMER_CTRL_OP(TIMER_CTRL_OP_ONESHOT);
> +
> +	writel(val | TIMER_CTRL_ENABLE | TIMER_CTRL_CLEAR,
> +	       evt->gpt_base + TIMER_CTRL_REG(timer));
> +}
> +
> +static void mtk_clkevt_mode(enum clock_event_mode mode,
> +				struct clock_event_device *clk)
> +{
> +	struct mtk_clock_event_device *evt = to_mtk_clk(clk);
> +
> +	mtk_clkevt_time_stop(evt, GPT_CLK_EVT);
> +
> +	switch (mode) {
> +	case CLOCK_EVT_MODE_PERIODIC:
> +		mtk_clkevt_time_setup(evt, evt->ticks_per_jiffy, GPT_CLK_EVT);
> +		mtk_clkevt_time_start(evt, true, GPT_CLK_EVT);
> +		break;
> +	case CLOCK_EVT_MODE_ONESHOT:
> +		mtk_clkevt_time_start(evt, false, GPT_CLK_EVT);
> +		break;
> +	case CLOCK_EVT_MODE_UNUSED:
> +	case CLOCK_EVT_MODE_SHUTDOWN:
> +	default:
> +		/* No more interrupts will occur as source is disabled */
> +		break;
> +	}
> +}
> +
> +static int mtk_clkevt_next_event(unsigned long event,
> +				   struct clock_event_device *clk)
> +{
> +	struct mtk_clock_event_device *evt = to_mtk_clk(clk);
> +
> +	mtk_clkevt_time_stop(evt, GPT_CLK_EVT);
> +	mtk_clkevt_time_setup(evt, event, GPT_CLK_EVT);
> +	mtk_clkevt_time_start(evt, false, GPT_CLK_EVT);
> +
> +	return 0;
> +}
> +
> +static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
> +{
> +	struct mtk_clock_event_device *evt = dev_id;
> +
> +	/* Acknowledge timer0 irq */
> +	writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
> +	evt->dev.event_handler(&evt->dev);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static void mtk_timer_global_reset(struct mtk_clock_event_device *evt)
> +{
> +	/* Disable all interrupts */
> +	writel(0x0, evt->gpt_base + GPT_IRQ_EN_REG);
> +	/* Acknowledge all interrupts */
> +	writel(0x3f, evt->gpt_base + GPT_IRQ_ACK_REG);
> +}
> +
> +static void mtk_timer_reset(struct mtk_clock_event_device *evt, u8 timer)
> +{
> +	writel(TIMER_CTRL_CLEAR | TIMER_CTRL_DISABLE,
> +		evt->gpt_base + TIMER_CTRL_REG(timer));
> +	writel(0x0, evt->gpt_base + TIMER_CMP_REG(timer));
> +}
> +
> +static void __init mtk_timer_init(struct device_node *node)
> +{
> +	struct mtk_clock_event_device *evt;
> +	struct resource res;
> +	unsigned long rate = 0;
> +	struct clk *clk;
> +	int ret;
> +	u32 val;
> +
> +	evt = kzalloc(sizeof(*evt), GFP_KERNEL);
> +	if (!evt)
> +		panic("Can't allocate mtk clock event driver struct");
> +
> +	evt->dev.name = "mtk_tick";
> +	evt->dev.rating = 300;
> +	evt->dev.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
> +	evt->dev.set_mode = mtk_clkevt_mode;
> +	evt->dev.set_next_event = mtk_clkevt_next_event;
> +	evt->dev.cpumask = cpu_all_mask;

cpu_possible_mask would probably be a better fit. And you still forgot
to set the irq field of this struct.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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Re: [PATCH v3 2/6] dt-bindings: add mtk-timer bindings

[Sören Brinkmann]

Hi Matthias,

On Tue, 2014-05-13 at 01:49AM +0200, Matthias Brugger wrote:
> Add binding documentation for the General Porpose Timer driver of
> the Mediatek SoCs.
> 
> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
>  .../devicetree/bindings/timer/mediatek,mtk-timer.txt   | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
> new file mode 100644
> index 0000000..d0f2df3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
> @@ -0,0 +1,18 @@
> +Mediatek MT6589, MT6577 and MT6572 Timers
> +---------------------------------------
> +
> +Required properties:
> +- compatible: Should be "mediatek,mtk6589-timer"
> +- reg: Should contain location and length for timers register.
> +- clocks: phandle to the clock source; the first refers to a 13 MHz fixed
> +		system clock and the second handle to a 32 KHz fixed RTC
> +		clock.

Are these frequencies mandatory to the timer or an implementation
detail of the SOC you're working with? I suspect, it might be possible
to see the same timer in a different SOC implementation with different
frequencies? In that case - or probably in general - the frequencies
should not be part of the binding, IMHO.

> +
> +Examples:
> +
> +	timer {
> +		compatible = "mediatek,mtk6589-timer";
> +		reg = <0x10008000 0x80>;
> +		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
> +		clocks = <&system_clk>, <&rtc_clk>;

Might be just my personal preference, but you could also add the clock-names
property which would relax the ordering requirement a bit and would
clearly  identify the IP's clocks.

	Sören

Re: [PATCH v3 4/6] arm: add basic support for Mediatek MT6589 boards

[Stephen Boyd]

On 05/13, Matthias Brugger wrote:
> diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
> new file mode 100644
> index 0000000..73dfb05
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/mediatek.c
> @@ -0,0 +1,32 @@
> +/*
> + * Device Tree support for Mediatek SoCs
> + *
> + * Copyright (c) 2014 MundoReader S.L.
> + * Author: Matthias Brugger <matthias.bgg@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/of_platform.h>
> +#include <linux/irqchip.h>
> +#include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> +
> +static const char * const mediatek_board_dt_compat[] = {

__initconst?

> +	"mediatek,mt6589",
> +	NULL,
> +};
> +
> +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
> +	.dt_compat	= mediatek_board_dt_compat,
> +MACHINE_END

You shouldn't need this file at all if the platform is part of
the multi-platform kernel.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [PATCH v3 4/6] arm: add basic support for Mediatek MT6589 boards

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 2144 bytes --]

Hi Stephen,

On Tue, May 13, 2014 at 03:47:32PM -0700, Stephen Boyd wrote:
> On 05/13, Matthias Brugger wrote:
> > diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
> > new file mode 100644
> > index 0000000..73dfb05
> > --- /dev/null
> > +++ b/arch/arm/mach-mediatek/mediatek.c
> > @@ -0,0 +1,32 @@
> > +/*
> > + * Device Tree support for Mediatek SoCs
> > + *
> > + * Copyright (c) 2014 MundoReader S.L.
> > + * Author: Matthias Brugger <matthias.bgg@gmail.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <linux/kernel.h>
> > +#include <linux/init.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/irqchip.h>
> > +#include <asm/mach/arch.h>
> > +#include <asm/mach/map.h>
> > +
> > +static const char * const mediatek_board_dt_compat[] = {
> 
> __initconst?
> 
> > +	"mediatek,mt6589",
> > +	NULL,
> > +};
> > +
> > +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
> > +	.dt_compat	= mediatek_board_dt_compat,
> > +MACHINE_END
> 
> You shouldn't need this file at all if the platform is part of
> the multi-platform kernel.

From a technical point of view, you don't. But it's interesting to
keep it mostly for two things:
  - You get to see the platform name in /proc/cpuinfo
  - If you ever need to add platform quirks, it's already there

We had a similar discussion two weeks ago for mach-sunxi with Olof and
Arnd, and ended up keeping this minimal machine.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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Re: [PATCH v3 4/6] arm: add basic support for Mediatek MT6589 boards

[Stephen Boyd]

On 05/14, Maxime Ripard wrote:
> On Tue, May 13, 2014 at 03:47:32PM -0700, Stephen Boyd wrote:
> > On 05/13, Matthias Brugger wrote:
> > > +	"mediatek,mt6589",
> > > +	NULL,
> > > +};
> > > +
> > > +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
> > > +	.dt_compat	= mediatek_board_dt_compat,
> > > +MACHINE_END
> > 
> > You shouldn't need this file at all if the platform is part of
> > the multi-platform kernel.
> 
> From a technical point of view, you don't. But it's interesting to
> keep it mostly for two things:
>   - You get to see the platform name in /proc/cpuinfo
>   - If you ever need to add platform quirks, it's already there
> 
> We had a similar discussion two weeks ago for mach-sunxi with Olof and
> Arnd, and ended up keeping this minimal machine.
> 

It looks like it's only useful to make /proc/cpuinfo have the
platform name because it really isn't that hard to add this file
if we need to add platform quirks. The downside is we have to
keep adding compatibles when we support new SoCs.

This all leads back to the patch from Rob that removes the .name
field from the DT based machine descriptor[1]. I'm not sure that
thread ever resolved but it looked like a step in the right
direction. At least it matches what arm64 (and what looks like
mips) are doing. The concern there was finding which machine
descriptor was used for the init path. Perhaps we should only use
of_flat_dt_get_machine_name() for the generic machine descriptor
so platforms that are using their own machine descriptor get
their .name field printed and they know that their descriptor was
used (assuming the .name field is unique) but the platforms using
the generic descriptor would get more meaningful information and
we wouldn't need to have these skeleton machine descriptors.

[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/277536

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [PATCH v3 4/6] arm: add basic support for Mediatek MT6589 boards

[Arnd Bergmann]

On Wednesday 14 May 2014 14:26:12 Stephen Boyd wrote:
> On 05/14, Maxime Ripard wrote:
> > On Tue, May 13, 2014 at 03:47:32PM -0700, Stephen Boyd wrote:
> > > On 05/13, Matthias Brugger wrote:
> > > > +	"mediatek,mt6589",
> > > > +	NULL,
> > > > +};
> > > > +
> > > > +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
> > > > +	.dt_compat	= mediatek_board_dt_compat,
> > > > +MACHINE_END
> > > 
> > > You shouldn't need this file at all if the platform is part of
> > > the multi-platform kernel.
> > 
> > From a technical point of view, you don't. But it's interesting to
> > keep it mostly for two things:
> >   - You get to see the platform name in /proc/cpuinfo
> >   - If you ever need to add platform quirks, it's already there
> > 
> > We had a similar discussion two weeks ago for mach-sunxi with Olof and
> > Arnd, and ended up keeping this minimal machine.
> > 
> 
> It looks like it's only useful to make /proc/cpuinfo have the
> platform name because it really isn't that hard to add this file
> if we need to add platform quirks. The downside is we have to
> keep adding compatibles when we support new SoCs.

We also still add Kconfig entries for each new platform, and I'd like
to leave it at that for the time being. In a lot of cases we end
up adding stuff to the machine descriptor later, e.g. for SMP support
(hopefully no more thanks to your work though).

Once we have a significant number of machines that are actually
usable rather than stubs and that we are confident about never
needing any additional pointers, we can revisit this discussion.

At that point, we should also discuss how to avoid adding a Kconfig
entry for each new platform, which e.g. involves making the
clocksource drivers user selectable. That part has been surprisingly
controversial in the past.

	Arnd