* [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit @ 2016-08-29 23:20 Zach Brown 2016-08-29 23:20 ` [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present Zach Brown 2016-09-02 14:45 ` [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit Rob Herring 0 siblings, 2 replies; 6+ messages in thread From: Zach Brown @ 2016-08-29 23:20 UTC (permalink / raw) To: adrian.hunter Cc: robh+dt, ulf.hansson, mark.rutland, linux-mmc, devicetree, linux-kernel, michal.simek, soren.brinkmann, linux-arm-kernel, zach.brown The sdhci controller on xilinx zynq devices will not function unless the CD bit is provided. http://www.xilinx.com/support/answers/61064.html In cases where it is impossible to provide the CD bit in hardware, setting the controller to test mode and then setting inserted to true will get the controller to function without the CD bit. The device property "fails-without-test-cd" will let the arasan driver know the controller does not have the CD line wired and that the controller does not function without it. Signed-off-by: Zach Brown <zach.brown@ni.com> --- v2: * improved commit messages * removed fake-cd device property * removed fake-cd quirk * use broken-cd device property * documented new usage of broken-cd v3: * removed new usage of broken-cd * created fails-without-test-cd device property * created arasan controller specific quirk Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index 3404afa..ec0dc82 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -21,6 +21,10 @@ Required Properties: - interrupts: Interrupt specifier - interrupt-parent: Phandle for the interrupt controller that services interrupts for this device. +Optional Properties: +- fails-without-test-cd: when present, the controller doesn't work when the CD + line is not connected properly, and the line is not connected properly. Test + mode can be used to force the controller to function. Required Properties for "arasan,sdhci-5.1": - phys: From PHY bindings: Phandle for the Generic PHY for arasan. -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present 2016-08-29 23:20 [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit Zach Brown @ 2016-08-29 23:20 ` Zach Brown 2016-08-30 5:47 ` Michal Simek 2016-09-02 14:45 ` [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit Rob Herring 1 sibling, 1 reply; 6+ messages in thread From: Zach Brown @ 2016-08-29 23:20 UTC (permalink / raw) To: adrian.hunter Cc: robh+dt, ulf.hansson, mark.rutland, linux-mmc, devicetree, linux-kernel, michal.simek, soren.brinkmann, linux-arm-kernel, zach.brown The sdhci controller on xilinx zynq devices will not function unless the CD bit is provided. http://www.xilinx.com/support/answers/61064.html In cases where it is impossible to provide the CD bit in hardware, setting the controller to test mode and then setting inserted to true will get the controller to function without the CD bit. When the device has the property fails-without-test-cd the driver changes the controller to test mode and sets test inserted to true to make the controller function. Signed-off-by: Zach Brown <zach.brown@ni.com> --- drivers/mmc/host/sdhci-of-arasan.c | 34 +++++++++++++++++++++++++++++++++- drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index e0f193f..c3e5145 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -26,6 +26,7 @@ #include <linux/phy/phy.h> #include <linux/regmap.h> #include "sdhci-pltfm.h" +#include <linux/of.h> #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 @@ -92,6 +93,12 @@ struct sdhci_arasan_data { struct regmap *soc_ctl_base; const struct sdhci_arasan_soc_ctl_map *soc_ctl_map; + + unsigned int arasan_quirks; /* Arasan deviations from spec */ + +/* Controller does not have CD wired and will not function normally without */ +#define SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD (1<<0) + }; static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = { @@ -203,12 +210,32 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); } +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) +{ + u8 ctrl; + struct sdhci_pltfm_host *pltfm_host; + struct sdhci_arasan_data *sdhci_arasan; + + sdhci_reset(host, mask); + + pltfm_host = sdhci_priv(host); + sdhci_arasan = sdhci_pltfm_priv(pltfm_host); + + if (sdhci_arasan->arasan_quirks & + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD) { + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + ctrl |= SDHCI_CTRL_CDTEST_INS | + SDHCI_CTRL_CDTEST_EN; + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); + } +} + static struct sdhci_ops sdhci_arasan_ops = { .set_clock = sdhci_arasan_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, .get_timeout_clock = sdhci_arasan_get_timeout_clock, .set_bus_width = sdhci_set_bus_width, - .reset = sdhci_reset, + .reset = sdhci_arasan_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, }; @@ -516,6 +543,11 @@ static int sdhci_arasan_probe(struct platform_device *pdev) } sdhci_get_of_property(pdev); + + if (of_get_property(pdev->dev.of_node, "fails-without-test-cd", NULL)) + sdhci_arasan->arasan_quirks |= + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD; + pltfm_host->clk = clk_xin; sdhci_arasan_update_baseclkfreq(host); diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 0411c9f..8d92d6e9 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -84,6 +84,8 @@ #define SDHCI_CTRL_ADMA32 0x10 #define SDHCI_CTRL_ADMA64 0x18 #define SDHCI_CTRL_8BITBUS 0x20 +#define SDHCI_CTRL_CDTEST_INS 0x40 +#define SDHCI_CTRL_CDTEST_EN 0x80 #define SDHCI_POWER_CONTROL 0x29 #define SDHCI_POWER_ON 0x01 -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present 2016-08-29 23:20 ` [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present Zach Brown @ 2016-08-30 5:47 ` Michal Simek 2016-09-06 18:51 ` Zach Brown 0 siblings, 1 reply; 6+ messages in thread From: Michal Simek @ 2016-08-30 5:47 UTC (permalink / raw) To: Zach Brown, adrian.hunter Cc: robh+dt, ulf.hansson, mark.rutland, linux-mmc, devicetree, linux-kernel, michal.simek, soren.brinkmann, linux-arm-kernel On 30.8.2016 01:20, Zach Brown wrote: > The sdhci controller on xilinx zynq devices will not function unless > the CD bit is provided. http://www.xilinx.com/support/answers/61064.html > In cases where it is impossible to provide the CD bit in hardware, > setting the controller to test mode and then setting inserted to true > will get the controller to function without the CD bit. > > When the device has the property fails-without-test-cd the driver > changes the controller to test mode and sets test inserted to true to > make the controller function. > > Signed-off-by: Zach Brown <zach.brown@ni.com> > --- > drivers/mmc/host/sdhci-of-arasan.c | 34 +++++++++++++++++++++++++++++++++- > drivers/mmc/host/sdhci.h | 2 ++ > 2 files changed, 35 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index e0f193f..c3e5145 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -26,6 +26,7 @@ > #include <linux/phy/phy.h> > #include <linux/regmap.h> > #include "sdhci-pltfm.h" > +#include <linux/of.h> > > #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c > #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 > @@ -92,6 +93,12 @@ struct sdhci_arasan_data { > > struct regmap *soc_ctl_base; > const struct sdhci_arasan_soc_ctl_map *soc_ctl_map; > + > + unsigned int arasan_quirks; /* Arasan deviations from spec */ > + > +/* Controller does not have CD wired and will not function normally without */ > +#define SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD (1<<0) Bit macro instead? > + remove this line. > }; > > static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = { > @@ -203,12 +210,32 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, > writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); > } > > +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) > +{ > + u8 ctrl; > + struct sdhci_pltfm_host *pltfm_host; > + struct sdhci_arasan_data *sdhci_arasan; > + > + sdhci_reset(host, mask); > + > + pltfm_host = sdhci_priv(host); > + sdhci_arasan = sdhci_pltfm_priv(pltfm_host); > + > + if (sdhci_arasan->arasan_quirks & > + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD) { > + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); > + ctrl |= SDHCI_CTRL_CDTEST_INS | > + SDHCI_CTRL_CDTEST_EN; > + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); > + } > +} > + > static struct sdhci_ops sdhci_arasan_ops = { > .set_clock = sdhci_arasan_set_clock, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_arasan_get_timeout_clock, > .set_bus_width = sdhci_set_bus_width, > - .reset = sdhci_reset, > + .reset = sdhci_arasan_reset, > .set_uhs_signaling = sdhci_set_uhs_signaling, > }; > > @@ -516,6 +543,11 @@ static int sdhci_arasan_probe(struct platform_device *pdev) > } > > sdhci_get_of_property(pdev); > + > + if (of_get_property(pdev->dev.of_node, "fails-without-test-cd", NULL)) > + sdhci_arasan->arasan_quirks |= > + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD; > + > pltfm_host->clk = clk_xin; > > sdhci_arasan_update_baseclkfreq(host); > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index 0411c9f..8d92d6e9 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -84,6 +84,8 @@ > #define SDHCI_CTRL_ADMA32 0x10 > #define SDHCI_CTRL_ADMA64 0x18 > #define SDHCI_CTRL_8BITBUS 0x20 > +#define SDHCI_CTRL_CDTEST_INS 0x40 > +#define SDHCI_CTRL_CDTEST_EN 0x80 You should follow coding style above. Thanks, Michal ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present 2016-08-30 5:47 ` Michal Simek @ 2016-09-06 18:51 ` Zach Brown 2016-09-07 5:13 ` Michal Simek 0 siblings, 1 reply; 6+ messages in thread From: Zach Brown @ 2016-09-06 18:51 UTC (permalink / raw) To: Michal Simek Cc: adrian.hunter, robh+dt, ulf.hansson, mark.rutland, linux-mmc, devicetree, linux-kernel, soren.brinkmann, linux-arm-kernel On Tue, Aug 30, 2016 at 07:47:17AM +0200, Michal Simek wrote: > On 30.8.2016 01:20, Zach Brown wrote: > > The sdhci controller on xilinx zynq devices will not function unless > > the CD bit is provided. http://www.xilinx.com/support/answers/61064.html > > In cases where it is impossible to provide the CD bit in hardware, > > setting the controller to test mode and then setting inserted to true > > will get the controller to function without the CD bit. > > > > When the device has the property fails-without-test-cd the driver > > changes the controller to test mode and sets test inserted to true to > > make the controller function. > > > > Signed-off-by: Zach Brown <zach.brown@ni.com> > > --- > > drivers/mmc/host/sdhci-of-arasan.c | 34 +++++++++++++++++++++++++++++++++- > > drivers/mmc/host/sdhci.h | 2 ++ > > 2 files changed, 35 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > > index e0f193f..c3e5145 100644 > > --- a/drivers/mmc/host/sdhci-of-arasan.c > > +++ b/drivers/mmc/host/sdhci-of-arasan.c > > @@ -26,6 +26,7 @@ > > #include <linux/phy/phy.h> > > #include <linux/regmap.h> > > #include "sdhci-pltfm.h" > > +#include <linux/of.h> > > > > #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c > > #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 > > @@ -92,6 +93,12 @@ struct sdhci_arasan_data { > > > > struct regmap *soc_ctl_base; > > const struct sdhci_arasan_soc_ctl_map *soc_ctl_map; > > + > > + unsigned int arasan_quirks; /* Arasan deviations from spec */ > > + > > +/* Controller does not have CD wired and will not function normally without */ > > +#define SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD (1<<0) > > Bit macro instead? > Setting bits with notations like (1<<0) is the style which is used for quirks in sdhci.h Is there a reason it should be different here? > > + > > remove this line. > > > }; > > > > static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = { > > @@ -203,12 +210,32 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, > > writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); > > } > > > > +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) > > +{ > > + u8 ctrl; > > + struct sdhci_pltfm_host *pltfm_host; > > + struct sdhci_arasan_data *sdhci_arasan; > > + > > + sdhci_reset(host, mask); > > + > > + pltfm_host = sdhci_priv(host); > > + sdhci_arasan = sdhci_pltfm_priv(pltfm_host); > > + > > + if (sdhci_arasan->arasan_quirks & > > + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD) { > > + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); > > + ctrl |= SDHCI_CTRL_CDTEST_INS | > > + SDHCI_CTRL_CDTEST_EN; > > + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); > > + } > > +} > > + > > static struct sdhci_ops sdhci_arasan_ops = { > > .set_clock = sdhci_arasan_set_clock, > > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > > .get_timeout_clock = sdhci_arasan_get_timeout_clock, > > .set_bus_width = sdhci_set_bus_width, > > - .reset = sdhci_reset, > > + .reset = sdhci_arasan_reset, > > .set_uhs_signaling = sdhci_set_uhs_signaling, > > }; > > > > @@ -516,6 +543,11 @@ static int sdhci_arasan_probe(struct platform_device *pdev) > > } > > > > sdhci_get_of_property(pdev); > > + > > + if (of_get_property(pdev->dev.of_node, "fails-without-test-cd", NULL)) > > + sdhci_arasan->arasan_quirks |= > > + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD; > > + > > pltfm_host->clk = clk_xin; > > > > sdhci_arasan_update_baseclkfreq(host); > > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > > index 0411c9f..8d92d6e9 100644 > > --- a/drivers/mmc/host/sdhci.h > > +++ b/drivers/mmc/host/sdhci.h > > @@ -84,6 +84,8 @@ > > #define SDHCI_CTRL_ADMA32 0x10 > > #define SDHCI_CTRL_ADMA64 0x18 > > #define SDHCI_CTRL_8BITBUS 0x20 > > +#define SDHCI_CTRL_CDTEST_INS 0x40 > > +#define SDHCI_CTRL_CDTEST_EN 0x80 > > You should follow coding style above. I don't understand the issue you're raising. Could you elaborate? > > Thanks, > Michal > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present 2016-09-06 18:51 ` Zach Brown @ 2016-09-07 5:13 ` Michal Simek 0 siblings, 0 replies; 6+ messages in thread From: Michal Simek @ 2016-09-07 5:13 UTC (permalink / raw) To: Zach Brown, Michal Simek Cc: adrian.hunter, robh+dt, ulf.hansson, mark.rutland, linux-mmc, devicetree, linux-kernel, soren.brinkmann, linux-arm-kernel On 6.9.2016 20:51, Zach Brown wrote: > On Tue, Aug 30, 2016 at 07:47:17AM +0200, Michal Simek wrote: >> On 30.8.2016 01:20, Zach Brown wrote: >>> The sdhci controller on xilinx zynq devices will not function unless >>> the CD bit is provided. http://www.xilinx.com/support/answers/61064.html >>> In cases where it is impossible to provide the CD bit in hardware, >>> setting the controller to test mode and then setting inserted to true >>> will get the controller to function without the CD bit. >>> >>> When the device has the property fails-without-test-cd the driver >>> changes the controller to test mode and sets test inserted to true to >>> make the controller function. >>> >>> Signed-off-by: Zach Brown <zach.brown@ni.com> >>> --- >>> drivers/mmc/host/sdhci-of-arasan.c | 34 +++++++++++++++++++++++++++++++++- >>> drivers/mmc/host/sdhci.h | 2 ++ >>> 2 files changed, 35 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c >>> index e0f193f..c3e5145 100644 >>> --- a/drivers/mmc/host/sdhci-of-arasan.c >>> +++ b/drivers/mmc/host/sdhci-of-arasan.c >>> @@ -26,6 +26,7 @@ >>> #include <linux/phy/phy.h> >>> #include <linux/regmap.h> >>> #include "sdhci-pltfm.h" >>> +#include <linux/of.h> >>> >>> #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c >>> #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 >>> @@ -92,6 +93,12 @@ struct sdhci_arasan_data { >>> >>> struct regmap *soc_ctl_base; >>> const struct sdhci_arasan_soc_ctl_map *soc_ctl_map; >>> + >>> + unsigned int arasan_quirks; /* Arasan deviations from spec */ >>> + >>> +/* Controller does not have CD wired and will not function normally without */ >>> +#define SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD (1<<0) >> >> Bit macro instead? >> > > Setting bits with notations like (1<<0) is the style which is used for quirks > in sdhci.h Is there a reason it should be different here? sdhci.h is here for a long time and IIRC using BIT macro is recommended way. >>> + >> >> remove this line. >> >>> }; >>> >>> static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = { >>> @@ -203,12 +210,32 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, >>> writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); >>> } >>> >>> +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) >>> +{ >>> + u8 ctrl; >>> + struct sdhci_pltfm_host *pltfm_host; >>> + struct sdhci_arasan_data *sdhci_arasan; >>> + >>> + sdhci_reset(host, mask); >>> + >>> + pltfm_host = sdhci_priv(host); >>> + sdhci_arasan = sdhci_pltfm_priv(pltfm_host); >>> + >>> + if (sdhci_arasan->arasan_quirks & >>> + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD) { >>> + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); >>> + ctrl |= SDHCI_CTRL_CDTEST_INS | >>> + SDHCI_CTRL_CDTEST_EN; >>> + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); >>> + } >>> +} >>> + >>> static struct sdhci_ops sdhci_arasan_ops = { >>> .set_clock = sdhci_arasan_set_clock, >>> .get_max_clock = sdhci_pltfm_clk_get_max_clock, >>> .get_timeout_clock = sdhci_arasan_get_timeout_clock, >>> .set_bus_width = sdhci_set_bus_width, >>> - .reset = sdhci_reset, >>> + .reset = sdhci_arasan_reset, >>> .set_uhs_signaling = sdhci_set_uhs_signaling, >>> }; >>> >>> @@ -516,6 +543,11 @@ static int sdhci_arasan_probe(struct platform_device *pdev) >>> } >>> >>> sdhci_get_of_property(pdev); >>> + >>> + if (of_get_property(pdev->dev.of_node, "fails-without-test-cd", NULL)) >>> + sdhci_arasan->arasan_quirks |= >>> + SDHCI_ARASAN_QUIRK_FAILS_WITHOUT_TEST_CD; >>> + >>> pltfm_host->clk = clk_xin; >>> >>> sdhci_arasan_update_baseclkfreq(host); >>> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h >>> index 0411c9f..8d92d6e9 100644 >>> --- a/drivers/mmc/host/sdhci.h >>> +++ b/drivers/mmc/host/sdhci.h >>> @@ -84,6 +84,8 @@ >>> #define SDHCI_CTRL_ADMA32 0x10 >>> #define SDHCI_CTRL_ADMA64 0x18 >>> #define SDHCI_CTRL_8BITBUS 0x20 >>> +#define SDHCI_CTRL_CDTEST_INS 0x40 >>> +#define SDHCI_CTRL_CDTEST_EN 0x80 >> >> You should follow coding style above. > > I don't understand the issue you're raising. Could you elaborate? Origin format is #define<space><space>MACRO_NAME<tab>MACRO_VALUE What you have above is not following this style. You should turn on tab highlighting in your editor. Thanks, Michal ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit 2016-08-29 23:20 [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit Zach Brown 2016-08-29 23:20 ` [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present Zach Brown @ 2016-09-02 14:45 ` Rob Herring 1 sibling, 0 replies; 6+ messages in thread From: Rob Herring @ 2016-09-02 14:45 UTC (permalink / raw) To: Zach Brown Cc: adrian.hunter, ulf.hansson, mark.rutland, linux-mmc, devicetree, linux-kernel, michal.simek, soren.brinkmann, linux-arm-kernel On Mon, Aug 29, 2016 at 06:20:56PM -0500, Zach Brown wrote: > The sdhci controller on xilinx zynq devices will not function unless > the CD bit is provided. http://www.xilinx.com/support/answers/61064.html > In cases where it is impossible to provide the CD bit in hardware, > setting the controller to test mode and then setting inserted to true > will get the controller to function without the CD bit. > > The device property "fails-without-test-cd" will let the arasan driver know > the controller does not have the CD line wired and that the controller > does not function without it. > > Signed-off-by: Zach Brown <zach.brown@ni.com> > --- > v2: > * improved commit messages > * removed fake-cd device property > * removed fake-cd quirk > * use broken-cd device property > * documented new usage of broken-cd > v3: > * removed new usage of broken-cd > * created fails-without-test-cd device property > * created arasan controller specific quirk > > > Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > index 3404afa..ec0dc82 100644 > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > @@ -21,6 +21,10 @@ Required Properties: > - interrupts: Interrupt specifier > - interrupt-parent: Phandle for the interrupt controller that services > interrupts for this device. > +Optional Properties: > +- fails-without-test-cd: when present, the controller doesn't work when the CD > + line is not connected properly, and the line is not connected properly. Test > + mode can be used to force the controller to function. Prefix with either arasan or xlnx. Seems more likely Xilinx specific to me. Rob ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-09-07 5:13 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-08-29 23:20 [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit Zach Brown 2016-08-29 23:20 ` [PATCH 2/2] sdhci-of-arasan: Set controller to test mode when fails-without-test-cd is present Zach Brown 2016-08-30 5:47 ` Michal Simek 2016-09-06 18:51 ` Zach Brown 2016-09-07 5:13 ` Michal Simek 2016-09-02 14:45 ` [PATCH 1/2] sdhci-of-arasan: Add device tree parameter fails-without-test-cd bit Rob Herring
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