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From: Yun Wu <wuyun.wu@huawei.com>
To: <marc.zyngier@arm.com>, <tglx@linutronix.de>, <jason@lakedaemon.net>
Cc: <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Yun Wu <wuyun.wu@huawei.com>
Subject: [PATCH v2 1/6] irqchip: gicv3-its: zero itt before handling to hardware
Date: Sun, 15 Feb 2015 17:31:58 +0800	[thread overview]
Message-ID: <1423992723-5028-2-git-send-email-wuyun.wu@huawei.com> (raw)
In-Reply-To: <1423992723-5028-1-git-send-email-wuyun.wu@huawei.com>

Some kind of brain-dead implementations chooses to insert ITEes in
rapid sequence of disabled ITEes, and an un-zeroed ITT will confuse
ITS on judging whether an ITE is really enabled or not. Considering
the implementations are still supported by the GICv3 architecture,
in which ITT is not required to be zeroed before being handled to
hardware, we do the favor in ITS driver.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Yun Wu <wuyun.wu@huawei.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 6850141..69eeea3 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1076,7 +1076,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
 	nr_ites = max(2UL, roundup_pow_of_two(nvecs));
 	sz = nr_ites * its->ite_size;
 	sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
-	itt = kmalloc(sz, GFP_KERNEL);
+	itt = kzalloc(sz, GFP_KERNEL);
 	lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis);

 	if (!dev || !itt || !lpi_map) {
--
1.8.0



  reply	other threads:[~2015-02-15  9:33 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-15  9:31 [PATCH v2 0/6] enhance configuring an ITS Yun Wu
2015-02-15  9:31 ` Yun Wu [this message]
2015-02-15  9:31 ` [PATCH v2 2/6] irqchip: gicv3-its: use 64KB page as default granule Yun Wu
2015-02-17  9:46   ` Marc Zyngier
2015-02-15  9:32 ` [PATCH v2 3/6] irqchip: gicv3-its: limit order of DT size to MAX_ORDER Yun Wu
2015-02-17  9:19   ` Marc Zyngier
2015-02-17 10:00     ` Yun Wu (Abel)
2015-02-15  9:32 ` [PATCH v2 4/6] irqchip: gicv3-its: define macros for GITS_CTLR fields Yun Wu
2015-02-15  9:32 ` [PATCH v2 5/6] irqchip: gicv3-its: add support for power down Yun Wu
2015-02-17  9:29   ` Marc Zyngier
2015-02-17 10:15     ` Yun Wu (Abel)
2015-02-17 11:11       ` Marc Zyngier
2015-02-17 12:27         ` Yun Wu (Abel)
2015-03-04  3:10           ` Yun Wu (Abel)
2015-02-15  9:32 ` [PATCH v2 6/6] irqchip: gicv3: skip ITS init when no ITS available Yun Wu
2015-02-16 10:05   ` Vladimir Murzin
2015-02-16 14:57     ` Yun Wu (Abel)

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