From: Yun Wu <wuyun.wu@huawei.com>
To: <marc.zyngier@arm.com>, <tglx@linutronix.de>, <jason@lakedaemon.net>
Cc: <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Yun Wu <wuyun.wu@huawei.com>
Subject: [PATCH v2 4/6] irqchip: gicv3-its: define macros for GITS_CTLR fields
Date: Sun, 15 Feb 2015 17:32:01 +0800 [thread overview]
Message-ID: <1423992723-5028-5-git-send-email-wuyun.wu@huawei.com> (raw)
In-Reply-To: <1423992723-5028-1-git-send-email-wuyun.wu@huawei.com>
Define macros for GITS_CTLR fields to avoid using magic numbers.
Signed-off-by: Yun Wu <wuyun.wu@huawei.com>
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
include/linux/irqchip/arm-gic-v3.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index de36606..42c03b2 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1389,7 +1389,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
writeq_relaxed(baser, its->base + GITS_CBASER);
tmp = readq_relaxed(its->base + GITS_CBASER);
writeq_relaxed(0, its->base + GITS_CWRITER);
- writel_relaxed(1, its->base + GITS_CTLR);
+ writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) {
pr_info("ITS: using cache flushing for cmd queue\n");
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 3459b43..c9d3002 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -134,6 +134,9 @@
#define GITS_TRANSLATER 0x10040
+#define GITS_CTLR_ENABLE (1U << 0)
+#define GITS_CTLR_QUIESCENT (1U << 31)
+
#define GITS_TYPER_DEVBITS_SHIFT 13
#define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)
#define GITS_TYPER_PTA (1UL << 19)
--
1.8.0
next prev parent reply other threads:[~2015-02-15 9:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-15 9:31 [PATCH v2 0/6] enhance configuring an ITS Yun Wu
2015-02-15 9:31 ` [PATCH v2 1/6] irqchip: gicv3-its: zero itt before handling to hardware Yun Wu
2015-02-15 9:31 ` [PATCH v2 2/6] irqchip: gicv3-its: use 64KB page as default granule Yun Wu
2015-02-17 9:46 ` Marc Zyngier
2015-02-15 9:32 ` [PATCH v2 3/6] irqchip: gicv3-its: limit order of DT size to MAX_ORDER Yun Wu
2015-02-17 9:19 ` Marc Zyngier
2015-02-17 10:00 ` Yun Wu (Abel)
2015-02-15 9:32 ` Yun Wu [this message]
2015-02-15 9:32 ` [PATCH v2 5/6] irqchip: gicv3-its: add support for power down Yun Wu
2015-02-17 9:29 ` Marc Zyngier
2015-02-17 10:15 ` Yun Wu (Abel)
2015-02-17 11:11 ` Marc Zyngier
2015-02-17 12:27 ` Yun Wu (Abel)
2015-03-04 3:10 ` Yun Wu (Abel)
2015-02-15 9:32 ` [PATCH v2 6/6] irqchip: gicv3: skip ITS init when no ITS available Yun Wu
2015-02-16 10:05 ` Vladimir Murzin
2015-02-16 14:57 ` Yun Wu (Abel)
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