[PATCH 0/6] arm64: dts: exynos: Add USB/PWM/UART3/reboot dt node for Exynos5433 SoC

[PATCH 0/6] arm64: dts: exynos: Add USB/PWM/UART3/reboot dt node for Exynos5433 SoC

[Chanwoo Choi]

This patch-set add the following devicetree to support USB/PWM/UART3/reboot.
- USB 3.0 DRD (Dual Role Device) and host
- PWM (Pulse Width Modulation)
- UART3
- System reboot

Depend on:

This patch-set have the dependnecy on following patch[1] to support USB 3.0
Host and DRD (Dual Role Device) for Exynos5433 SoC. This patch[1] was merged
by Kishon Vijay Abraham I (GENERIC PHY FRAMEWORK maintainer).
[1] https://lkml.org/lkml/2015/3/25/984
    : [PATCH RESEND] phy: exynos5-usbdrd: Add to support for Exynos5433 SoC

Beomho Seo (1):
  arm64: dts: exynos: Add UART3 dt node for Exynos5433 SoC

Jaewon Kim (4):
  arm64: dts: exynos: Add EHCI and OHCI dt node for Exynos5433
  arm64: dts: exynos: Add USB Device dt node for Exynos5433
  arm64: dts: exynos: Add USB3.0 Host dt node for Exynos5433
  arm64: dts: exynos: Add PWM dt node and pinctrl for Exynos5433 SoC

Joonyoung Shim (1):
  arm64: dts: exynos: add reboot node for exynos5433

 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  35 +++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi         | 167 +++++++++++++++++++++
 2 files changed, 202 insertions(+)

-- 
1.8.5.5

[PATCH 1/6] arm64: dts: exynos: Add EHCI and OHCI dt node for Exynos5433

[Chanwoo Choi]

From: Jaewon Kim <jaewon02.kim@samsung.com>

This patch adds EHCI and OHCI device tree node
to usb USB2.0 Host and HSCI(High Speed Inter-Chip) function.

Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 43 ++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index faea1c6..8a1875d 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -916,6 +916,49 @@
 			io-channel-ranges;
 			status = "disabled";
 		};
+
+		ehci: usb@15510000 {
+			compatible = "samsung,exynos4210-ehci";
+			reg = <0x15510000 0x1000>;
+			interrupts = <0 230 0>;
+			clocks = <&cmu_fsys CLK_ACLK_USBHOST20>;
+			clock-names = "usbhost";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			port@0 {
+				reg = <0>;
+				phys = <&usb2_phy 0>;
+				status = "disabled";
+			};
+			port@1 {
+				reg = <1>;
+				phys = <&usb2_phy 1>;
+				status = "disabled";
+			};
+		};
+
+		ohci: usb@15520000 {
+			compatible = "samsung,exynos4210-ohci";
+			reg = <0x15520000 0x1000>;
+			interrupts = <0 230 0>;
+			clocks = <&cmu_fsys CLK_ACLK_USBHOST20>;
+			clock-names = "usbhost";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		usb2_phy: usb2phy@15530000 {
+			compatible = "samsung,exynos5433-usb2-phy";
+			reg = <0x15530000 0x100>;
+			samsung,pmureg-phandle = <&pmu_system_controller>;
+			clocks = <&cmu_fsys CLK_ACLK_USBHOST20>, <&xxti>;
+			clock-names = "phy", "ref";
+			#phy-cells = <1>;
+			status = "disabled";
+		};
 	};
 
 	timer {
-- 
1.8.5.5

[PATCH 2/6] arm64: dts: exynos: Add USB Device dt node for Exynos5433

[Chanwoo Choi]

From: Jaewon Kim <jaewon02.kim@samsung.com>

This patch adds USB DRD(Dual Role Device) and PHY
device tree node to use USB Device.

Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 47 ++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 8a1875d..b460f5f 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -959,6 +959,53 @@
 			#phy-cells = <1>;
 			status = "disabled";
 		};
+
+		usbdrd30: usb@15400000 {
+			compatible = "samsung,exynos5250-dwusb3";
+			clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,
+				<&cmu_fsys CLK_SCLK_USBDRD30>;
+			clock-names = "usbdrd30", "usbdrd30_susp_clk";
+			assigned-clocks =
+				<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
+				<&cmu_top CLK_MOUT_SCLK_USBDRD30>,
+				<&cmu_top CLK_DIV_SCLK_USBDRD30>;
+			assigned-clock-parents =
+				<&cmu_top CLK_SCLK_USBDRD30_FSYS>,
+				<&cmu_top CLK_MOUT_BUS_PLL_USER>;
+			assigned-clock-rates = <0>, <0>, <66700000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			status = "disabled";
+
+			dwc3 {
+				compatible = "snps,dwc3";
+				reg = <0x15400000 0x10000>;
+				interrupts = <0 231 0>;
+				phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;
+				phy-names = "usb2-phy", "usb3-phy";
+			};
+
+		};
+
+		usbdrd30_phy: phy@15500000 {
+			compatible = "samsung,exynos5433-usbdrd-phy";
+			reg = <0x15500000 0x100>;
+			clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, <&xxti>,
+				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,
+				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>,
+				<&cmu_fsys CLK_SCLK_USBDRD30>;
+			clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp";
+			assigned-clocks =
+				<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
+				<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>;
+			assigned-clock-parents =
+				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
+				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>;
+			#phy-cells = <1>;
+			samsung,pmu-syscon = <&pmu_system_controller>;
+			status = "disabled";
+		};
 	};
 
 	timer {
-- 
1.8.5.5

[PATCH 3/6] arm64: dts: exynos: Add USB3.0 Host dt node for Exynos5433

[Chanwoo Choi]

From: Jaewon Kim <jaewon02.kim@samsung.com>

This patch adds PHY and USB3.0 Host device tree node
using DWC3 chip and set USB3.0 Host related clock parent
for Exynos5433.

Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 46 ++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index b460f5f..9cca236 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1006,6 +1006,52 @@
 			samsung,pmu-syscon = <&pmu_system_controller>;
 			status = "disabled";
 		};
+
+		usbhost30_phy: phy@15580000 {
+			compatible = "samsung,exynos5433-usbdrd-phy";
+			reg = <0x15580000 0x100>;
+			clocks = <&cmu_fsys CLK_ACLK_USBHOST30>, <&xxti>,
+				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>,
+				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>,
+				<&cmu_fsys CLK_SCLK_USBHOST30>;
+			clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp";
+			assigned-clocks =
+				<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
+				<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>;
+			assigned-clock-parents =
+				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
+				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
+			#phy-cells = <1>;
+			samsung,pmu-syscon = <&pmu_system_controller>;
+			status = "disabled";
+		};
+
+		usbhost30: usb@15a00000 {
+			compatible = "samsung,exynos5250-dwusb3";
+			clocks = <&cmu_fsys CLK_ACLK_USBHOST30>,
+				<&cmu_fsys CLK_SCLK_USBHOST30>;
+			clock-names = "usbdrd30", "usbdrd30_susp_clk";
+			assigned-clocks =
+				<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
+				<&cmu_top CLK_MOUT_SCLK_USBHOST30>,
+				<&cmu_top CLK_DIV_SCLK_USBHOST30>;
+			assigned-clock-parents =
+				<&cmu_top CLK_SCLK_USBHOST30_FSYS>,
+				<&cmu_top CLK_MOUT_BUS_PLL_USER>;
+			assigned-clock-rates = <0>, <0>, <66700000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			status = "disabled";
+
+			dwc3 {
+				compatible = "snps,dwc3";
+				reg = <0x154a0000 0x10000>;
+				interrupts = <0 244 0>;
+				phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;
+				phy-names = "usb2-phy", "usb3-phy";
+			};
+		};
 	};
 
 	timer {
-- 
1.8.5.5

[PATCH 4/6] arm64: dts: exynos: Add PWM dt node and pinctrl for Exynos5433 SoC

[Chanwoo Choi]

From: Jaewon Kim <jaewon02.kim@samsung.com>

This patch adds PWM(Pulsle Width Modulation) device tree node
to support for PWM Timer on Exynos5433 SoC.

Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 28 ++++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi         | 12 ++++++++++
 2 files changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index c56bbf8..49be038 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -581,6 +581,34 @@
 		samsung,pin-drv = <0>;
 	};
 
+	pwm0_out: pwm0-out {
+		samsung,pins = "gpd2-4";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	pwm1_out: pwm1-out {
+		samsung,pins = "gpd2-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	pwm2_out: pwm2-out {
+		samsung,pins = "gpd2-6";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	pwm3_out: pwm3-out {
+		samsung,pins = "gpd2-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
 	spi1_bus: spi1-bus {
 		samsung,pins = "gpd6-2", "gpd6-4", "gpd6-5";
 		samsung,pin-function = <2>;
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 9cca236..baeec299 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1052,6 +1052,18 @@
 				phy-names = "usb2-phy", "usb3-phy";
 			};
 		};
+
+		pwm: pwm@14dd0000 {
+			compatible = "samsung,exynos4210-pwm";
+			reg = <0x14dd0000 0x100>;
+			interrupts = <0 416 0>, <0 417 0>,
+				     <0 418 0>, <0 419 0>, <0 420 0>;
+			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+			clocks = <&cmu_peric CLK_PCLK_PWM>;
+			clock-names = "timers";
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
 	};
 
 	timer {
-- 
1.8.5.5

[PATCH 5/6] arm64: dts: exynos: Add UART3 dt node for Exynos5433 SoC

[Chanwoo Choi]

From: Beomho Seo <beomho.seo@samsung.com>

This patch adds the UART3 devicetree node for Exynos5433 SoC. The UART3 device
is included in AUD_DOMAIN.

Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  7 +++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi         | 12 ++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 49be038..f2d7a39 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -83,6 +83,13 @@
 		samsung,pin-pud = <1>;
 		samsung,pin-drv = <0>;
 	};
+
+	uart_aud_bus: uart-aud-bus {
+		samsung,pins = "gpz1-3", "gpz1-2", "gpz1-1", "gpz1-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
 };
 
 &pinctrl_cpif {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index baeec299..f179c60 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -475,6 +475,18 @@
 			status = "disabled";
 		};
 
+		serial_3: serial@11460000 {
+			compatible = "samsung,exynos5433-uart";
+			reg = <0x11460000 0x100>;
+			interrupts = <0 67 0>;
+			clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
+				 <&cmu_aud CLK_SCLK_AUD_UART>;
+			clock-names = "uart", "clk_uart_baud0";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart_aud_bus>;
+			status = "disabled";
+		};
+
 		i2s0: i2s0@11440000 {
 			compatible = "samsung,exynos7-i2s";
 			reg = <0x11440000 0x100>;
-- 
1.8.5.5

[PATCH 6/6] arm64: dts: exynos: add reboot node for exynos5433

[Chanwoo Choi]

From: Joonyoung Shim <jy0922.shim@samsung.com>

This patch adds the reboot node which uses the syscon-reboot driver.

Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.co>
Acked-by: Inki Dae <inki.dae@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index f179c60..f2d6b18 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -94,6 +94,13 @@
 		cpu_on = <0xC4000003>;
 	};
 
+	reboot: syscon-reboot {
+		compatible = "syscon-reboot";
+		regmap = <&pmu_system_controller>;
+		offset = <0x400>;
+		mask = <0x1>;
+	};
+
 	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
-- 
1.8.5.5