* [PATCH v9 1/6] arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
@ 2015-05-30 1:50 ` Bintian Wang
2015-05-30 1:50 ` [PATCH v9 2/6] arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC Bintian Wang
` (6 subsequent siblings)
7 siblings, 0 replies; 21+ messages in thread
From: Bintian Wang @ 2015-05-30 1:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, bintian.wang, z.liuxinliang, heyunlei,
kong.kongxinwei, wangbintian, w.f, liguozhu
This patch introduces ARCH_HISI to enable Hisilicon SoC family in
Kconfig and defconfig.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Wei Xu <xuwei5@hisilicon.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
---
arch/arm64/Kconfig | 5 +++++
arch/arm64/configs/defconfig | 1 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 4269dba..2af5efe 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -180,6 +180,11 @@ config ARCH_FSL_LS2085A
help
This enables support for Freescale LS2085A SOC.
+config ARCH_HISI
+ bool "Hisilicon SoC Family"
+ help
+ This enables support for Hisilicon ARMv8 SoC family
+
config ARCH_MEDIATEK
bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
select ARM_GIC
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2ed7449..1d293ea 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -33,6 +33,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
CONFIG_ARCH_EXYNOS7=y
CONFIG_ARCH_FSL_LS2085A=y
+CONFIG_ARCH_HISI=y
CONFIG_ARCH_MEDIATEK=y
CONFIG_ARCH_SEATTLE=y
CONFIG_ARCH_TEGRA=y
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 2/6] arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
2015-05-30 1:50 ` [PATCH v9 1/6] arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig Bintian Wang
@ 2015-05-30 1:50 ` Bintian Wang
2015-06-04 4:36 ` Rob Herring
2015-05-30 1:50 ` [PATCH v9 3/6] clk: hi6220: Document devicetree bindings for hi6220 clock Bintian Wang
` (5 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Bintian Wang @ 2015-05-30 1:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, bintian.wang, z.liuxinliang, heyunlei,
kong.kongxinwei, wangbintian, w.f, liguozhu
This patch adds documentation for the devicetree bindings used by the
DT files of Hisilicon hi6220 SoC mobile platform.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
---
.../bindings/arm/hisilicon/hisilicon.txt | 87 ++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 35b1bd4..f67d0f3 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -1,5 +1,8 @@
Hisilicon Platforms Device Tree Bindings
----------------------------------------------------
+Hi6220 SoC
+Required root node properties:
+ - compatible = "hisilicon,hi6220";
Hi4511 Board
Required root node properties:
@@ -13,6 +16,9 @@ HiP01 ca9x2 Board
Required root node properties:
- compatible = "hisilicon,hip01-ca9x2";
+HiKey Board
+Required root node properties:
+ - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
Hisilicon system controller
@@ -41,6 +47,87 @@ Example:
};
-----------------------------------------------------------------------
+Hisilicon Hi6220 system controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-sysctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+ under this controller and this property must be present.
+
+Hisilicon designs this controller as one of the system controllers,
+its main functions are the same as Hisilicon system controller, but
+the register offset of some core modules are different.
+
+Example:
+ /*for Hi6220*/
+ sys_ctrl: sys_ctrl {
+ compatible = "hisilicon,hi6220-sysctrl", "syscon";
+ reg = <0x0 0xf7030000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+
+Hisilicon Hi6220 Power Always ON domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-aoctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+ under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power always
+on domain for mobile platform.
+
+Example:
+ /*for Hi6220*/
+ ao_ctrl: ao_ctrl {
+ compatible = "hisilicon,hi6220-aoctrl", "syscon";
+ reg = <0x0 0xf7800000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+
+Hisilicon Hi6220 Media domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-mediactrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+ under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the multimedia
+domain(e.g. codec, G3D ...) for mobile platform.
+
+Example:
+ /*for Hi6220*/
+ media_ctrl: media_ctrl {
+ compatible = "hisilicon,hi6220-mediactrl", "syscon";
+ reg = <0x0 0xf4410000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+
+Hisilicon Hi6220 Power Management domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-pmctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, some clock registers are define
+ under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power management
+domain for mobile platform.
+
+Example:
+ /*for Hi6220*/
+ pm_ctrl: pm_ctrl {
+ compatible = "hisilicon,hi6220-pmctrl", "syscon";
+ reg = <0x0 0xf7032000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+-----------------------------------------------------------------------
Hisilicon HiP01 system controller
Required properties:
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v9 2/6] arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
2015-05-30 1:50 ` [PATCH v9 2/6] arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC Bintian Wang
@ 2015-06-04 4:36 ` Rob Herring
2015-06-04 7:23 ` Bintian
0 siblings, 1 reply; 21+ messages in thread
From: Rob Herring @ 2015-06-04 4:36 UTC (permalink / raw)
To: Bintian Wang
Cc: linux-arm-kernel, linux-kernel, Catalin Marinas, Will Deacon,
devicetree, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
Kumar Gala, Kevin Hilman, Mike Turquette, Rob Herring,
Zhangfei Gao, Haojian Zhuang, xuwei5, Jaehoon Chung,
Olof Johansson, yanhaifeng, Stephen Boyd, xuejiancheng,
sledge.yanwei, Tomeu Vizoso, Russell King - ARM Linux,
guodong.xu, Jorge Ramirez-Ortiz, tyler.baker, khilman,
Paul Bolle, Arnd Bergmann, Marc Zyngier, xuyiping, wangbinghui,
zhenwei.wang, victor.lixin, puck.chen, dan.zhao, huxinwei,
z.liuxinliang, heyunlei, kong.kongxinwei, wangbintian, w.f,
liguozhu
On Fri, May 29, 2015 at 8:50 PM, Bintian Wang <bintian.wang@huawei.com> wrote:
> This patch adds documentation for the devicetree bindings used by the
> DT files of Hisilicon hi6220 SoC mobile platform.
>
> Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
> Suggested-by: Arnd Bergmann <arnd@arndb.de>
> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
One minor comment below.
> ---
> .../bindings/arm/hisilicon/hisilicon.txt | 87 ++++++++++++++++++++
> 1 file changed, 87 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> index 35b1bd4..f67d0f3 100644
> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> @@ -1,5 +1,8 @@
> Hisilicon Platforms Device Tree Bindings
> ----------------------------------------------------
> +Hi6220 SoC
> +Required root node properties:
> + - compatible = "hisilicon,hi6220";
>
> Hi4511 Board
> Required root node properties:
> @@ -13,6 +16,9 @@ HiP01 ca9x2 Board
> Required root node properties:
> - compatible = "hisilicon,hip01-ca9x2";
>
> +HiKey Board
> +Required root node properties:
> + - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
>
> Hisilicon system controller
>
> @@ -41,6 +47,87 @@ Example:
> };
>
> -----------------------------------------------------------------------
> +Hisilicon Hi6220 system controller
> +
> +Required properties:
> +- compatible : "hisilicon,hi6220-sysctrl"
> +- reg : Register address and size
> +- #clock-cells: should be set to 1, many clock registers are defined
> + under this controller and this property must be present.
> +
> +Hisilicon designs this controller as one of the system controllers,
> +its main functions are the same as Hisilicon system controller, but
> +the register offset of some core modules are different.
> +
> +Example:
> + /*for Hi6220*/
> + sys_ctrl: sys_ctrl {
You should have the unit address in the name here. Same with the
follow examples.
> + compatible = "hisilicon,hi6220-sysctrl", "syscon";
> + reg = <0x0 0xf7030000 0x0 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> +
> +Hisilicon Hi6220 Power Always ON domain controller
> +
> +Required properties:
> +- compatible : "hisilicon,hi6220-aoctrl"
> +- reg : Register address and size
> +- #clock-cells: should be set to 1, many clock registers are defined
> + under this controller and this property must be present.
> +
> +Hisilicon designs this system controller to control the power always
> +on domain for mobile platform.
> +
> +Example:
> + /*for Hi6220*/
> + ao_ctrl: ao_ctrl {
> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
> + reg = <0x0 0xf7800000 0x0 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> +
> +Hisilicon Hi6220 Media domain controller
> +
> +Required properties:
> +- compatible : "hisilicon,hi6220-mediactrl"
> +- reg : Register address and size
> +- #clock-cells: should be set to 1, many clock registers are defined
> + under this controller and this property must be present.
> +
> +Hisilicon designs this system controller to control the multimedia
> +domain(e.g. codec, G3D ...) for mobile platform.
> +
> +Example:
> + /*for Hi6220*/
> + media_ctrl: media_ctrl {
> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
> + reg = <0x0 0xf4410000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> +
> +Hisilicon Hi6220 Power Management domain controller
> +
> +Required properties:
> +- compatible : "hisilicon,hi6220-pmctrl"
> +- reg : Register address and size
> +- #clock-cells: should be set to 1, some clock registers are define
> + under this controller and this property must be present.
> +
> +Hisilicon designs this system controller to control the power management
> +domain for mobile platform.
> +
> +Example:
> + /*for Hi6220*/
> + pm_ctrl: pm_ctrl {
> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
> + reg = <0x0 0xf7032000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> +-----------------------------------------------------------------------
> Hisilicon HiP01 system controller
>
> Required properties:
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 2/6] arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
2015-06-04 4:36 ` Rob Herring
@ 2015-06-04 7:23 ` Bintian
0 siblings, 0 replies; 21+ messages in thread
From: Bintian @ 2015-06-04 7:23 UTC (permalink / raw)
To: Rob Herring
Cc: linux-arm-kernel, linux-kernel, Catalin Marinas, Will Deacon,
devicetree, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell,
Kumar Gala, Kevin Hilman, Mike Turquette, Rob Herring,
Zhangfei Gao, Haojian Zhuang, xuwei5, Jaehoon Chung,
Olof Johansson, yanhaifeng, Stephen Boyd, xuejiancheng,
sledge.yanwei, Tomeu Vizoso, Russell King - ARM Linux,
guodong.xu, Jorge Ramirez-Ortiz, tyler.baker, khilman,
Paul Bolle, Arnd Bergmann, Marc Zyngier, xuyiping, wangbinghui,
zhenwei.wang, victor.lixin, puck.chen, dan.zhao, huxinwei,
z.liuxinliang, heyunlei, kong.kongxinwei, wangbintian, w.f,
liguozhu
On 2015/6/4 12:36, Rob Herring wrote:
> On Fri, May 29, 2015 at 8:50 PM, Bintian Wang <bintian.wang@huawei.com> wrote:
>> This patch adds documentation for the devicetree bindings used by the
>> DT files of Hisilicon hi6220 SoC mobile platform.
>>
>> Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
>> Suggested-by: Arnd Bergmann <arnd@arndb.de>
>> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
>> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
> Acked-by: Rob Herring <robh@kernel.org>
>
> One minor comment below.
Thank you Rob, I will fix in version 10.
BR,
Bintian
>> ---
>> .../bindings/arm/hisilicon/hisilicon.txt | 87 ++++++++++++++++++++
>> 1 file changed, 87 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 35b1bd4..f67d0f3 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -1,5 +1,8 @@
>> Hisilicon Platforms Device Tree Bindings
>> ----------------------------------------------------
>> +Hi6220 SoC
>> +Required root node properties:
>> + - compatible = "hisilicon,hi6220";
>>
>> Hi4511 Board
>> Required root node properties:
>> @@ -13,6 +16,9 @@ HiP01 ca9x2 Board
>> Required root node properties:
>> - compatible = "hisilicon,hip01-ca9x2";
>>
>> +HiKey Board
>> +Required root node properties:
>> + - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
>>
>> Hisilicon system controller
>>
>> @@ -41,6 +47,87 @@ Example:
>> };
>>
>> -----------------------------------------------------------------------
>> +Hisilicon Hi6220 system controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,hi6220-sysctrl"
>> +- reg : Register address and size
>> +- #clock-cells: should be set to 1, many clock registers are defined
>> + under this controller and this property must be present.
>> +
>> +Hisilicon designs this controller as one of the system controllers,
>> +its main functions are the same as Hisilicon system controller, but
>> +the register offset of some core modules are different.
>> +
>> +Example:
>> + /*for Hi6220*/
>> + sys_ctrl: sys_ctrl {
>
> You should have the unit address in the name here. Same with the
> follow examples.
>
>> + compatible = "hisilicon,hi6220-sysctrl", "syscon";
>> + reg = <0x0 0xf7030000 0x0 0x2000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> +
>> +Hisilicon Hi6220 Power Always ON domain controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,hi6220-aoctrl"
>> +- reg : Register address and size
>> +- #clock-cells: should be set to 1, many clock registers are defined
>> + under this controller and this property must be present.
>> +
>> +Hisilicon designs this system controller to control the power always
>> +on domain for mobile platform.
>> +
>> +Example:
>> + /*for Hi6220*/
>> + ao_ctrl: ao_ctrl {
>> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
>> + reg = <0x0 0xf7800000 0x0 0x2000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> +
>> +Hisilicon Hi6220 Media domain controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,hi6220-mediactrl"
>> +- reg : Register address and size
>> +- #clock-cells: should be set to 1, many clock registers are defined
>> + under this controller and this property must be present.
>> +
>> +Hisilicon designs this system controller to control the multimedia
>> +domain(e.g. codec, G3D ...) for mobile platform.
>> +
>> +Example:
>> + /*for Hi6220*/
>> + media_ctrl: media_ctrl {
>> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
>> + reg = <0x0 0xf4410000 0x0 0x1000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> +
>> +Hisilicon Hi6220 Power Management domain controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,hi6220-pmctrl"
>> +- reg : Register address and size
>> +- #clock-cells: should be set to 1, some clock registers are define
>> + under this controller and this property must be present.
>> +
>> +Hisilicon designs this system controller to control the power management
>> +domain for mobile platform.
>> +
>> +Example:
>> + /*for Hi6220*/
>> + pm_ctrl: pm_ctrl {
>> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
>> + reg = <0x0 0xf7032000 0x0 0x1000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> +-----------------------------------------------------------------------
>> Hisilicon HiP01 system controller
>>
>> Required properties:
>> --
>> 1.7.9.5
>>
>
> .
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v9 3/6] clk: hi6220: Document devicetree bindings for hi6220 clock
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
2015-05-30 1:50 ` [PATCH v9 1/6] arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig Bintian Wang
2015-05-30 1:50 ` [PATCH v9 2/6] arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC Bintian Wang
@ 2015-05-30 1:50 ` Bintian Wang
2015-05-30 1:50 ` [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART Bintian Wang
` (4 subsequent siblings)
7 siblings, 0 replies; 21+ messages in thread
From: Bintian Wang @ 2015-05-30 1:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, bintian.wang, z.liuxinliang, heyunlei,
kong.kongxinwei, wangbintian, w.f, liguozhu
Document DT files bindings for Hisilicon hi6220 clock.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
---
.../devicetree/bindings/clock/hi6220-clock.txt | 34 ++++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/hi6220-clock.txt
diff --git a/Documentation/devicetree/bindings/clock/hi6220-clock.txt b/Documentation/devicetree/bindings/clock/hi6220-clock.txt
new file mode 100644
index 0000000..53ddb19
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/hi6220-clock.txt
@@ -0,0 +1,34 @@
+* Hisilicon Hi6220 Clock Controller
+
+Clock control registers reside in different Hi6220 system controllers,
+please refer the following document to know more about the binding rules
+for these system controllers:
+
+Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+
+Required Properties:
+
+- compatible: the compatible should be one of the following strings to
+ indicate the clock controller functionality.
+
+ - "hisilicon,hi6220-aoctrl"
+ - "hisilicon,hi6220-sysctrl"
+ - "hisilicon,hi6220-mediactrl"
+ - "hisilicon,hi6220-pmctrl"
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+For example:
+ sys_ctrl: sys_ctrl {
+ compatible = "hisilicon,hi6220-sysctrl", "syscon";
+ reg = <0x0 0xf7030000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+Each clock is assigned an identifier and client nodes use this identifier
+to specify the clock which they consume.
+
+All these identifier could be found in <dt-bindings/clock/hi6220-clock.h>.
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
` (2 preceding siblings ...)
2015-05-30 1:50 ` [PATCH v9 3/6] clk: hi6220: Document devicetree bindings for hi6220 clock Bintian Wang
@ 2015-05-30 1:50 ` Bintian Wang
2015-06-02 8:59 ` Linus Walleij
2015-05-30 1:51 ` [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC Bintian Wang
` (3 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Bintian Wang @ 2015-05-30 1:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, bintian.wang, z.liuxinliang, heyunlei,
kong.kongxinwei, wangbintian, w.f, liguozhu
Hisilicon does some performance enhancements based on PL011(e.g. larger
FIFO length), so add one compatible string "hisilicon,hi6220-uart" for
future optimisations or workarounds works.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
---
Documentation/devicetree/bindings/serial/pl011.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt
index ba3ecb8..cb9fd9d 100644
--- a/Documentation/devicetree/bindings/serial/pl011.txt
+++ b/Documentation/devicetree/bindings/serial/pl011.txt
@@ -1,7 +1,9 @@
* ARM AMBA Primecell PL011 serial UART
Required properties:
-- compatible: must be "arm,primecell", "arm,pl011"
+- compatible: should contain one of the following sequences:
+ * "arm,pl011", "arm,primecell"
+ * "hisilicon,hi6220-pl011", "arm,pl011", "arm,primecell"
- reg: exactly one register range with length 0x1000
- interrupts: exactly one interrupt specifier
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-05-30 1:50 ` [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART Bintian Wang
@ 2015-06-02 8:59 ` Linus Walleij
2015-06-02 9:13 ` Marc Zyngier
2015-06-02 10:55 ` Bintian
0 siblings, 2 replies; 21+ messages in thread
From: Linus Walleij @ 2015-06-02 8:59 UTC (permalink / raw)
To: Bintian Wang, Russell King - ARM Linux
Cc: linux-arm-kernel, linux-kernel, Catalin Marinas, Will Deacon,
devicetree, Rob Herring, Paweł Moll, Mark Rutland,
ijc+devicetree, Kumar Gala, Kevin Hilman, Mike Turquette,
Rob Herring, Zhangfei Gao, Haojian Zhuang, Xu Wei, Jaehoon Chung,
Olof Johansson, yanhaifeng, Stephen Boyd, xuejiancheng,
sledge.yanwei, Tomeu Vizoso, Guodong Xu, jorge.ramirez-ortiz,
Tyler Baker, Kevin Hilman, Paul Bolle, Arnd Bergmann,
Marc Zyngier, xuyiping, wangbinghui, zhenwei.wang, victor.lixin,
puck.chen, dan.zhao, Xinwei Hu, z.liuxinliang, Yunlei He,
XinWei Kong, wangbintian, w.f, liguozhu
On Sat, May 30, 2015 at 3:50 AM, Bintian Wang <bintian.wang@huawei.com> wrote:
> Hisilicon does some performance enhancements based on PL011(e.g. larger
> FIFO length), so add one compatible string "hisilicon,hi6220-uart" for
That compatible string in the commit message is not even
the same as in the patch.
> future optimisations or workarounds works.
>
> Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
> Suggested-by: Mark Rutland <mark.rutland@arm.com>
Maybe I missed out on the earlier conversation, but do you
mean that the PrimeCell ID has not been properly set up
to something unique in this HiSilicon version of the PL011
block?
Even if so: do not override the compatible string like this,
that is not the PrimeCell style.
Define an 8 bit vendor ID (like tha ASCII for 'H' 0x48
or whatever) and encode it for these variants, if the
hardware is just using the ARM default PrimeCell
ID, override it in the device tree like Broadcom
are doing in arch/arm/boot/dts/bcm2835.dtsi:
arm,primecell-periphid = <0x00241011>;
Maybe yours would be:
arm,primecell-periphid = <0x00048011>;
For a first HiSilicon variant, then do some
<include/linux/amba/bus.h>:
enum amba_vendor {
AMBA_VENDOR_ARM = 0x41,
+ AMBA_VENDOR_HISILICON = 0x48,
Then patch drivers/tty/serial/amba_pl011.c to add vendor_hisilicon
and a match table for 0x00048011 just like everyone else.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-06-02 8:59 ` Linus Walleij
@ 2015-06-02 9:13 ` Marc Zyngier
2015-06-02 9:43 ` Russell King - ARM Linux
2015-06-02 10:55 ` Bintian
1 sibling, 1 reply; 21+ messages in thread
From: Marc Zyngier @ 2015-06-02 9:13 UTC (permalink / raw)
To: Linus Walleij, Bintian Wang, Russell King - ARM Linux
Cc: linux-arm-kernel, linux-kernel, Catalin Marinas, Will Deacon,
devicetree, Rob Herring, Pawel Moll, Mark Rutland,
ijc+devicetree, Kumar Gala, Kevin Hilman, Mike Turquette,
rob.herring, Zhangfei Gao, Haojian Zhuang, Xu Wei, Jaehoon Chung,
Olof Johansson, yanhaifeng, Stephen Boyd, xuejiancheng,
sledge.yanwei, Tomeu Vizoso, Guodong Xu, jorge.ramirez-ortiz,
Tyler Baker, Kevin Hilman, Paul Bolle, Arnd Bergmann, xuyiping,
wangbinghui, zhenwei.wang, victor.lixin, puck.chen, dan.zhao,
huxinwei, z.liuxinliang, Yunlei He, XinWei Kong, wangbintian,
w.f, liguozhu
On 02/06/15 09:59, Linus Walleij wrote:
> On Sat, May 30, 2015 at 3:50 AM, Bintian Wang <bintian.wang@huawei.com> wrote:
>
>> Hisilicon does some performance enhancements based on PL011(e.g. larger
>> FIFO length), so add one compatible string "hisilicon,hi6220-uart" for
>
> That compatible string in the commit message is not even
> the same as in the patch.
>
>> future optimisations or workarounds works.
>>
>> Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
>> Suggested-by: Mark Rutland <mark.rutland@arm.com>
>
> Maybe I missed out on the earlier conversation, but do you
> mean that the PrimeCell ID has not been properly set up
> to something unique in this HiSilicon version of the PL011
> block?
>
> Even if so: do not override the compatible string like this,
> that is not the PrimeCell style.
>
> Define an 8 bit vendor ID (like tha ASCII for 'H' 0x48
> or whatever) and encode it for these variants, if the
> hardware is just using the ARM default PrimeCell
> ID, override it in the device tree like Broadcom
> are doing in arch/arm/boot/dts/bcm2835.dtsi:
>
> arm,primecell-periphid = <0x00241011>;
>
> Maybe yours would be:
>
> arm,primecell-periphid = <0x00048011>;
>
> For a first HiSilicon variant, then do some
> <include/linux/amba/bus.h>:
>
> enum amba_vendor {
> AMBA_VENDOR_ARM = 0x41,
> + AMBA_VENDOR_HISILICON = 0x48,
>
> Then patch drivers/tty/serial/amba_pl011.c to add vendor_hisilicon
> and a match table for 0x00048011 just like everyone else.
That feels weird. This amba_vendor enum is not under control of the DT
author, nor the kernel. This is a set of codes that are managed by a
third party (probably ARM). What if some company with a name starting
with 'H' (Hilarious Inc?) comes up with some actual HW and ends up
conflicting with the above?
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-06-02 9:13 ` Marc Zyngier
@ 2015-06-02 9:43 ` Russell King - ARM Linux
0 siblings, 0 replies; 21+ messages in thread
From: Russell King - ARM Linux @ 2015-06-02 9:43 UTC (permalink / raw)
To: Marc Zyngier
Cc: Linus Walleij, Bintian Wang, Mark Rutland, dan.zhao,
Catalin Marinas, wangbinghui, Will Deacon, huxinwei,
Haojian Zhuang, yanhaifeng, rob.herring, Mike Turquette,
Arnd Bergmann, wangbintian, Kevin Hilman, victor.lixin, Xu Wei,
Jaehoon Chung, sledge.yanwei, XinWei Kong, Yunlei He, puck.chen,
Zhangfei Gao, z.liuxinliang, devicetree, Kevin Hilman,
Pawel Moll, ijc+devicetree, Tyler Baker, Olof Johansson,
Rob Herring, xuyiping, zhenwei.wang, w.f, linux-arm-kernel,
Paul Bolle, Guodong Xu, Tomeu Vizoso, Stephen Boyd, linux-kernel,
Kumar Gala, xuejiancheng, jorge.ramirez-ortiz, liguozhu
On Tue, Jun 02, 2015 at 10:13:26AM +0100, Marc Zyngier wrote:
> That feels weird. This amba_vendor enum is not under control of the DT
> author, nor the kernel. This is a set of codes that are managed by a
> third party (probably ARM). What if some company with a name starting
> with 'H' (Hilarious Inc?) comes up with some actual HW and ends up
> conflicting with the above?
Presumably, HiSilicon have their own vendor code already, which
presumably would be required for them to have a license to modify
ARM IP.
--
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-06-02 8:59 ` Linus Walleij
2015-06-02 9:13 ` Marc Zyngier
@ 2015-06-02 10:55 ` Bintian
2015-06-02 11:24 ` Russell King - ARM Linux
1 sibling, 1 reply; 21+ messages in thread
From: Bintian @ 2015-06-02 10:55 UTC (permalink / raw)
To: Linus Walleij, Russell King - ARM Linux
Cc: linux-arm-kernel, linux-kernel, Catalin Marinas, Will Deacon,
devicetree, Rob Herring, Paweł Moll, Mark Rutland,
ijc+devicetree, Kumar Gala, Kevin Hilman, Mike Turquette,
Rob Herring, Zhangfei Gao, Haojian Zhuang, Xu Wei, Jaehoon Chung,
Olof Johansson, yanhaifeng, Stephen Boyd, xuejiancheng,
sledge.yanwei, Tomeu Vizoso, Guodong Xu, jorge.ramirez-ortiz,
Tyler Baker, Kevin Hilman, Paul Bolle, Arnd Bergmann,
Marc Zyngier, xuyiping, wangbinghui, zhenwei.wang, victor.lixin,
puck.chen, dan.zhao, Xinwei Hu, z.liuxinliang, Yunlei He,
XinWei Kong, wangbintian, w.f, liguozhu
On 2015/6/2 16:59, Linus Walleij wrote:
> On Sat, May 30, 2015 at 3:50 AM, Bintian Wang <bintian.wang@huawei.com> wrote:
>
>> Hisilicon does some performance enhancements based on PL011(e.g. larger
>> FIFO length), so add one compatible string "hisilicon,hi6220-uart" for
>
> That compatible string in the commit message is not even
> the same as in the patch.
The UART0 is PL011 compatible, the UART1/2 have some performance
enhancements features, so based on Mark's suggestion and I add this
compatible string just for future use.
>
>> future optimisations or workarounds works.
>>
>> Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
>> Suggested-by: Mark Rutland <mark.rutland@arm.com>
>
> Maybe I missed out on the earlier conversation, but do you
> mean that the PrimeCell ID has not been properly set up
> to something unique in this HiSilicon version of the PL011
> block?
>
> Even if so: do not override the compatible string like this,
> that is not the PrimeCell style.
>
> Define an 8 bit vendor ID (like tha ASCII for 'H' 0x48
> or whatever) and encode it for these variants, if the
> hardware is just using the ARM default PrimeCell
> ID, override it in the device tree like Broadcom
> are doing in arch/arm/boot/dts/bcm2835.dtsi:
>
> arm,primecell-periphid = <0x00241011>;
>
> Maybe yours would be:
>
> arm,primecell-periphid = <0x00048011>;
>
> For a first HiSilicon variant, then do some
> <include/linux/amba/bus.h>:
>
> enum amba_vendor {
> AMBA_VENDOR_ARM = 0x41,
> + AMBA_VENDOR_HISILICON = 0x48,
>
> Then patch drivers/tty/serial/amba_pl011.c to add vendor_hisilicon
> and a match table for 0x00048011 just like everyone else.
Thanks and BR,
Bintian
> Yours,
> Linus Walleij
>
> .
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-06-02 10:55 ` Bintian
@ 2015-06-02 11:24 ` Russell King - ARM Linux
2015-06-02 11:46 ` Bintian
0 siblings, 1 reply; 21+ messages in thread
From: Russell King - ARM Linux @ 2015-06-02 11:24 UTC (permalink / raw)
To: Bintian
Cc: Linus Walleij, linux-arm-kernel, linux-kernel, Catalin Marinas,
Will Deacon, devicetree, Rob Herring, Paweł Moll,
Mark Rutland, ijc+devicetree, Kumar Gala, Kevin Hilman,
Mike Turquette, Rob Herring, Zhangfei Gao, Haojian Zhuang,
Xu Wei, Jaehoon Chung, Olof Johansson, yanhaifeng, Stephen Boyd,
xuejiancheng, sledge.yanwei, Tomeu Vizoso, Guodong Xu,
jorge.ramirez-ortiz, Tyler Baker, Kevin Hilman, Paul Bolle,
Arnd Bergmann, Marc Zyngier, xuyiping, wangbinghui, zhenwei.wang,
victor.lixin, puck.chen, dan.zhao, Xinwei Hu, z.liuxinliang,
Yunlei He, XinWei Kong, wangbintian, w.f, liguozhu
On Tue, Jun 02, 2015 at 06:55:20PM +0800, Bintian wrote:
> On 2015/6/2 16:59, Linus Walleij wrote:
> >On Sat, May 30, 2015 at 3:50 AM, Bintian Wang <bintian.wang@huawei.com> wrote:
> >
> >>Hisilicon does some performance enhancements based on PL011(e.g. larger
> >>FIFO length), so add one compatible string "hisilicon,hi6220-uart" for
> >
> >That compatible string in the commit message is not even
> >the same as in the patch.
> The UART0 is PL011 compatible, the UART1/2 have some performance
> enhancements features, so based on Mark's suggestion and I add this
> compatible string just for future use.
Please don't submit it with this series.
This patch should not be part of this series, it should be part of the
series which modifies the PL011 driver, so it can be reviewed along with
those changes.
Until then, I'm going to NAK this patch.
The thing that worries me though is that the subject line says this
is a "Hisilicon *designed* UART". If Hisilicon _designed_ this UART,
presumably they have changed the *vendor* field of the UART ID _not_
to indicate that ARM Ltd designed it?
If they've merely modified the parameters, and given the ARM Ltd PL011
a larger fifo, then there isn't really much of a problem - we've been
here before, except the vendor has had a real vendor ID for the field
(in the case of ST), plus we've had different FIFO lengths for ARM
hardware too (32 bytes instead of 16 for revision 3 and above.)
Lastly, if you're not having to modify the PL011 driver in any way,
you don't need to have a compatible. In any case, you _shouldn't_ for
AMBA devices. AMBA does not match drivers based on OF compatible
strings, so using OF compatible strings with the AMBA bus is just wrong.
The AMBA compatible strings are there so that the generic OF code knows
how to create the devices.
--
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART
2015-06-02 11:24 ` Russell King - ARM Linux
@ 2015-06-02 11:46 ` Bintian
0 siblings, 0 replies; 21+ messages in thread
From: Bintian @ 2015-06-02 11:46 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Linus Walleij, linux-arm-kernel, linux-kernel, Catalin Marinas,
Will Deacon, devicetree, Rob Herring, Paweł Moll,
Mark Rutland, ijc+devicetree, Kumar Gala, Kevin Hilman,
Mike Turquette, Rob Herring, Zhangfei Gao, Haojian Zhuang,
Xu Wei, Jaehoon Chung, Olof Johansson, yanhaifeng, Stephen Boyd,
xuejiancheng, sledge.yanwei, Tomeu Vizoso, Guodong Xu,
jorge.ramirez-ortiz, Tyler Baker, Kevin Hilman, Paul Bolle,
Arnd Bergmann, Marc Zyngier, xuyiping, wangbinghui, zhenwei.wang,
victor.lixin, puck.chen, dan.zhao, Xinwei Hu, z.liuxinliang,
Yunlei He, XinWei Kong, wangbintian, w.f, liguozhu
Hello Russell,
On 2015/6/2 19:24, Russell King - ARM Linux wrote:
> On Tue, Jun 02, 2015 at 06:55:20PM +0800, Bintian wrote:
>> On 2015/6/2 16:59, Linus Walleij wrote:
>>> On Sat, May 30, 2015 at 3:50 AM, Bintian Wang <bintian.wang@huawei.com> wrote:
>>>
>>>> Hisilicon does some performance enhancements based on PL011(e.g. larger
>>>> FIFO length), so add one compatible string "hisilicon,hi6220-uart" for
>>>
>>> That compatible string in the commit message is not even
>>> the same as in the patch.
>> The UART0 is PL011 compatible, the UART1/2 have some performance
>> enhancements features, so based on Mark's suggestion and I add this
>> compatible string just for future use.
>
> Please don't submit it with this series.
>
> This patch should not be part of this series, it should be part of the
> series which modifies the PL011 driver, so it can be reviewed along with
> those changes.
I agree with you and it's OK to me to remove this patch now.
Could you help to ack the reset patches or I should send the version 10
without this patch?
>
> Until then, I'm going to NAK this patch.
>
> The thing that worries me though is that the subject line says this
> is a "Hisilicon *designed* UART". If Hisilicon _designed_ this UART,
> presumably they have changed the *vendor* field of the UART ID _not_
> to indicate that ARM Ltd designed it?
>
> If they've merely modified the parameters, and given the ARM Ltd PL011
> a larger fifo, then there isn't really much of a problem - we've been
> here before, except the vendor has had a real vendor ID for the field
> (in the case of ST), plus we've had different FIFO lengths for ARM
> hardware too (32 bytes instead of 16 for revision 3 and above.)
I think there is problem with my subject description, it's ARM designed
indeed and Hisilicon just did some performance enhancements but not for
UART0 in hi6220.
> Lastly, if you're not having to modify the PL011 driver in any way,
> you don't need to have a compatible. In any case, you _shouldn't_ for
> AMBA devices. AMBA does not match drivers based on OF compatible
> strings, so using OF compatible strings with the AMBA bus is just wrong.
> The AMBA compatible strings are there so that the generic OF code knows
> how to create the devices.
Right.
Thank you Russell.
BR,
Bintian
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
` (3 preceding siblings ...)
2015-05-30 1:50 ` [PATCH v9 4/6] Documentation: DT: PL011: hi6220: add compatible string for Hisilicon designed UART Bintian Wang
@ 2015-05-30 1:51 ` Bintian Wang
2015-06-03 3:10 ` Bintian
2015-06-09 0:55 ` Shawn Guo
2015-05-30 1:51 ` [PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver Bintian Wang
` (2 subsequent siblings)
7 siblings, 2 replies; 21+ messages in thread
From: Bintian Wang @ 2015-05-30 1:51 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, bintian.wang, z.liuxinliang, heyunlei,
kong.kongxinwei, wangbintian, w.f, liguozhu
Add initial dtsi file to support Hisilicon Hi6220 SoC with
support of Octal core CPUs in two clusters and each cluster
has quard Cortex-A53.
Also add dts file to support HiKey development board which
based on Hi6220 SoC.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Yiping Xu <xuyiping@hisilicon.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
---
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/hisilicon/Makefile | 5 +
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 31 +++++
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 172 ++++++++++++++++++++++++
4 files changed, 209 insertions(+)
create mode 100644 arch/arm64/boot/dts/hisilicon/Makefile
create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220.dtsi
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index ad26a75..38913be 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs += arm
dts-dirs += cavium
dts-dirs += exynos
dts-dirs += freescale
+dts-dirs += hisilicon
dts-dirs += mediatek
dts-dirs += qcom
dts-dirs += sprd
diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
new file mode 100644
index 0000000..fa81a6e
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
+
+always := $(dtb-y)
+subdir-y := $(dts-dirs)
+clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
new file mode 100644
index 0000000..e36a539
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -0,0 +1,31 @@
+/*
+ * dts file for Hisilicon HiKey Development Board
+ *
+ * Copyright (C) 2015, Hisilicon Ltd.
+ *
+ */
+
+/dts-v1/;
+
+/*Reserved 1MB memory for MCU*/
+/memreserve/ 0x05e00000 0x00100000;
+
+#include "hi6220.dtsi"
+
+/ {
+ model = "HiKey Development Board";
+ compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
new file mode 100644
index 0000000..229937f
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -0,0 +1,172 @@
+/*
+ * dts file for Hisilicon Hi6220 SoC
+ *
+ * Copyright (C) 2015, Hisilicon Ltd.
+ */
+
+#include <dt-bindings/clock/hi6220-clock.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "hisilicon,hi6220";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+ cluster1 {
+ core0 {
+ cpu = <&cpu4>;
+ };
+ core1 {
+ cpu = <&cpu5>;
+ };
+ core2 {
+ cpu = <&cpu6>;
+ };
+ core3 {
+ cpu = <&cpu7>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+
+ cpu4: cpu@100 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ };
+
+ cpu5: cpu@101 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x101>;
+ enable-method = "psci";
+ };
+
+ cpu6: cpu@102 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x102>;
+ enable-method = "psci";
+ };
+
+ cpu7: cpu@103 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0 0x103>;
+ enable-method = "psci";
+ };
+ };
+
+ gic: interrupt-controller@f6801000 {
+ compatible = "arm,gic-400";
+ reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
+ <0x0 0xf6802000 0 0x2000>, /* GICC */
+ <0x0 0xf6804000 0 0x2000>, /* GICH */
+ <0x0 0xf6806000 0 0x2000>; /* GICV */
+ #address-cells = <0>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ao_ctrl: ao_ctrl {
+ compatible = "hisilicon,hi6220-aoctrl", "syscon";
+ reg = <0x0 0xf7800000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ sys_ctrl: sys_ctrl {
+ compatible = "hisilicon,hi6220-sysctrl", "syscon";
+ reg = <0x0 0xf7030000 0x0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ media_ctrl: media_ctrl {
+ compatible = "hisilicon,hi6220-mediactrl", "syscon";
+ reg = <0x0 0xf4410000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ pm_ctrl: pm_ctrl {
+ compatible = "hisilicon,hi6220-pmctrl", "syscon";
+ reg = <0x0 0xf7032000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ uart0: uart@f8015000 { /* console */
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0xf8015000 0x0 0x1000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ao_ctrl HI6220_UART0_PCLK>, <&ao_ctrl HI6220_UART0_PCLK>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+ };
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC
2015-05-30 1:51 ` [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC Bintian Wang
@ 2015-06-03 3:10 ` Bintian
2015-06-09 0:55 ` Shawn Guo
1 sibling, 0 replies; 21+ messages in thread
From: Bintian @ 2015-06-03 3:10 UTC (permalink / raw)
To: catalin.marinas, will.deacon, devicetree, robh+dt, pawel.moll,
mark.rutland, ijc+devicetree, galak, khilman, mturquette,
rob.herring, haojian.zhuang, olof, sboyd, khilman, arnd,
marc.zyngier
Cc: Bintian Wang, linux-arm-kernel, linux-kernel, zhangfei.gao,
xuwei5, jh80.chung, yanhaifeng, xuejiancheng, sledge.yanwei,
tomeu.vizoso, linux, guodong.xu, jorge.ramirez-ortiz,
tyler.baker, pebolle, xuyiping, wangbinghui, zhenwei.wang,
victor.lixin, puck.chen, dan.zhao, huxinwei, z.liuxinliang,
heyunlei, kong.kongxinwei, wangbintian, w.f, liguozhu
Hello Mark, Rob and other ARM64 DT maintainers,
Could you help to ack this patch?
Thanks for your time.
Bintian
On 2015/5/30 9:51, Bintian Wang wrote:
> Add initial dtsi file to support Hisilicon Hi6220 SoC with
> support of Octal core CPUs in two clusters and each cluster
> has quard Cortex-A53.
>
> Also add dts file to support HiKey development board which
> based on Hi6220 SoC.
>
> Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
> Reviewed-by: Yiping Xu <xuyiping@hisilicon.com>
> Tested-by: Will Deacon <will.deacon@arm.com>
> Tested-by: Tyler Baker <tyler.baker@linaro.org>
> Tested-by: Kevin Hilman <khilman@linaro.org>
> ---
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/hisilicon/Makefile | 5 +
> arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 31 +++++
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 172 ++++++++++++++++++++++++
> 4 files changed, 209 insertions(+)
> create mode 100644 arch/arm64/boot/dts/hisilicon/Makefile
> create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
> create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index ad26a75..38913be 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -4,6 +4,7 @@ dts-dirs += arm
> dts-dirs += cavium
> dts-dirs += exynos
> dts-dirs += freescale
> +dts-dirs += hisilicon
> dts-dirs += mediatek
> dts-dirs += qcom
> dts-dirs += sprd
> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
> new file mode 100644
> index 0000000..fa81a6e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
> @@ -0,0 +1,5 @@
> +dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
> +
> +always := $(dtb-y)
> +subdir-y := $(dts-dirs)
> +clean-files := *.dtb
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
> new file mode 100644
> index 0000000..e36a539
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
> @@ -0,0 +1,31 @@
> +/*
> + * dts file for Hisilicon HiKey Development Board
> + *
> + * Copyright (C) 2015, Hisilicon Ltd.
> + *
> + */
> +
> +/dts-v1/;
> +
> +/*Reserved 1MB memory for MCU*/
> +/memreserve/ 0x05e00000 0x00100000;
> +
> +#include "hi6220.dtsi"
> +
> +/ {
> + model = "HiKey Development Board";
> + compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x40000000>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> new file mode 100644
> index 0000000..229937f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -0,0 +1,172 @@
> +/*
> + * dts file for Hisilicon Hi6220 SoC
> + *
> + * Copyright (C) 2015, Hisilicon Ltd.
> + */
> +
> +#include <dt-bindings/clock/hi6220-clock.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> + compatible = "hisilicon,hi6220";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> + core1 {
> + cpu = <&cpu1>;
> + };
> + core2 {
> + cpu = <&cpu2>;
> + };
> + core3 {
> + cpu = <&cpu3>;
> + };
> + };
> + cluster1 {
> + core0 {
> + cpu = <&cpu4>;
> + };
> + core1 {
> + cpu = <&cpu5>;
> + };
> + core2 {
> + cpu = <&cpu6>;
> + };
> + core3 {
> + cpu = <&cpu7>;
> + };
> + };
> + };
> +
> + cpu0: cpu@0 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> +
> + cpu4: cpu@100 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + };
> +
> + cpu5: cpu@101 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x101>;
> + enable-method = "psci";
> + };
> +
> + cpu6: cpu@102 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x102>;
> + enable-method = "psci";
> + };
> +
> + cpu7: cpu@103 {
> + compatible = "arm,cortex-a53", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x103>;
> + enable-method = "psci";
> + };
> + };
> +
> + gic: interrupt-controller@f6801000 {
> + compatible = "arm,gic-400";
> + reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
> + <0x0 0xf6802000 0 0x2000>, /* GICC */
> + <0x0 0xf6804000 0 0x2000>, /* GICH */
> + <0x0 0xf6806000 0 0x2000>; /* GICV */
> + #address-cells = <0>;
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + ao_ctrl: ao_ctrl {
> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
> + reg = <0x0 0xf7800000 0x0 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> + sys_ctrl: sys_ctrl {
> + compatible = "hisilicon,hi6220-sysctrl", "syscon";
> + reg = <0x0 0xf7030000 0x0 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> + media_ctrl: media_ctrl {
> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
> + reg = <0x0 0xf4410000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + pm_ctrl: pm_ctrl {
> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
> + reg = <0x0 0xf7032000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + uart0: uart@f8015000 { /* console */
> + compatible = "arm,pl011", "arm,primecell";
> + reg = <0x0 0xf8015000 0x0 0x1000>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ao_ctrl HI6220_UART0_PCLK>, <&ao_ctrl HI6220_UART0_PCLK>;
> + clock-names = "uartclk", "apb_pclk";
> + };
> + };
> +};
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC
2015-05-30 1:51 ` [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC Bintian Wang
2015-06-03 3:10 ` Bintian
@ 2015-06-09 0:55 ` Shawn Guo
2015-06-09 1:39 ` Bintian
1 sibling, 1 reply; 21+ messages in thread
From: Shawn Guo @ 2015-06-09 0:55 UTC (permalink / raw)
To: Bintian Wang
Cc: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier, dan.zhao, huxinwei, xuyiping, wangbintian,
victor.lixin, puck.chen, wangbinghui, zhenwei.wang, liguozhu,
kong.kongxinwei, heyunlei, w.f, z.liuxinliang
A minor random comment below.
On Sat, May 30, 2015 at 09:51:00AM +0800, Bintian Wang wrote:
> + ao_ctrl: ao_ctrl {
> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
> + reg = <0x0 0xf7800000 0x0 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> + sys_ctrl: sys_ctrl {
> + compatible = "hisilicon,hi6220-sysctrl", "syscon";
> + reg = <0x0 0xf7030000 0x0 0x2000>;
> + #clock-cells = <1>;
> + };
> +
> + media_ctrl: media_ctrl {
> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
> + reg = <0x0 0xf4410000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + pm_ctrl: pm_ctrl {
An unit-address should be coded in the node name, when it has a 'reg'
property.
Shawn
> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
> + reg = <0x0 0xf7032000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC
2015-06-09 0:55 ` Shawn Guo
@ 2015-06-09 1:39 ` Bintian
2015-06-09 2:30 ` Bintian
0 siblings, 1 reply; 21+ messages in thread
From: Bintian @ 2015-06-09 1:39 UTC (permalink / raw)
To: Shawn Guo
Cc: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier, dan.zhao, huxinwei, xuyiping, wangbintian,
victor.lixin, puck.chen, wangbinghui, zhenwei.wang, liguozhu,
kong.kongxinwei, heyunlei, w.f, z.liuxinliang
Hello Shawn,
On 2015/6/9 8:55, Shawn Guo wrote:
> A minor random comment below.
>
> On Sat, May 30, 2015 at 09:51:00AM +0800, Bintian Wang wrote:
>> + ao_ctrl: ao_ctrl {
>> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
>> + reg = <0x0 0xf7800000 0x0 0x2000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> + sys_ctrl: sys_ctrl {
>> + compatible = "hisilicon,hi6220-sysctrl", "syscon";
>> + reg = <0x0 0xf7030000 0x0 0x2000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> + media_ctrl: media_ctrl {
>> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
>> + reg = <0x0 0xf4410000 0x0 0x1000>;
>> + #clock-cells = <1>;
>> + };
>> +
>> + pm_ctrl: pm_ctrl {
>
> An unit-address should be coded in the node name, when it has a 'reg'
> property.
Thanks for your suggestion, Rob also gives me the same suggestion :)
In fact, I added the reg to node name in the "[GIT PULL]Hisilicon 64-bit
soc hi6220 DT changes for 4.2", but it seems the pull is too late for
kernel 4.2, I will prepare it for 4.3.
Thanks,
Bintian
>
> Shawn
>
>> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
>> + reg = <0x0 0xf7032000 0x0 0x1000>;
>> + #clock-cells = <1>;
>> + };
>
> .
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC
2015-06-09 1:39 ` Bintian
@ 2015-06-09 2:30 ` Bintian
0 siblings, 0 replies; 21+ messages in thread
From: Bintian @ 2015-06-09 2:30 UTC (permalink / raw)
To: Shawn Guo, xuwei5, olof, khilman, arnd
Cc: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, jh80.chung, yanhaifeng, sboyd, xuejiancheng,
sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, pebolle, marc.zyngier,
dan.zhao, huxinwei, xuyiping, wangbintian, victor.lixin,
puck.chen, wangbinghui, zhenwei.wang, liguozhu, kong.kongxinwei,
heyunlei, w.f, z.liuxinliang, Li Zefan
Hello Arnd, Hello Olof, Hello Kevin,
I checked the git log of Linux 4.1-rc7 from Linus, he says Linux 4.1
will have an rc8, so we may have time to review the following two pull
requests from Wei Xu?
[GIT PULL v2]Hisilicon 64-bit SoC changes for 4.2
[GIT PULL]Hisilicon 64-bit soc hi6220 DT changes for 4.2
Thanks for your time.
BR,
Bintian
On 2015/6/9 9:39, Bintian wrote:
> Hello Shawn,
>
> On 2015/6/9 8:55, Shawn Guo wrote:
>> A minor random comment below.
>>
>> On Sat, May 30, 2015 at 09:51:00AM +0800, Bintian Wang wrote:
>>> + ao_ctrl: ao_ctrl {
>>> + compatible = "hisilicon,hi6220-aoctrl", "syscon";
>>> + reg = <0x0 0xf7800000 0x0 0x2000>;
>>> + #clock-cells = <1>;
>>> + };
>>> +
>>> + sys_ctrl: sys_ctrl {
>>> + compatible = "hisilicon,hi6220-sysctrl", "syscon";
>>> + reg = <0x0 0xf7030000 0x0 0x2000>;
>>> + #clock-cells = <1>;
>>> + };
>>> +
>>> + media_ctrl: media_ctrl {
>>> + compatible = "hisilicon,hi6220-mediactrl", "syscon";
>>> + reg = <0x0 0xf4410000 0x0 0x1000>;
>>> + #clock-cells = <1>;
>>> + };
>>> +
>>> + pm_ctrl: pm_ctrl {
>>
>> An unit-address should be coded in the node name, when it has a 'reg'
>> property.
> Thanks for your suggestion, Rob also gives me the same suggestion :)
>
> In fact, I added the reg to node name in the "[GIT PULL]Hisilicon 64-bit
> soc hi6220 DT changes for 4.2", but it seems the pull is too late for
> kernel 4.2, I will prepare it for 4.3.
>
> Thanks,
>
> Bintian
>
>>
>> Shawn
>>
>>> + compatible = "hisilicon,hi6220-pmctrl", "syscon";
>>> + reg = <0x0 0xf7032000 0x0 0x1000>;
>>> + #clock-cells = <1>;
>>> + };
>>
>> .
>>
>
>
> .
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
` (4 preceding siblings ...)
2015-05-30 1:51 ` [PATCH v9 5/6] arm64: dts: Add dts files for Hisilicon Hi6220 SoC Bintian Wang
@ 2015-05-30 1:51 ` Bintian Wang
2015-06-02 0:14 ` [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Kevin Hilman
2015-06-02 3:57 ` Bintian
7 siblings, 0 replies; 21+ messages in thread
From: Bintian Wang @ 2015-05-30 1:51 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, khilman, mturquette, rob.herring, zhangfei.gao,
haojian.zhuang, xuwei5, jh80.chung, olof, yanhaifeng, sboyd,
xuejiancheng, sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, khilman, pebolle, arnd,
marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, bintian.wang, z.liuxinliang, heyunlei,
kong.kongxinwei, wangbintian, w.f, liguozhu
Add the header file "hi6220-clock.h" used by both
hi6220 clock driver and hi6220 device tree file.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
---
include/dt-bindings/clock/hi6220-clock.h | 173 ++++++++++++++++++++++++++++++
1 file changed, 173 insertions(+)
create mode 100644 include/dt-bindings/clock/hi6220-clock.h
diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h
new file mode 100644
index 0000000..70ee383
--- /dev/null
+++ b/include/dt-bindings/clock/hi6220-clock.h
@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2015 Hisilicon Limited.
+ *
+ * Author: Bintian Wang <bintian.wang@huawei.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_HI6220_H
+#define __DT_BINDINGS_CLOCK_HI6220_H
+
+/* clk in Hi6220 AO (always on) controller */
+#define HI6220_NONE_CLOCK 0
+
+/* fixed rate clocks */
+#define HI6220_REF32K 1
+#define HI6220_CLK_TCXO 2
+#define HI6220_MMC1_PAD 3
+#define HI6220_MMC2_PAD 4
+#define HI6220_MMC0_PAD 5
+#define HI6220_PLL_BBP 6
+#define HI6220_PLL_GPU 7
+#define HI6220_PLL1_DDR 8
+#define HI6220_PLL_SYS 9
+#define HI6220_PLL_SYS_MEDIA 10
+#define HI6220_DDR_SRC 11
+#define HI6220_PLL_MEDIA 12
+#define HI6220_PLL_DDR 13
+
+/* fixed factor clocks */
+#define HI6220_300M 14
+#define HI6220_150M 15
+#define HI6220_PICOPHY_SRC 16
+#define HI6220_MMC0_SRC_SEL 17
+#define HI6220_MMC1_SRC_SEL 18
+#define HI6220_MMC2_SRC_SEL 19
+#define HI6220_VPU_CODEC 20
+#define HI6220_MMC0_SMP 21
+#define HI6220_MMC1_SMP 22
+#define HI6220_MMC2_SMP 23
+
+/* gate clocks */
+#define HI6220_WDT0_PCLK 24
+#define HI6220_WDT1_PCLK 25
+#define HI6220_WDT2_PCLK 26
+#define HI6220_TIMER0_PCLK 27
+#define HI6220_TIMER1_PCLK 28
+#define HI6220_TIMER2_PCLK 29
+#define HI6220_TIMER3_PCLK 30
+#define HI6220_TIMER4_PCLK 31
+#define HI6220_TIMER5_PCLK 32
+#define HI6220_TIMER6_PCLK 33
+#define HI6220_TIMER7_PCLK 34
+#define HI6220_TIMER8_PCLK 35
+#define HI6220_UART0_PCLK 36
+
+#define HI6220_AO_NR_CLKS 37
+
+/* clk in Hi6220 systrl */
+/* gate clock */
+#define HI6220_MMC0_CLK 1
+#define HI6220_MMC0_CIUCLK 2
+#define HI6220_MMC1_CLK 3
+#define HI6220_MMC1_CIUCLK 4
+#define HI6220_MMC2_CLK 5
+#define HI6220_MMC2_CIUCLK 6
+#define HI6220_USBOTG_HCLK 7
+#define HI6220_CLK_PICOPHY 8
+#define HI6220_HIFI 9
+#define HI6220_DACODEC_PCLK 10
+#define HI6220_EDMAC_ACLK 11
+#define HI6220_CS_ATB 12
+#define HI6220_I2C0_CLK 13
+#define HI6220_I2C1_CLK 14
+#define HI6220_I2C2_CLK 15
+#define HI6220_I2C3_CLK 16
+#define HI6220_UART1_PCLK 17
+#define HI6220_UART2_PCLK 18
+#define HI6220_UART3_PCLK 19
+#define HI6220_UART4_PCLK 20
+#define HI6220_SPI_CLK 21
+#define HI6220_TSENSOR_CLK 22
+#define HI6220_MMU_CLK 23
+#define HI6220_HIFI_SEL 24
+#define HI6220_MMC0_SYSPLL 25
+#define HI6220_MMC1_SYSPLL 26
+#define HI6220_MMC2_SYSPLL 27
+#define HI6220_MMC0_SEL 28
+#define HI6220_MMC1_SEL 29
+#define HI6220_BBPPLL_SEL 30
+#define HI6220_MEDIA_PLL_SRC 31
+#define HI6220_MMC2_SEL 32
+#define HI6220_CS_ATB_SYSPLL 33
+
+/* mux clocks */
+#define HI6220_MMC0_SRC 34
+#define HI6220_MMC0_SMP_IN 35
+#define HI6220_MMC1_SRC 36
+#define HI6220_MMC1_SMP_IN 37
+#define HI6220_MMC2_SRC 38
+#define HI6220_MMC2_SMP_IN 39
+#define HI6220_HIFI_SRC 40
+#define HI6220_UART1_SRC 41
+#define HI6220_UART2_SRC 42
+#define HI6220_UART3_SRC 43
+#define HI6220_UART4_SRC 44
+#define HI6220_MMC0_MUX0 45
+#define HI6220_MMC1_MUX0 46
+#define HI6220_MMC2_MUX0 47
+#define HI6220_MMC0_MUX1 48
+#define HI6220_MMC1_MUX1 49
+#define HI6220_MMC2_MUX1 50
+
+/* divider clocks */
+#define HI6220_CLK_BUS 51
+#define HI6220_MMC0_DIV 52
+#define HI6220_MMC1_DIV 53
+#define HI6220_MMC2_DIV 54
+#define HI6220_HIFI_DIV 55
+#define HI6220_BBPPLL0_DIV 56
+#define HI6220_CS_DAPB 57
+#define HI6220_CS_ATB_DIV 58
+
+#define HI6220_SYS_NR_CLKS 59
+
+/* clk in Hi6220 media controller */
+/* gate clocks */
+#define HI6220_DSI_PCLK 1
+#define HI6220_G3D_PCLK 2
+#define HI6220_ACLK_CODEC_VPU 3
+#define HI6220_ISP_SCLK 4
+#define HI6220_ADE_CORE 5
+#define HI6220_MED_MMU 6
+#define HI6220_CFG_CSI4PHY 7
+#define HI6220_CFG_CSI2PHY 8
+#define HI6220_ISP_SCLK_GATE 9
+#define HI6220_ISP_SCLK_GATE1 10
+#define HI6220_ADE_CORE_GATE 11
+#define HI6220_CODEC_VPU_GATE 12
+#define HI6220_MED_SYSPLL 13
+
+/* mux clocks */
+#define HI6220_1440_1200 14
+#define HI6220_1000_1200 15
+#define HI6220_1000_1440 16
+
+/* divider clocks */
+#define HI6220_CODEC_JPEG 17
+#define HI6220_ISP_SCLK_SRC 18
+#define HI6220_ISP_SCLK1 19
+#define HI6220_ADE_CORE_SRC 20
+#define HI6220_ADE_PIX_SRC 21
+#define HI6220_G3D_CLK 22
+#define HI6220_CODEC_VPU_SRC 23
+
+#define HI6220_MEDIA_NR_CLKS 24
+
+/* clk in Hi6220 power controller */
+/* gate clocks */
+#define HI6220_PLL_GPU_GATE 1
+#define HI6220_PLL1_DDR_GATE 2
+#define HI6220_PLL_DDR_GATE 3
+#define HI6220_PLL_MEDIA_GATE 4
+#define HI6220_PLL0_BBP_GATE 5
+
+/* divider clocks */
+#define HI6220_DDRC_SRC 6
+#define HI6220_DDRC_AXI1 7
+
+#define HI6220_POWER_NR_CLKS 8
+#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
` (5 preceding siblings ...)
2015-05-30 1:51 ` [PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver Bintian Wang
@ 2015-06-02 0:14 ` Kevin Hilman
2015-06-02 3:57 ` Bintian
7 siblings, 0 replies; 21+ messages in thread
From: Kevin Hilman @ 2015-06-02 0:14 UTC (permalink / raw)
To: Bintian Wang
Cc: linux-arm-kernel, linux-kernel, catalin.marinas, will.deacon,
devicetree, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
galak, mturquette, rob.herring, zhangfei.gao, haojian.zhuang,
xuwei5, jh80.chung, olof, yanhaifeng, sboyd, xuejiancheng,
sledge.yanwei, tomeu.vizoso, linux, guodong.xu,
jorge.ramirez-ortiz, tyler.baker, pebolle, arnd, marc.zyngier,
xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, z.liuxinliang, heyunlei, kong.kongxinwei,
wangbintian, w.f, liguozhu
Bintian Wang <bintian.wang@huawei.com> writes:
> Hi6220 is one mobile solution of Hisilicon, this patchset contains
> initial support for Hi6220 SoC and HiKey development board, which
> supports octal ARM Cortex A53 cores. Initial support is minimal and
> includes just the arch configuration, device tree configuration, the
> clock driver has been picked up by clock maintainers in clk tree.
>
> PSCI is enabled in device tree and there is no problem to boot all the
> octal cores, and the CPU hotplug is also working now, you can download
> and compile the latest firmware based on the following link to run this
> patch set:
> https://github.com/96boards/documentation/wiki/UEFI
>
> Chnages v9:
> * Rebase to linus/master 4.1-rc1
> * Remove the clock driver from this version because the clock maintainers
> have queued up the clock driver:
> git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next-hi6220
> * This version also includes clock header file:
> [PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver
> Although above patch is included in clock driver, I add to this series
> because the device tree file includes it, there will be compile error
> without it.
> At last, we just need to keep one when merged together.
I know I already gave my tested-by on v8, but FYI, I also tested this
series on v4.1-rc1 merged with the clk-next-hi6220 branch currently in
the clk-next tree, and it's booting all 8 cores.
Next step: collect acks from DT maintainers for the bindings.
Kevin
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC
2015-05-30 1:50 [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Bintian Wang
` (6 preceding siblings ...)
2015-06-02 0:14 ` [PATCH v9 0/6] arm64,hi6220: Enable Hisilicon Hi6220 SoC Kevin Hilman
@ 2015-06-02 3:57 ` Bintian
7 siblings, 0 replies; 21+ messages in thread
From: Bintian @ 2015-06-02 3:57 UTC (permalink / raw)
To: Bintian Wang, linux-arm-kernel, linux-kernel, catalin.marinas,
will.deacon, devicetree, robh+dt, pawel.moll, mark.rutland,
ijc+devicetree, galak, khilman, mturquette, rob.herring,
zhangfei.gao, haojian.zhuang, xuwei5, jh80.chung, olof,
yanhaifeng, sboyd, xuejiancheng, sledge.yanwei, tomeu.vizoso,
linux, guodong.xu, jorge.ramirez-ortiz, tyler.baker, khilman,
pebolle, arnd, marc.zyngier
Cc: xuyiping, wangbinghui, zhenwei.wang, victor.lixin, puck.chen,
dan.zhao, huxinwei, z.liuxinliang, heyunlei, kong.kongxinwei,
wangbintian, w.f, liguozhu
Hi Will, Mark and other ARM64 DT maintainers,
Could you help ack this version? although Will, Kevin and Tyler have
tested this patch set, I think also need an ack from you.
The clock driver has been merged to linux-next, so I just add the clock
header file to this patch set to avoid compilation error.
Thanks,
Bintian
On 2015/5/30 9:50, Bintian Wang wrote:
> Hi6220 is one mobile solution of Hisilicon, this patchset contains
> initial support for Hi6220 SoC and HiKey development board, which
> supports octal ARM Cortex A53 cores. Initial support is minimal and
> includes just the arch configuration, device tree configuration, the
> clock driver has been picked up by clock maintainers in clk tree.
>
> PSCI is enabled in device tree and there is no problem to boot all the
> octal cores, and the CPU hotplug is also working now, you can download
> and compile the latest firmware based on the following link to run this
> patch set:
> https://github.com/96boards/documentation/wiki/UEFI
>
> Chnages v9:
> * Rebase to linus/master 4.1-rc1
> * Remove the clock driver from this version because the clock maintainers
> have queued up the clock driver:
> git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next-hi6220
> * This version also includes clock header file:
> [PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver
> Although above patch is included in clock driver, I add to this series
> because the device tree file includes it, there will be compile error
> without it.
> At last, we just need to keep one when merged together.
>
> Changes v6~v8:
> This three versions only modified the clock drivers based on the
> Stephen's review advices.
> * clk-hi6220.c:
> ** Split the clock header file from clock driver
> ** Delete setting the parents clock of UART1 to HI6220_150M in clock
> driver, we can do that using assigned-clock in dts when enable
> UART1 in the future.
> * clkdivider-hi6220.c:
> ** Reuse some functions exported by clk-divider.c
> ** Remove "pr_err" and CLK_IS_BASIC flag
> ** Fix some programing style problems
> * hisilicon/clk.h: remove the "__init" markings on some funcition
> prototypes.
>
> Changes v5:
> * Rebase to kernel 4.1-rc2
> * Add compatible string "hisilicon,hi6220-pl011" for Hisilicon designed
> UART
> * clk-hi6220.c: use __initdata for non-const arrays based on the commit
> 692d8328e8c039f9497eb862c6cf835de922c061
>
> Changes v4:
> * Rebase to kernel 4.1-rc1
> * Delete "arm,cortex-a15-gic" from the gic node in dts
>
> Changes v3:
> * Verified the CPU hotplug based on the new released firmware
> * Redefined the compatible strings of four system controllers in dts
> * Setting COMMON_CLK_HI6220 to a bool symbol
> * Keep CONFGI_ARCH_HISI sorted alphabetically
>
> Changes v2:
> * Split the DT bindings documents into earlier patches
> * Change SMP enable method from spin-table to PSCI in device tree
> * Remove "clock-frequency" from armv8-timer device node in device tree
> * Add more description about Hisilicon designed system controllers
> in DT bindings document
> * Enable high speed clock on UART1 mux
> * Other changes based on the discussion in the mailing list:
> https://lkml.org/lkml/2015/2/5/147
>
> Bintian Wang (6):
> arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig
> arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
> clk: hi6220: Document devicetree bindings for hi6220 clock
> Documentation: DT: PL011: hi6220: add compatible string for Hisilicon
> designed UART
> arm64: dts: Add dts files for Hisilicon Hi6220 SoC
> dt-bindings: Add header file of hi6220 clock driver
>
> .../bindings/arm/hisilicon/hisilicon.txt | 87 ++++++++++
> .../devicetree/bindings/clock/hi6220-clock.txt | 34 ++++
> Documentation/devicetree/bindings/serial/pl011.txt | 4 +-
> arch/arm64/Kconfig | 5 +
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/hisilicon/Makefile | 5 +
> arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 31 ++++
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 172 +++++++++++++++++++
> arch/arm64/configs/defconfig | 1 +
> include/dt-bindings/clock/hi6220-clock.h | 173 ++++++++++++++++++++
> 10 files changed, 512 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/clock/hi6220-clock.txt
> create mode 100644 arch/arm64/boot/dts/hisilicon/Makefile
> create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
> create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> create mode 100644 include/dt-bindings/clock/hi6220-clock.h
>
^ permalink raw reply [flat|nested] 21+ messages in thread