From: Chen Feng <puck.chen@hisilicon.com>
To: <puck.chen@hisilicon.com>, <p.zabel@pengutronix.de>,
<linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
<pawel.moll@arm.com>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>
Subject: [PATCH V5 Base on RC7 1/3] Add DT bindings documentation for hi6220 SoC reset controller.
Date: Tue, 27 Oct 2015 17:51:36 +0800 [thread overview]
Message-ID: <1445939498-94147-1-git-send-email-puck.chen@hisilicon.com> (raw)
docs: dts: Added documentation for hi6220 Reset Controller
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
---
.../bindings/reset/hisilicon,hi6220-reset.txt | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
new file mode 100644
index 0000000..02a8dae
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
@@ -0,0 +1,32 @@
+Hisilicon System Reset Controller
+======================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+The reset controller node must be a sub-node of the chip controller
+node on SoCs.
+
+Required properties:
+- compatible: may be "hisilicon,hi6220-reset-ctl"
+- reg: should be register base and length as documented in the
+ datasheet
+- #reset-cells: 1, see below
+
+Example:
+
+reset_ctrl: reset_ctrl@f7030000 {
+compatible = "hisilicon,hi6220-reset-ctl";
+reg = <0x0 0xf7030000 0x0 0x1000>;
+#reset-cells = <1>;
+};
+
+Specifying reset lines connected to IP modules
+==============================================
+example:
+
+ uart1: uart1@..... {
+ ...
+ resets = <&reset_ctrl 0x305>;
+ ...
+ };
--
1.9.1
next reply other threads:[~2015-10-27 9:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-27 9:51 Chen Feng [this message]
2015-10-27 9:51 ` [PATCH V5 Base on RC7 2/3] Add reset controller for hi6220 SoC platform Chen Feng
2015-10-27 9:51 ` [PATCH V5 Base on RC7 3/3] " Chen Feng
2015-10-28 11:42 ` Philipp Zabel
2015-10-29 8:34 ` chenfeng
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