From: Borislav Petkov <bp@alien8.de>
To: Ingo Molnar <mingo@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH 6/7] EDAC, mce_amd: Detect SMCA using X86_FEATURE_SMCA
Date: Wed, 11 May 2016 14:58:28 +0200 [thread overview]
Message-ID: <1462971509-3856-7-git-send-email-bp@alien8.de> (raw)
In-Reply-To: <1462971509-3856-1-git-send-email-bp@alien8.de>
From: Yazen Ghannam <Yazen.Ghannam@amd.com>
Use X86_FEATURE_SMCA when detecting if SMCA is available instead of
directly using CPUID 0x80000007_EBX.
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: <x86@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1462914639-29513-5-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
drivers/edac/mce_amd.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 49768c08ac07..9b6800a79c7f 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -1052,7 +1052,6 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
struct mce *m = (struct mce *)data;
struct cpuinfo_x86 *c = &cpu_data(m->extcpu);
int ecc;
- u32 ebx = cpuid_ebx(0x80000007);
if (amd_filter_mce(m))
return NOTIFY_STOP;
@@ -1075,7 +1074,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
((m->status & MCI_STATUS_DEFERRED) ? "Deferred" : "-"),
((m->status & MCI_STATUS_POISON) ? "Poison" : "-"));
- if (!!(ebx & BIT(3))) {
+ if (boot_cpu_has(X86_FEATURE_SMCA)) {
u32 low, high;
u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
@@ -1094,7 +1093,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
if (m->status & MCI_STATUS_ADDRV)
pr_emerg(HW_ERR "MC%d Error Address: 0x%016llx\n", m->bank, m->addr);
- if (!!(ebx & BIT(3))) {
+ if (boot_cpu_has(X86_FEATURE_SMCA)) {
decode_smca_errors(m);
goto err_code;
}
@@ -1149,7 +1148,6 @@ static struct notifier_block amd_mce_dec_nb = {
static int __init mce_amd_init(void)
{
struct cpuinfo_x86 *c = &boot_cpu_data;
- u32 ebx;
if (c->x86_vendor != X86_VENDOR_AMD)
return -ENODEV;
@@ -1205,9 +1203,8 @@ static int __init mce_amd_init(void)
break;
case 0x17:
- ebx = cpuid_ebx(0x80000007);
xec_mask = 0x3f;
- if (!(ebx & BIT(3))) {
+ if (!boot_cpu_has(X86_FEATURE_SMCA)) {
printk(KERN_WARNING "Decoding supported only on Scalable MCA processors.\n");
goto err_out;
}
--
2.7.3
next prev parent reply other threads:[~2016-05-11 12:59 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-11 12:58 [PATCH 0/7] x86/ras: RAS queue Borislav Petkov
2016-05-11 12:58 ` [PATCH 1/7] x86/mce/AMD: Log Deferred Errors using SMCA MCA_DE{STAT,ADDR} registers Borislav Petkov
2016-05-12 10:26 ` [tip:ras/core] " tip-bot for Yazen Ghannam
2016-05-11 12:58 ` [PATCH 2/7] x86/mce/AMD: Disable LogDeferredInMcaStat for SMCA systems Borislav Petkov
2016-05-12 10:27 ` [tip:ras/core] " tip-bot for Yazen Ghannam
2016-05-11 12:58 ` [PATCH 3/7] x86/mce/AMD: Save an indentation level in prepare_threshold_block() Borislav Petkov
2016-05-12 10:27 ` [tip:ras/core] " tip-bot for Borislav Petkov
2016-05-11 12:58 ` [PATCH 4/7] x86/cpu: Add detection of AMD RAS Capabilities Borislav Petkov
2016-05-12 10:27 ` [tip:ras/core] " tip-bot for Yazen Ghannam
2016-05-11 12:58 ` [PATCH 5/7] x86/mce: Update AMD mcheck init to use cpu_has() facilities Borislav Petkov
2016-05-12 10:28 ` [tip:ras/core] " tip-bot for Yazen Ghannam
2016-05-11 12:58 ` Borislav Petkov [this message]
2016-05-12 10:28 ` [tip:ras/core] EDAC, mce_amd: Detect SMCA using X86_FEATURE_SMCA tip-bot for Yazen Ghannam
2016-05-11 12:58 ` [PATCH 7/7] x86/RAS: Add SMCA support to AMD Error Injector Borislav Petkov
2016-05-12 10:29 ` [tip:ras/core] " tip-bot for Yazen Ghannam
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