From: Matt Redfearn <matt.redfearn@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>,
Matt Redfearn <matt.redfearn@imgtec.com>,
<linux-kernel@vger.kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
James Hogan <james.hogan@imgtec.com>,
Qais Yousef <qsyousef@gmail.com>,
Paul Burton <paul.burton@imgtec.com>
Subject: [PATCH 09/10] MIPS: SMP: Wrap call to mips_cpc_lock_other in mips_cm_lock_other
Date: Wed, 31 Aug 2016 11:44:38 +0100 [thread overview]
Message-ID: <1472640279-26593-10-git-send-email-matt.redfearn@imgtec.com> (raw)
In-Reply-To: <1472640279-26593-1-git-send-email-matt.redfearn@imgtec.com>
All calls to mips_cpc_lock_other should be wrapped in
mips_cm_lock_other. This only matters if the system has CM3 and is using
cpu idle, since otherwise a) the CPC lock is sufficent for CM < 3 and b)
any systems with CM > 3 have not been able to use cpu idle until now.
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
---
arch/mips/kernel/smp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index f95f094f36e4..78ccd5388654 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -192,9 +192,11 @@ void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
continue;
while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
+ mips_cm_lock_other(core, 0);
mips_cpc_lock_other(core);
write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
mips_cpc_unlock_other();
+ mips_cm_unlock_other();
}
}
}
--
2.7.4
next prev parent reply other threads:[~2016-08-31 10:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-31 10:44 [PATCH 00/10] MIPS CPC fixup and CPU Idle for MIPSr6 CPUs Matt Redfearn
2016-08-31 10:44 ` [PATCH 01/10] MIPS: CPC: Convert bare 'unsigned' to 'unsigned int' Matt Redfearn
2016-08-31 10:44 ` [PATCH 02/10] MIPS: CPC: Avoid lock when MIPS CM >= 3 is present Matt Redfearn
2016-08-31 10:44 ` [PATCH 03/10] MIPS: pm-cps: Change FSB workaround to CPU blacklist Matt Redfearn
2016-08-31 10:44 ` [PATCH 04/10] MIPS: pm-cps: Remove I6400 sync types Matt Redfearn
2016-08-31 10:44 ` [PATCH 05/10] MIPS: pm-cps: Add P6600 implementation lightweight " Matt Redfearn
2016-08-31 10:44 ` [PATCH 06/10] MIPS: pm-cps: Use MIPS standard lightweight ordering barrier Matt Redfearn
2016-08-31 11:48 ` Peter Zijlstra
2016-08-31 13:36 ` Matt Redfearn
2016-08-31 14:28 ` Peter Zijlstra
2016-08-31 15:49 ` Matt Redfearn
2016-08-31 10:44 ` [PATCH 07/10] MIPS: pm-cps: Add MIPSr6 CPU support Matt Redfearn
2016-08-31 10:44 ` [PATCH 08/10] MIPS: pm-cps: Support CM3 changes to Coherence Enable Register Matt Redfearn
2016-08-31 10:44 ` Matt Redfearn [this message]
2016-08-31 10:44 ` [PATCH 10/10] cpuidle: cpuidle-cps: Enable use with MIPSr6 CPUs Matt Redfearn
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