From: <shh.xie@gmail.com>
To: <devicetree@vger.kernel.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <linux-arm-kernel@lists.infradead.org>,
<catalin.marinas@arm.com>, <will.deacon@arm.com>,
<shawnguo@kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <arnd@arndb.de>, Shaohui Xie <Shaohui.Xie@nxp.com>
Subject: [PATCH 1/7] [v2] dt-bindings: fsl: updates bindings for some SoC-specific devices
Date: Mon, 5 Sep 2016 18:01:29 +0800 [thread overview]
Message-ID: <1473069695-33092-2-git-send-email-shh.xie@gmail.com> (raw)
In-Reply-To: <1473069695-33092-1-git-send-email-shh.xie@gmail.com>
From: Shaohui Xie <Shaohui.Xie@nxp.com>
SCFG and DCFG are SoC-specific devices can be found on SoCs like LS1021A,
LS1043A and LS1046A, this patch updates bindings for SCFG and DCFG to
reflect more SoCs.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
---
changes in V2:
new patch.
Documentation/devicetree/bindings/arm/fsl.txt | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index dbbc095..6f92d0b 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -97,7 +97,7 @@ Freescale LS1021A Platform Device Tree Bindings
Required root node compatible properties:
- compatible = "fsl,ls1021a";
-Freescale LS1021A SoC-specific Device Tree Bindings
+Freescale SoC-specific Device Tree Bindings
-------------------------------------------
Freescale SCFG
@@ -105,7 +105,10 @@ Freescale SCFG
configuration and status registers for the chip. Such as getting PEX port
status.
Required properties:
- - compatible: should be "fsl,ls1021a-scfg"
+ - compatible: Should contain a chip-specific compatible string,
+ Chip-specific strings are of the form "fsl,<chip>-scfg", such as:
+ "fsl,ls1021a-scfg"
+
- reg: should contain base address and length of SCFG memory-mapped registers
Example:
@@ -119,7 +122,10 @@ Freescale DCFG
configuration and status for the device. Such as setting the secondary
core start address and release the secondary core from holdoff and startup.
Required properties:
- - compatible: should be "fsl,ls1021a-dcfg"
+ - compatible: Should contain a chip-specific compatible string,
+ Chip-specific strings are of the form "fsl,<chip>-dcfg", such as:
+ "fsl,ls1021a-dcfg"
+
- reg : should contain base address and length of DCFG memory-mapped registers
Example:
--
2.1.0.27.g96db324
next prev parent reply other threads:[~2016-09-05 10:30 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-05 10:01 [PATCH 0/7] [v2] arm64: dts: add QorIQ LS1046A SoC and boards support shh.xie
2016-09-05 10:01 ` shh.xie [this message]
2016-09-08 2:30 ` [PATCH 1/7] [v2] dt-bindings: fsl: updates bindings for some SoC-specific devices Shawn Guo
2016-09-08 10:57 ` S.H. Xie
2016-09-05 10:01 ` [PATCH 2/7] [v2] dt-bindings: i2c: adds two more nxp devices shh.xie
2016-09-12 16:33 ` Rob Herring
2016-09-05 10:01 ` [PATCH 3/7] [v2] arm64: dts: add QorIQ LS1046A SoC support shh.xie
2016-09-08 13:05 ` Shawn Guo
2016-09-09 6:46 ` S.H. Xie
2016-09-08 13:13 ` Mark Rutland
2016-09-08 13:18 ` Mark Rutland
2016-09-09 6:55 ` S.H. Xie
2016-09-09 9:10 ` Mark Rutland
2016-09-09 9:17 ` S.H. Xie
2016-09-09 6:48 ` S.H. Xie
2016-09-08 13:23 ` Marc Zyngier
2016-09-09 9:00 ` S.H. Xie
2016-09-05 10:01 ` [PATCH 4/7] [v2] Documentation: DT: Add entry for QorIQ LS1046A-RDB board shh.xie
2016-09-05 10:01 ` [PATCH 5/7] [v2] arm64: dts: add LS1046A-RDB board support shh.xie
2016-09-08 13:12 ` Shawn Guo
2016-09-09 6:44 ` S.H. Xie
2016-09-05 10:01 ` [PATCH 6/7] [v2] Documentation: DT: Add entry for QorIQ LS1046A-QDS board shh.xie
2016-09-05 10:01 ` [PATCH 7/7] [v2] arm64: dts: add LS1046A-QDS board support shh.xie
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