From: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
To: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org
Cc: bp@suse.de, dave.hansen@linux.intel.com,
lukasz.daniluk@intel.com, james.h.cownie@intel.com,
jacob.jun.pan@intel.com, Piotr.Luc@intel.com,
linux-kernel@vger.kernel.org,
Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
Subject: [PATCH v8: 2/4] x86/elf: Use HWCAP2 to expose ring 3 MWAIT
Date: Tue, 1 Nov 2016 11:14:48 +0100 [thread overview]
Message-ID: <1477995290-25079-3-git-send-email-grzegorz.andrejczuk@intel.com> (raw)
In-Reply-To: <1477995290-25079-1-git-send-email-grzegorz.andrejczuk@intel.com>
Add HWCAP2 for x86 and reserve its bit 0 to expose
ring 3 mwait.
Signed-off-by: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
---
arch/x86/include/asm/elf.h | 9 +++++++++
arch/x86/include/uapi/asm/hwcap2.h | 7 +++++++
arch/x86/kernel/cpu/common.c | 3 +++
3 files changed, 19 insertions(+)
create mode 100644 arch/x86/include/uapi/asm/hwcap2.h
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index e7f155c..59703aa 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -258,6 +258,15 @@ extern int force_personality32;
#define ELF_HWCAP (boot_cpu_data.x86_capability[CPUID_1_EDX])
+extern unsigned int elf_hwcap2;
+
+/*
+ * HWCAP2 supplies mask with kernel enabled CPU features, so that
+ * the application can discover that it can safely use them.
+ * The bits are defined in uapi/asm/hwcap2.h.
+ */
+#define ELF_HWCAP2 elf_hwcap2
+
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
intent than poking at uname or /proc/cpuinfo.
diff --git a/arch/x86/include/uapi/asm/hwcap2.h b/arch/x86/include/uapi/asm/hwcap2.h
new file mode 100644
index 0000000..9e7c117
--- /dev/null
+++ b/arch/x86/include/uapi/asm/hwcap2.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_HWCAP2_H
+#define _ASM_HWCAP2_H
+
+/* Kernel enabled Ring 3 MWAIT for Xeon Phi*/
+#define HWCAP2_RING3MWAIT (1 << 0)
+
+#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index bcc9ccc..fdbf708 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -35,6 +35,7 @@
#include <asm/desc.h>
#include <asm/fpu/internal.h>
#include <asm/mtrr.h>
+#include <asm/hwcap2.h>
#include <linux/numa.h>
#include <asm/asm.h>
#include <asm/bugs.h>
@@ -51,6 +52,8 @@
#include "cpu.h"
+unsigned int elf_hwcap2 __read_mostly;
+
/* all of these masks are initialized in setup_cpu_local_masks() */
cpumask_var_t cpu_initialized_mask;
cpumask_var_t cpu_callout_mask;
--
2.5.1
next prev parent reply other threads:[~2016-11-01 10:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-01 10:14 [PATCH v8: 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Grzegorz Andrejczuk
2016-11-01 10:14 ` [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit Grzegorz Andrejczuk
2016-11-03 14:54 ` Borislav Petkov
2016-11-03 17:00 ` Thomas Gleixner
2016-11-04 6:47 ` Andrejczuk, Grzegorz
2016-11-07 20:48 ` Thomas Gleixner
2016-11-01 10:14 ` Grzegorz Andrejczuk [this message]
2016-11-01 10:14 ` [PATCH v8: 3/4] x86/cpufeature: Add PHIR3MWAIT to CPU features Grzegorz Andrejczuk
2016-11-03 14:56 ` Borislav Petkov
2016-11-03 16:01 ` [PATCH v8 " Grzegorz Andrejczuk
2016-11-01 10:14 ` [PATCH v8: 4/4] x86/cpufeatures: Handle RING3MWAIT on Xeon Phi models Grzegorz Andrejczuk
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