From: Wu Hao <hao.wu@intel.com>
To: atull@kernel.org, moritz.fischer@ettus.com,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: luwei.kang@intel.com, yi.z.zhang@intel.com, hao.wu@intel.com,
Tim Whisonant <tim.whisonant@intel.com>,
Enno Luebbers <enno.luebbers@intel.com>,
Shiva Rao <shiva.rao@intel.com>,
Christopher Rauer <christopher.rauer@intel.com>,
Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: [PATCH 03/16] fpga: intel: add FPGA PCIe device driver
Date: Thu, 30 Mar 2017 20:08:03 +0800 [thread overview]
Message-ID: <1490875696-15145-4-git-send-email-hao.wu@intel.com> (raw)
In-Reply-To: <1490875696-15145-1-git-send-email-hao.wu@intel.com>
From: Zhang Yi <yi.z.zhang@intel.com>
The Intel FPGA device appears as a PCIe device on the system. This patch
implements the basic framework of the driver for Intel PCIe device which
locates between CPU and Accelerated Function Units (AFUs).
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Zhang Yi <yi.z.zhang@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
---
drivers/fpga/Kconfig | 2 +
drivers/fpga/Makefile | 3 +
drivers/fpga/intel/Kconfig | 27 +++++++++
drivers/fpga/intel/LICENSE.BSD | 24 ++++++++
drivers/fpga/intel/Makefile | 3 +
drivers/fpga/intel/pcie.c | 129 +++++++++++++++++++++++++++++++++++++++++
6 files changed, 188 insertions(+)
create mode 100644 drivers/fpga/intel/Kconfig
create mode 100644 drivers/fpga/intel/LICENSE.BSD
create mode 100644 drivers/fpga/intel/Makefile
create mode 100644 drivers/fpga/intel/pcie.c
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index d99b640..4e49aee 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -69,6 +69,8 @@ config ALTERA_FREEZE_BRIDGE
isolate one region of the FPGA from the busses while that
region is being reprogrammed.
+source "drivers/fpga/intel/Kconfig"
+
endif # FPGA
endmenu
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 53a41d2..46f1a5d 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -20,3 +20,6 @@ obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
# High Level Interfaces
obj-$(CONFIG_FPGA_REGION) += fpga-region.o
+
+# Intel FPGA Support
+obj-$(CONFIG_INTEL_FPGA) += intel/
diff --git a/drivers/fpga/intel/Kconfig b/drivers/fpga/intel/Kconfig
new file mode 100644
index 0000000..bf402f3
--- /dev/null
+++ b/drivers/fpga/intel/Kconfig
@@ -0,0 +1,27 @@
+menuconfig INTEL_FPGA
+ tristate "Intel(R) FPGA support"
+ depends on FPGA_DEVICE
+ help
+ Select this option to enable driver support for Intel(R)
+ Field-Programmable Gate Array (FPGA) solutions. This driver
+ provides interfaces for userspace applications to configure,
+ enumerate, open, and access FPGA accelerators on platforms
+ equipped with Intel(R) FPGA solutions and enables system
+ level management functions such as FPGA reconfiguration,
+ power management, and virtualization.
+
+ Say Y if your platform has this technology. Say N if unsure.
+
+if INTEL_FPGA
+
+config INTEL_FPGA_PCI
+ tristate "Intel FPGA PCIe Driver"
+ depends on PCI
+ help
+ This is the driver for the PCIe device which locates between
+ CPU and Accelerated Function Units (AFUs) and allows them to
+ communicate with each other.
+
+ To compile this as a module, choose M here.
+
+endif
diff --git a/drivers/fpga/intel/LICENSE.BSD b/drivers/fpga/intel/LICENSE.BSD
new file mode 100644
index 0000000..309d2b7
--- /dev/null
+++ b/drivers/fpga/intel/LICENSE.BSD
@@ -0,0 +1,24 @@
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+ * Neither the name of Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/drivers/fpga/intel/Makefile b/drivers/fpga/intel/Makefile
new file mode 100644
index 0000000..61fd8ea
--- /dev/null
+++ b/drivers/fpga/intel/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_INTEL_FPGA_PCI) += intel-fpga-pci.o
+
+intel-fpga-pci-objs := pcie.o
diff --git a/drivers/fpga/intel/pcie.c b/drivers/fpga/intel/pcie.c
new file mode 100644
index 0000000..132d9da
--- /dev/null
+++ b/drivers/fpga/intel/pcie.c
@@ -0,0 +1,129 @@
+/*
+ * Driver for Intel FPGA PCIe device
+ *
+ * Copyright (C) 2017 Intel Corporation, Inc.
+ *
+ * Authors:
+ * Zhang Yi <Yi.Z.Zhang@intel.com>
+ * Xiao Guangrong <guangrong.xiao@linux.intel.com>
+ * Joseph Grecco <joe.grecco@intel.com>
+ * Enno Luebbers <enno.luebbers@intel.com>
+ * Tim Whisonant <tim.whisonant@intel.com>
+ * Ananda Ravuri <ananda.ravuri@intel.com>
+ * Henry Mitchel <henry.mitchel@intel.com>
+ *
+ * This work is licensed under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license. See the
+ * LICENSE.BSD file under this directory for the BSD license and see
+ * the COPYING file in the top-level directory for the GPLv2 license.
+ */
+
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/stddef.h>
+#include <linux/errno.h>
+#include <linux/aer.h>
+
+#define DRV_VERSION "EXPERIMENTAL VERSION"
+#define DRV_NAME "intel-fpga-pci"
+
+/* PCI Device ID */
+#define PCIe_DEVICE_ID_PF_INT_5_X 0xBCBD
+#define PCIe_DEVICE_ID_PF_INT_6_X 0xBCC0
+#define PCIe_DEVICE_ID_PF_DSC_1_X 0x09C4
+/* VF Device */
+#define PCIe_DEVICE_ID_VF_INT_5_X 0xBCBF
+#define PCIe_DEVICE_ID_VF_INT_6_X 0xBCC1
+#define PCIe_DEVICE_ID_VF_DSC_1_X 0x09C5
+
+static struct pci_device_id cci_pcie_id_tbl[] = {
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_PF_INT_5_X),},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_INT_5_X),},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_PF_INT_6_X),},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_INT_6_X),},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_PF_DSC_1_X),},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_DSC_1_X),},
+ {0,}
+};
+MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
+
+static
+int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid)
+{
+ int ret;
+
+ ret = pci_enable_device(pcidev);
+ if (ret < 0) {
+ dev_err(&pcidev->dev, "Failed to enable device %d.\n", ret);
+ goto exit;
+ }
+
+ ret = pci_enable_pcie_error_reporting(pcidev);
+ if (ret && ret != -EINVAL)
+ dev_info(&pcidev->dev, "PCIE AER unavailable %d.\n", ret);
+
+ ret = pci_request_regions(pcidev, DRV_NAME);
+ if (ret) {
+ dev_err(&pcidev->dev, "Failed to request regions.\n");
+ goto disable_error_report_exit;
+ }
+
+ pci_set_master(pcidev);
+ pci_save_state(pcidev);
+
+ if (!dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64))) {
+ dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64));
+ } else if (!dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32))) {
+ dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32));
+ } else {
+ ret = -EIO;
+ dev_err(&pcidev->dev, "No suitable DMA support available.\n");
+ goto release_region_exit;
+ }
+
+ /* TODO: create and add the platform device per feature list */
+ return 0;
+
+release_region_exit:
+ pci_release_regions(pcidev);
+disable_error_report_exit:
+ pci_disable_pcie_error_reporting(pcidev);
+ pci_disable_device(pcidev);
+exit:
+ return ret;
+}
+
+static void cci_pci_remove(struct pci_dev *pcidev)
+{
+ pci_release_regions(pcidev);
+ pci_disable_pcie_error_reporting(pcidev);
+ pci_disable_device(pcidev);
+}
+
+static struct pci_driver cci_pci_driver = {
+ .name = DRV_NAME,
+ .id_table = cci_pcie_id_tbl,
+ .probe = cci_pci_probe,
+ .remove = cci_pci_remove,
+};
+
+static int __init ccidrv_init(void)
+{
+ pr_info("Intel(R) FPGA PCIe Driver: Version %s\n", DRV_VERSION);
+
+ return pci_register_driver(&cci_pci_driver);
+}
+
+static void __exit ccidrv_exit(void)
+{
+ pci_unregister_driver(&cci_pci_driver);
+}
+
+module_init(ccidrv_init);
+module_exit(ccidrv_exit);
+
+MODULE_DESCRIPTION("Intel FPGA PCIe Device Driver");
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("Dual BSD/GPL");
--
2.7.4
next prev parent reply other threads:[~2017-03-30 12:15 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-30 12:08 [PATCH 00/16] Intel FPGA Device Drivers Wu Hao
2017-03-30 12:08 ` [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-03-31 18:24 ` matthew.gerlach
2017-03-31 18:38 ` Alan Tull
2017-04-01 11:16 ` Wu Hao
2017-04-02 14:41 ` Moritz Fischer
2017-04-03 20:44 ` Alan Tull
2017-04-04 5:24 ` Wu Hao
2017-04-04 5:06 ` Wu Hao
2017-04-11 18:02 ` Alan Tull
2017-04-12 3:22 ` Wu, Hao
2017-03-30 12:08 ` [PATCH 02/16] fpga: add FPGA device framework Wu Hao
2017-03-31 6:09 ` Greg KH
2017-03-31 7:48 ` Wu Hao
2017-03-31 9:03 ` Greg KH
2017-03-31 12:19 ` Wu Hao
2017-03-31 19:01 ` matthew.gerlach
2017-04-01 12:18 ` Wu Hao
2017-07-25 21:32 ` Alan Tull
2017-07-26 9:50 ` Wu Hao
2017-07-26 14:20 ` Alan Tull
2017-07-26 22:29 ` Alan Tull
2017-07-27 4:54 ` Wu Hao
2017-03-31 6:13 ` Greg KH
[not found] ` <82D7661F83C1A047AF7DC287873BF1E167C90F1B@SHSMSX101.ccr.corp.intel.com>
2017-03-31 13:31 ` Wu Hao
2017-03-31 14:10 ` Greg KH
2017-04-01 11:36 ` Wu Hao
2017-03-30 12:08 ` Wu Hao [this message]
2017-04-04 2:10 ` [PATCH 03/16] fpga: intel: add FPGA PCIe device driver Moritz Fischer
2017-04-05 13:14 ` Wu, Hao
2017-03-30 12:08 ` [PATCH 04/16] fpga: intel: pcie: parse feature list and create platform device for features Wu Hao
2017-04-03 21:44 ` Alan Tull
2017-04-05 11:58 ` Wu Hao
2017-04-11 20:21 ` Alan Tull
2017-04-13 4:12 ` Wu, Hao
2017-04-04 2:44 ` Moritz Fischer
2017-04-05 12:57 ` Wu Hao
2017-04-04 22:09 ` Alan Tull
2017-04-05 14:09 ` Wu Hao
2017-05-04 15:13 ` Li, Yi
2017-05-05 3:03 ` Wu Hao
2017-03-30 12:08 ` [PATCH 05/16] fpga: intel: pcie: add chardev support for feature devices Wu Hao
2017-03-30 12:08 ` [PATCH 06/16] fpga: intel: pcie: adds fpga_for_each_port callback for fme device Wu Hao
2017-03-30 12:08 ` [PATCH 07/16] fpga: intel: add feature device infrastructure Wu Hao
2017-03-30 12:08 ` [PATCH 08/16] fpga: intel: add FPGA Management Engine driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 09/16] fpga: intel: fme: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 10/16] fpga: intel: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 11/16] fpga: intel: fme: add partial reconfiguration sub feature support Wu Hao
2017-03-30 20:30 ` Alan Tull
2017-03-31 4:11 ` Xiao Guangrong
2017-03-31 8:50 ` Wu Hao
2017-04-03 20:26 ` Alan Tull
2017-04-04 5:25 ` Wu Hao
2017-03-31 19:10 ` Alan Tull
2017-04-01 11:08 ` Wu Hao
2017-04-03 16:30 ` Alan Tull
2017-04-04 6:05 ` Wu Hao
2017-04-04 22:37 ` Alan Tull
2017-04-05 11:40 ` Wu, Hao
2017-04-05 15:26 ` Alan Tull
2017-04-05 15:39 ` Alan Tull
2017-04-06 10:57 ` Wu Hao
2017-04-06 19:27 ` Alan Tull
2017-04-07 5:56 ` Wu Hao
2017-03-31 23:45 ` kbuild test robot
2017-04-01 1:12 ` kbuild test robot
2017-04-03 21:24 ` Alan Tull
2017-04-03 22:49 ` matthew.gerlach
2017-04-04 6:48 ` Wu Hao
2017-04-04 6:28 ` Wu Hao
2017-03-30 12:08 ` [PATCH 12/16] fpga: intel: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 13/16] fpga: intel: afu: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 14/16] fpga: intel: afu add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 15/16] fpga: intel: afu: add user afu sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 16/16] fpga: intel: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-04-01 0:00 ` kbuild test robot
2017-04-01 1:33 ` kbuild test robot
2017-03-30 17:17 ` [PATCH 00/16] Intel FPGA Device Drivers Moritz Fischer
2017-04-06 20:27 ` Jerome Glisse
2017-04-11 19:38 ` Luebbers, Enno
2017-04-12 13:29 ` Jerome Glisse
2017-04-12 14:46 ` Moritz Fischer
2017-04-12 15:37 ` Jerome Glisse
2017-04-14 19:48 ` Luebbers, Enno
2017-04-14 20:49 ` Jerome Glisse
2017-04-17 15:35 ` Alan Tull
2017-04-17 15:57 ` Jerome Glisse
2017-04-17 16:22 ` Alan Tull
2017-04-17 17:15 ` Jerome Glisse
2017-04-18 13:36 ` Alan Cox
2017-04-18 14:59 ` Jerome Glisse
2017-04-25 20:02 ` One Thousand Gnomes
2017-05-01 16:41 ` Jerome Glisse
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1490875696-15145-4-git-send-email-hao.wu@intel.com \
--to=hao.wu@intel.com \
--cc=atull@kernel.org \
--cc=christopher.rauer@intel.com \
--cc=enno.luebbers@intel.com \
--cc=guangrong.xiao@linux.intel.com \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luwei.kang@intel.com \
--cc=moritz.fischer@ettus.com \
--cc=shiva.rao@intel.com \
--cc=tim.whisonant@intel.com \
--cc=yi.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).