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From: Wu Hao <hao.wu@intel.com>
To: atull@kernel.org, moritz.fischer@ettus.com,
	linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: luwei.kang@intel.com, yi.z.zhang@intel.com, hao.wu@intel.com,
	Xiao Guangrong <guangrong.xiao@linux.intel.com>,
	Tim Whisonant <tim.whisonant@intel.com>,
	Enno Luebbers <enno.luebbers@intel.com>,
	Shiva Rao <shiva.rao@intel.com>,
	Christopher Rauer <christopher.rauer@intel.com>
Subject: [PATCH 07/16] fpga: intel: add feature device infrastructure
Date: Thu, 30 Mar 2017 20:08:07 +0800	[thread overview]
Message-ID: <1490875696-15145-8-git-send-email-hao.wu@intel.com> (raw)
In-Reply-To: <1490875696-15145-1-git-send-email-hao.wu@intel.com>

From: Xiao Guangrong <guangrong.xiao@linux.intel.com>

This patch abstracts the common operations of the sub features, and defines
the feature_ops data structure, including init, uinit and ioctl function
pointers. And this patch adds some common helper functions for FME and AFU
drivers, e.g feature_dev_use_begin/end which are used to ensure exclusive
usage of the feature device file.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Kang Luwei <luwei.kang@intel.com>
Signed-off-by: Zhang Yi <yi.z.zhang@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
---
 drivers/fpga/intel/feature-dev.c | 66 +++++++++++++++++++++++++++++++++++++
 drivers/fpga/intel/feature-dev.h | 71 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 137 insertions(+)

diff --git a/drivers/fpga/intel/feature-dev.c b/drivers/fpga/intel/feature-dev.c
index ada6548..d729db8 100644
--- a/drivers/fpga/intel/feature-dev.c
+++ b/drivers/fpga/intel/feature-dev.c
@@ -59,6 +59,72 @@ int port_feature_num(void)
 	return PORT_FEATURE_ID_MAX;
 }
 
+int fme_feature_to_resource_index(int feature_id)
+{
+	WARN_ON(feature_id >= FME_FEATURE_ID_MAX);
+	return feature_id;
+}
+
+void fpga_dev_feature_uinit(struct platform_device *pdev)
+{
+	struct feature *feature;
+	struct feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
+
+	fpga_dev_for_each_feature(pdata, feature)
+		if (feature->ops) {
+			feature->ops->uinit(pdev, feature);
+			feature->ops = NULL;
+		}
+}
+EXPORT_SYMBOL_GPL(fpga_dev_feature_uinit);
+
+static int
+feature_instance_init(struct platform_device *pdev,
+		      struct feature_platform_data *pdata,
+		      struct feature *feature, struct feature_driver *drv)
+{
+	int ret;
+
+	WARN_ON(!feature->ioaddr);
+
+	ret = drv->ops->init(pdev, feature);
+	if (ret)
+		return ret;
+
+	feature->ops = drv->ops;
+	return ret;
+}
+
+int fpga_dev_feature_init(struct platform_device *pdev,
+			  struct feature_driver *feature_drvs)
+{
+	struct feature *feature;
+	struct feature_driver *drv = feature_drvs;
+	struct feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
+	int ret;
+
+	while (drv->ops) {
+		fpga_dev_for_each_feature(pdata, feature) {
+			/* skip the feature which is not initialized. */
+			if (!feature->name)
+				continue;
+
+			if (!strcmp(drv->name, feature->name)) {
+				ret = feature_instance_init(pdev, pdata,
+							    feature, drv);
+				if (ret)
+					goto exit;
+			}
+		}
+		drv++;
+	}
+	return 0;
+exit:
+	fpga_dev_feature_uinit(pdev);
+	return ret;
+}
+EXPORT_SYMBOL_GPL(fpga_dev_feature_init);
+
 struct fpga_chardev_info {
 	const char *name;
 	dev_t devt;
diff --git a/drivers/fpga/intel/feature-dev.h b/drivers/fpga/intel/feature-dev.h
index 38531f8..9d39b94 100644
--- a/drivers/fpga/intel/feature-dev.h
+++ b/drivers/fpga/intel/feature-dev.h
@@ -207,12 +207,20 @@ struct feature_port_stp {
 
 #pragma pack()
 
+struct feature_driver {
+	const char *name;
+	struct feature_ops *ops;
+};
+
 struct feature {
 	const char *name;
 	int resource_index;
 	void __iomem *ioaddr;
+	struct feature_ops *ops;
 };
 
+#define DEV_STATUS_IN_USE	0
+
 struct feature_platform_data {
 	/* list the feature dev to cci_drvdata->port_dev_list. */
 	struct list_head node;
@@ -220,6 +228,9 @@ struct feature_platform_data {
 	struct cdev cdev;
 	struct platform_device *dev;
 	unsigned int disable_count;	/* count for port disable */
+	unsigned long dev_status;
+
+	void *private;			/* ptr to feature dev private data */
 
 	struct platform_device *(*fpga_for_each_port)(struct platform_device *,
 			void *, int (*match)(struct platform_device *, void *));
@@ -228,6 +239,38 @@ struct feature_platform_data {
 	struct feature features[0];
 };
 
+static inline int feature_dev_use_begin(struct feature_platform_data *pdata)
+{
+	/* Test and set IN_USE flags to ensure file is exclusively used */
+	if (test_and_set_bit_lock(DEV_STATUS_IN_USE, &pdata->dev_status))
+		return -EBUSY;
+
+	return 0;
+}
+
+static inline void feature_dev_use_end(struct feature_platform_data *pdata)
+{
+	clear_bit_unlock(DEV_STATUS_IN_USE, &pdata->dev_status);
+}
+
+static inline void
+fpga_pdata_set_private(struct feature_platform_data *pdata, void *private)
+{
+	pdata->private = private;
+}
+
+static inline void *fpga_pdata_get_private(struct feature_platform_data *pdata)
+{
+	return pdata->private;
+}
+
+struct feature_ops {
+	int (*init)(struct platform_device *pdev, struct feature *feature);
+	void (*uinit)(struct platform_device *pdev, struct feature *feature);
+	long (*ioctl)(struct platform_device *pdev, struct feature *feature,
+				unsigned int cmd, unsigned long arg);
+};
+
 enum fme_feature_id {
 	FME_FEATURE_ID_HEADER = 0x0,
 	FME_FEATURE_ID_THERMAL_MGMT = 0x1,
@@ -261,6 +304,10 @@ int feature_platform_data_size(int num);
 struct feature_platform_data *
 feature_platform_data_alloc_and_init(struct platform_device *dev, int num);
 
+void fpga_dev_feature_uinit(struct platform_device *pdev);
+int fpga_dev_feature_init(struct platform_device *pdev,
+			  struct feature_driver *feature_drvs);
+
 enum fpga_devt_type {
 	FPGA_DEVT_FME,
 	FPGA_DEVT_PORT,
@@ -330,6 +377,15 @@ static inline int fpga_port_reset(struct platform_device *pdev)
 	return ret;
 }
 
+static inline
+struct platform_device *fpga_inode_to_feature_dev(struct inode *inode)
+{
+	struct feature_platform_data *pdata;
+
+	pdata = container_of(inode->i_cdev, struct feature_platform_data, cdev);
+	return pdata->dev;
+}
+
 static inline void __iomem *
 get_feature_ioaddr_by_index(struct device *dev, int index)
 {
@@ -338,12 +394,27 @@ get_feature_ioaddr_by_index(struct device *dev, int index)
 	return pdata->features[index].ioaddr;
 }
 
+static inline bool is_feature_present(struct device *dev, int index)
+{
+	return !!get_feature_ioaddr_by_index(dev, index);
+}
+
 static inline struct device *
 fpga_feature_dev_to_pcidev(struct platform_device *dev)
 {
 	return dev->dev.parent->parent;
 }
 
+static inline struct device *
+fpga_pdata_to_pcidev(struct feature_platform_data *pdata)
+{
+	return fpga_feature_dev_to_pcidev(pdata->dev);
+}
+
+#define fpga_dev_for_each_feature(pdata, feature)			    \
+	for ((feature) = (pdata)->features;				    \
+	   (feature) < (pdata)->features + (pdata)->num; (feature)++)
+
 /*
  * Wait register's _field to be changed to the given value (_expect's _field)
  * by polling with given interval and timeout.
-- 
2.7.4

  parent reply	other threads:[~2017-03-30 12:15 UTC|newest]

Thread overview: 93+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-30 12:08 [PATCH 00/16] Intel FPGA Device Drivers Wu Hao
2017-03-30 12:08 ` [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-03-31 18:24   ` matthew.gerlach
2017-03-31 18:38     ` Alan Tull
2017-04-01 11:16       ` Wu Hao
2017-04-02 14:41         ` Moritz Fischer
2017-04-03 20:44           ` Alan Tull
2017-04-04  5:24             ` Wu Hao
2017-04-04  5:06           ` Wu Hao
2017-04-11 18:02           ` Alan Tull
2017-04-12  3:22             ` Wu, Hao
2017-03-30 12:08 ` [PATCH 02/16] fpga: add FPGA device framework Wu Hao
2017-03-31  6:09   ` Greg KH
2017-03-31  7:48     ` Wu Hao
2017-03-31  9:03       ` Greg KH
2017-03-31 12:19         ` Wu Hao
2017-03-31 19:01       ` matthew.gerlach
2017-04-01 12:18         ` Wu Hao
2017-07-25 21:32           ` Alan Tull
2017-07-26  9:50             ` Wu Hao
2017-07-26 14:20               ` Alan Tull
2017-07-26 22:29                 ` Alan Tull
2017-07-27  4:54                   ` Wu Hao
2017-03-31  6:13   ` Greg KH
     [not found]     ` <82D7661F83C1A047AF7DC287873BF1E167C90F1B@SHSMSX101.ccr.corp.intel.com>
2017-03-31 13:31       ` Wu Hao
2017-03-31 14:10         ` Greg KH
2017-04-01 11:36           ` Wu Hao
2017-03-30 12:08 ` [PATCH 03/16] fpga: intel: add FPGA PCIe device driver Wu Hao
2017-04-04  2:10   ` Moritz Fischer
2017-04-05 13:14     ` Wu, Hao
2017-03-30 12:08 ` [PATCH 04/16] fpga: intel: pcie: parse feature list and create platform device for features Wu Hao
2017-04-03 21:44   ` Alan Tull
2017-04-05 11:58     ` Wu Hao
2017-04-11 20:21       ` Alan Tull
2017-04-13  4:12         ` Wu, Hao
2017-04-04  2:44   ` Moritz Fischer
2017-04-05 12:57     ` Wu Hao
2017-04-04 22:09   ` Alan Tull
2017-04-05 14:09     ` Wu Hao
2017-05-04 15:13   ` Li, Yi
2017-05-05  3:03     ` Wu Hao
2017-03-30 12:08 ` [PATCH 05/16] fpga: intel: pcie: add chardev support for feature devices Wu Hao
2017-03-30 12:08 ` [PATCH 06/16] fpga: intel: pcie: adds fpga_for_each_port callback for fme device Wu Hao
2017-03-30 12:08 ` Wu Hao [this message]
2017-03-30 12:08 ` [PATCH 08/16] fpga: intel: add FPGA Management Engine driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 09/16] fpga: intel: fme: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 10/16] fpga: intel: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 11/16] fpga: intel: fme: add partial reconfiguration sub feature support Wu Hao
2017-03-30 20:30   ` Alan Tull
2017-03-31  4:11     ` Xiao Guangrong
2017-03-31  8:50       ` Wu Hao
2017-04-03 20:26         ` Alan Tull
2017-04-04  5:25           ` Wu Hao
2017-03-31 19:10   ` Alan Tull
2017-04-01 11:08     ` Wu Hao
2017-04-03 16:30       ` Alan Tull
2017-04-04  6:05         ` Wu Hao
2017-04-04 22:37           ` Alan Tull
2017-04-05 11:40             ` Wu, Hao
2017-04-05 15:26               ` Alan Tull
2017-04-05 15:39                 ` Alan Tull
2017-04-06 10:57                   ` Wu Hao
2017-04-06 19:27                     ` Alan Tull
2017-04-07  5:56                       ` Wu Hao
2017-03-31 23:45   ` kbuild test robot
2017-04-01  1:12   ` kbuild test robot
2017-04-03 21:24   ` Alan Tull
2017-04-03 22:49     ` matthew.gerlach
2017-04-04  6:48       ` Wu Hao
2017-04-04  6:28     ` Wu Hao
2017-03-30 12:08 ` [PATCH 12/16] fpga: intel: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 13/16] fpga: intel: afu: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 14/16] fpga: intel: afu add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 15/16] fpga: intel: afu: add user afu sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 16/16] fpga: intel: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-04-01  0:00   ` kbuild test robot
2017-04-01  1:33   ` kbuild test robot
2017-03-30 17:17 ` [PATCH 00/16] Intel FPGA Device Drivers Moritz Fischer
2017-04-06 20:27 ` Jerome Glisse
2017-04-11 19:38   ` Luebbers, Enno
2017-04-12 13:29     ` Jerome Glisse
2017-04-12 14:46       ` Moritz Fischer
2017-04-12 15:37         ` Jerome Glisse
2017-04-14 19:48           ` Luebbers, Enno
2017-04-14 20:49             ` Jerome Glisse
2017-04-17 15:35               ` Alan Tull
2017-04-17 15:57                 ` Jerome Glisse
2017-04-17 16:22                   ` Alan Tull
2017-04-17 17:15                     ` Jerome Glisse
2017-04-18 13:36                   ` Alan Cox
2017-04-18 14:59                     ` Jerome Glisse
2017-04-25 20:02                       ` One Thousand Gnomes
2017-05-01 16:41                         ` Jerome Glisse

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