From: Alan Tull <atull@kernel.org>
To: Moritz Fischer <mdf@kernel.org>
Cc: Wu Hao <hao.wu@intel.com>,
matthew.gerlach@linux.intel.com,
Moritz Fischer <moritz.fischer@ettus.com>,
linux-fpga@vger.kernel.org,
linux-kernel <linux-kernel@vger.kernel.org>,
"Kang, Luwei" <luwei.kang@intel.com>,
"Zhang, Yi Z" <yi.z.zhang@intel.com>,
Enno Luebbers <enno.luebbers@intel.com>,
Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: Re: [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview
Date: Tue, 11 Apr 2017 13:02:08 -0500 [thread overview]
Message-ID: <CANk1AXQNidgYbRpO+3Ap32_DXog9M2BxdW+MK0vM8yZAi=jzhg@mail.gmail.com> (raw)
In-Reply-To: <20170402144146.GA30775@tyrael.amer.corp.natinst.com>
On Sun, Apr 2, 2017 at 9:41 AM, Moritz Fischer <mdf@kernel.org> wrote:
> On Sat, Apr 01, 2017 at 07:16:19PM +0800, Wu Hao wrote:
>> On Fri, Mar 31, 2017 at 01:38:06PM -0500, Alan Tull wrote:
>> > On Fri, Mar 31, 2017 at 1:24 PM, <matthew.gerlach@linux.intel.com> wrote:
>> > >
>> > >
>> > > On Thu, 30 Mar 2017, Wu Hao wrote:
>> > >
>> > >
>> > > Hi Wu Hao,
>> > >
>> > > Great documentation. I'm looking forward to diving into the rest of the
>> > > patches. Please see my comments inline.
>> > >
>> > > Matthew Gerlach
>> > >
>> > >
>> > >> Add a document for Intel FPGA driver overview.
>> > >>
>> > >> Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
>> > >> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
>> > >> Signed-off-by: Wu Hao <hao.wu@intel.com>
>> > >> ---
>> > >> Documentation/fpga/intel-fpga.txt | 259
>> > >> ++++++++++++++++++++++++++++++++++++++
>> > >> 1 file changed, 259 insertions(+)
>> > >> create mode 100644 Documentation/fpga/intel-fpga.txt
>> > >>
>> > >> diff --git a/Documentation/fpga/intel-fpga.txt
>> > >> b/Documentation/fpga/intel-fpga.txt
>> > >> new file mode 100644
>> > >> index 0000000..9396cea
>> > >> --- /dev/null
>> > >> +++ b/Documentation/fpga/intel-fpga.txt
>> > >> @@ -0,0 +1,259 @@
>> > >>
>> > >> +===============================================================================
>> > >> + Intel FPGA driver Overview
>> > >>
>> > >> +-------------------------------------------------------------------------------
>> > >> + Enno Luebbers <enno.luebbers@intel.com>
>> > >> + Xiao Guangrong <guangrong.xiao@linux.intel.com>
>> > >> + Wu Hao <hao.wu@intel.com>
>> > >> +
>> > >> +The Intel FPGA driver provides interfaces for userspace applications to
>> > >> +configure, enumerate, open, and access FPGA accelerators on platforms
>> > >> equipped
>> > >> +with Intel(R) FPGA solutions and enables system level management
>> > >> functions such
>> > >> +as FPGA reconfiguration, power management, and virtualization.
>> > >> +
>> > >
>> > >
>> > > From a Linux kernel perspective, I'm not sure this is the best name for
>> > > this code. The name gives me the impression that it is a driver for all
>> > > Intel FPGAs, but not all Intel FPGAs are connected to the processor over a
>> > > PCIe bus. The processor could be directely connected like the Arria10
>> > > SOCFPGA. Such a processor could certainly benefit from this accelerator
>> > > usage model. In an extreme case, couldn't a processor in the FPGA,
>> > > running Linux, also benefit from this accelerator model? Is this code a
>> > > "FPGA Accelerator Framework"?
>> > >
>> > >> +HW Architecture
>> > >> +===============
>> > >> +From the OS's point of view, the FPGA hardware appears as a regular PCIe
>> > >> device.
>> > >> +The FPGA device memory is organized using a predefined data structure
>> > >> (Device
>> > >> +Feature List). Features supported by the particular FPGA device are
>> > >> exposed
>> > >> +through these data structures, as illustrated below:
>> > >> +
>> > >> + +-------------------------------+ +-------------+
>> > >> + | PF | | VF |
>> > >> + +-------------------------------+ +-------------+
>> > >> + ^ ^ ^ ^
>> > >> + | | | |
>> > >> ++-----|------------|---------|--------------|-------+
>> > >> +| | | | | |
>> > >> +| +-----+ +-------+ +-------+ +-------+ |
>> > >> +| | FME | | Port0 | | Port1 | | Port2 | |
>> > >> +| +-----+ +-------+ +-------+ +-------+ |
>> > >> +| ^ ^ ^ |
>> > >> +| | | | |
>> > >> +| +-------+ +------+ +-------+ |
>> > >> +| | AFU | | AFU | | AFU | |
>> > >> +| +-------+ +------+ +-------+ |
>> > >> +| |
>> > >> +| FPGA PCIe Device |
>> > >> ++---------------------------------------------------+
>> > >> +
>> > >> +The driver supports PCIe SR-IOV to create virtual functions (VFs) which
>> > >> can be
>> > >> +used to assign individual accelerators to virtual machines .
>> > >
>> > >
>> > > Does this HW Architecture require an Intel FPGA? Couldn't any vendors FPGA
>> > > be used as long as it presented itself the PCIe bus the same and contained
>> > > an appropriate Device Feature List?
>
> I think this is a good (and important) point. Especially when sysfs
> entries & ioctls constituting ABI depend on it.
Please cc linux-api@vger.kernel.org on your next version of this as
linux/Documentation/process/adding-syscalls.rst specifies for new system calls.
Alan
next prev parent reply other threads:[~2017-04-11 18:03 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-30 12:08 [PATCH 00/16] Intel FPGA Device Drivers Wu Hao
2017-03-30 12:08 ` [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-03-31 18:24 ` matthew.gerlach
2017-03-31 18:38 ` Alan Tull
2017-04-01 11:16 ` Wu Hao
2017-04-02 14:41 ` Moritz Fischer
2017-04-03 20:44 ` Alan Tull
2017-04-04 5:24 ` Wu Hao
2017-04-04 5:06 ` Wu Hao
2017-04-11 18:02 ` Alan Tull [this message]
2017-04-12 3:22 ` Wu, Hao
2017-03-30 12:08 ` [PATCH 02/16] fpga: add FPGA device framework Wu Hao
2017-03-31 6:09 ` Greg KH
2017-03-31 7:48 ` Wu Hao
2017-03-31 9:03 ` Greg KH
2017-03-31 12:19 ` Wu Hao
2017-03-31 19:01 ` matthew.gerlach
2017-04-01 12:18 ` Wu Hao
2017-07-25 21:32 ` Alan Tull
2017-07-26 9:50 ` Wu Hao
2017-07-26 14:20 ` Alan Tull
2017-07-26 22:29 ` Alan Tull
2017-07-27 4:54 ` Wu Hao
2017-03-31 6:13 ` Greg KH
[not found] ` <82D7661F83C1A047AF7DC287873BF1E167C90F1B@SHSMSX101.ccr.corp.intel.com>
2017-03-31 13:31 ` Wu Hao
2017-03-31 14:10 ` Greg KH
2017-04-01 11:36 ` Wu Hao
2017-03-30 12:08 ` [PATCH 03/16] fpga: intel: add FPGA PCIe device driver Wu Hao
2017-04-04 2:10 ` Moritz Fischer
2017-04-05 13:14 ` Wu, Hao
2017-03-30 12:08 ` [PATCH 04/16] fpga: intel: pcie: parse feature list and create platform device for features Wu Hao
2017-04-03 21:44 ` Alan Tull
2017-04-05 11:58 ` Wu Hao
2017-04-11 20:21 ` Alan Tull
2017-04-13 4:12 ` Wu, Hao
2017-04-04 2:44 ` Moritz Fischer
2017-04-05 12:57 ` Wu Hao
2017-04-04 22:09 ` Alan Tull
2017-04-05 14:09 ` Wu Hao
2017-05-04 15:13 ` Li, Yi
2017-05-05 3:03 ` Wu Hao
2017-03-30 12:08 ` [PATCH 05/16] fpga: intel: pcie: add chardev support for feature devices Wu Hao
2017-03-30 12:08 ` [PATCH 06/16] fpga: intel: pcie: adds fpga_for_each_port callback for fme device Wu Hao
2017-03-30 12:08 ` [PATCH 07/16] fpga: intel: add feature device infrastructure Wu Hao
2017-03-30 12:08 ` [PATCH 08/16] fpga: intel: add FPGA Management Engine driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 09/16] fpga: intel: fme: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 10/16] fpga: intel: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 11/16] fpga: intel: fme: add partial reconfiguration sub feature support Wu Hao
2017-03-30 20:30 ` Alan Tull
2017-03-31 4:11 ` Xiao Guangrong
2017-03-31 8:50 ` Wu Hao
2017-04-03 20:26 ` Alan Tull
2017-04-04 5:25 ` Wu Hao
2017-03-31 19:10 ` Alan Tull
2017-04-01 11:08 ` Wu Hao
2017-04-03 16:30 ` Alan Tull
2017-04-04 6:05 ` Wu Hao
2017-04-04 22:37 ` Alan Tull
2017-04-05 11:40 ` Wu, Hao
2017-04-05 15:26 ` Alan Tull
2017-04-05 15:39 ` Alan Tull
2017-04-06 10:57 ` Wu Hao
2017-04-06 19:27 ` Alan Tull
2017-04-07 5:56 ` Wu Hao
2017-03-31 23:45 ` kbuild test robot
2017-04-01 1:12 ` kbuild test robot
2017-04-03 21:24 ` Alan Tull
2017-04-03 22:49 ` matthew.gerlach
2017-04-04 6:48 ` Wu Hao
2017-04-04 6:28 ` Wu Hao
2017-03-30 12:08 ` [PATCH 12/16] fpga: intel: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 13/16] fpga: intel: afu: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 14/16] fpga: intel: afu add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 15/16] fpga: intel: afu: add user afu sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 16/16] fpga: intel: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-04-01 0:00 ` kbuild test robot
2017-04-01 1:33 ` kbuild test robot
2017-03-30 17:17 ` [PATCH 00/16] Intel FPGA Device Drivers Moritz Fischer
2017-04-06 20:27 ` Jerome Glisse
2017-04-11 19:38 ` Luebbers, Enno
2017-04-12 13:29 ` Jerome Glisse
2017-04-12 14:46 ` Moritz Fischer
2017-04-12 15:37 ` Jerome Glisse
2017-04-14 19:48 ` Luebbers, Enno
2017-04-14 20:49 ` Jerome Glisse
2017-04-17 15:35 ` Alan Tull
2017-04-17 15:57 ` Jerome Glisse
2017-04-17 16:22 ` Alan Tull
2017-04-17 17:15 ` Jerome Glisse
2017-04-18 13:36 ` Alan Cox
2017-04-18 14:59 ` Jerome Glisse
2017-04-25 20:02 ` One Thousand Gnomes
2017-05-01 16:41 ` Jerome Glisse
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CANk1AXQNidgYbRpO+3Ap32_DXog9M2BxdW+MK0vM8yZAi=jzhg@mail.gmail.com' \
--to=atull@kernel.org \
--cc=enno.luebbers@intel.com \
--cc=guangrong.xiao@linux.intel.com \
--cc=hao.wu@intel.com \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luwei.kang@intel.com \
--cc=matthew.gerlach@linux.intel.com \
--cc=mdf@kernel.org \
--cc=moritz.fischer@ettus.com \
--cc=yi.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).