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* Re: [PATCH V2,4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701
       [not found] ` <20190118125928.3279-5-wangyan.wang@mediatek.com>
@ 2019-01-24  6:17   ` CK Hu
  2019-01-25  2:28     ` mtk14994
  0 siblings, 1 reply; 2+ messages in thread
From: CK Hu @ 2019-01-24  6:17 UTC (permalink / raw)
  To: Wangyan Wang
  Cc: Michael Turquette, Matthias Brugger, Stephen Boyd, Philipp Zabel,
	David Airlie, chunhui dai, Sean Wang, Ryder Lee, Colin Ian King,
	linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	dri-devel, jitao.shi, bibby.hsieh, srv_heupstream

On Fri, 2019-01-18 at 20:59 +0800, Wangyan Wang wrote:
> From: chunhui dai <chunhui.dai@mediatek.com>

Describe something here.

> 
> Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623")
> Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>

Any one who pass a patch should sign off it.

Regards,
CK

> ---
>  drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> index 43bc058d5528..88dd9e812ca0 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> @@ -114,8 +114,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
>  
>  	if (rate <= 64000000)
>  		pos_div = 3;
> -	else if (rate <= 12800000)
> -		pos_div = 1;
> +	else if (rate <= 128000000)
> +		pos_div = 2;
>  	else
>  		pos_div = 1;
>  



^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH V2,4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701
  2019-01-24  6:17   ` [PATCH V2,4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701 CK Hu
@ 2019-01-25  2:28     ` mtk14994
  0 siblings, 0 replies; 2+ messages in thread
From: mtk14994 @ 2019-01-25  2:28 UTC (permalink / raw)
  To: CK Hu
  Cc: Michael Turquette, Matthias Brugger, Stephen Boyd, Philipp Zabel,
	David Airlie, chunhui dai, Sean Wang, Ryder Lee, Colin Ian King,
	linux-clk, linux-kernel, linux-arm-kernel, linux-mediatek,
	dri-devel, jitao.shi, bibby.hsieh, srv_heupstream

Dear CK,

      OK,I will modify according your comments in V3.

Best Regards
Wangyan Wang


On Thu, 2019-01-24 at 14:17 +0800, CK Hu wrote:
> On Fri, 2019-01-18 at 20:59 +0800, Wangyan Wang wrote:
> > From: chunhui dai <chunhui.dai@mediatek.com>
> 
> Describe something here.
> 
> > 
> > Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623")
> > Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
> 
> Any one who pass a patch should sign off it.
> 
> Regards,
> CK
> 
> > ---
> >  drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> > index 43bc058d5528..88dd9e812ca0 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> > @@ -114,8 +114,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
> >  
> >  	if (rate <= 64000000)
> >  		pos_div = 3;
> > -	else if (rate <= 12800000)
> > -		pos_div = 1;
> > +	else if (rate <= 128000000)
> > +		pos_div = 2;
> >  	else
> >  		pos_div = 1;
> >  
> 
> 



^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2019-01-25  2:28 UTC | newest]

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2019-01-24  6:17   ` [PATCH V2,4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701 CK Hu
2019-01-25  2:28     ` mtk14994

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