* [RFC 1/5] clk: imx: imx8mq: Fix the rate propagation for arm pll
2019-02-13 19:05 [RFC 0/5] Add cpufreq-dt support i.MX8MQ Abel Vesa
@ 2019-02-13 19:05 ` Abel Vesa
2019-02-14 15:51 ` Lucas Stach
2019-02-13 19:05 ` [RFC 2/5] dt-bindings: imx8mq-clock: Add the missing ARM clock Abel Vesa
` (4 subsequent siblings)
5 siblings, 1 reply; 17+ messages in thread
From: Abel Vesa @ 2019-02-13 19:05 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, Abel Vesa
The arm pll bypass needs to propagate the rate upwards
in order for the cpufreq to work.
Fixes: b80522040cd3f ("clk: imx: Add clock driver for i.MX8MQ CCM")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
drivers/clk/imx/clk-imx8mq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 398ab0b..57499ed 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -340,7 +340,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_DRAM_PLL2_DIV] = imx_clk_divider("dram_pll2_div", "dram_pll2", base + 0x68, 1, 6);
/* PLL bypass out */
- clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels));
+ clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
clks[IMX8MQ_GPU_PLL_BYPASS] = imx_clk_mux("gpu_pll_bypass", base + 0x18, 14, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels));
clks[IMX8MQ_VPU_PLL_BYPASS] = imx_clk_mux("vpu_pll_bypass", base + 0x20, 14, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels));
clks[IMX8MQ_AUDIO_PLL1_BYPASS] = imx_clk_mux("audio_pll1_bypass", base + 0x0, 14, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels));
--
2.7.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC 1/5] clk: imx: imx8mq: Fix the rate propagation for arm pll
2019-02-13 19:05 ` [RFC 1/5] clk: imx: imx8mq: Fix the rate propagation for arm pll Abel Vesa
@ 2019-02-14 15:51 ` Lucas Stach
0 siblings, 0 replies; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 15:51 UTC (permalink / raw)
To: Abel Vesa, Rob Herring, Stephen Boyd, Mark Rutland,
Mike Turquette, Shawn Guo, Sascha Hauer, Angus Ainslie,
Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> The arm pll bypass needs to propagate the rate upwards
> in order for the cpufreq to work.
>
> Fixes: b80522040cd3f ("clk: imx: Add clock driver for i.MX8MQ CCM")
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/clk/imx/clk-imx8mq.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
> index 398ab0b..57499ed 100644
> --- a/drivers/clk/imx/clk-imx8mq.c
> +++ b/drivers/clk/imx/clk-imx8mq.c
> @@ -340,7 +340,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
> clks[IMX8MQ_DRAM_PLL2_DIV] = imx_clk_divider("dram_pll2_div", "dram_pll2", base + 0x68, 1, 6);
>
> /* PLL bypass out */
> - clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels));
> + clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
> clks[IMX8MQ_GPU_PLL_BYPASS] = imx_clk_mux("gpu_pll_bypass", base + 0x18, 14, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels));
> clks[IMX8MQ_VPU_PLL_BYPASS] = imx_clk_mux("vpu_pll_bypass", base + 0x20, 14, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels));
> clks[IMX8MQ_AUDIO_PLL1_BYPASS] = imx_clk_mux("audio_pll1_bypass", base + 0x0, 14, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels));
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC 2/5] dt-bindings: imx8mq-clock: Add the missing ARM clock
2019-02-13 19:05 [RFC 0/5] Add cpufreq-dt support i.MX8MQ Abel Vesa
2019-02-13 19:05 ` [RFC 1/5] clk: imx: imx8mq: Fix the rate propagation for arm pll Abel Vesa
@ 2019-02-13 19:05 ` Abel Vesa
2019-02-14 15:51 ` Lucas Stach
2019-02-13 19:05 ` [RFC 3/5] clk: imx8mq: " Abel Vesa
` (3 subsequent siblings)
5 siblings, 1 reply; 17+ messages in thread
From: Abel Vesa @ 2019-02-13 19:05 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, Abel Vesa
Add the missing ARM clock which will be used by cpufreq
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 04f7ac3..47c790c 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -391,5 +391,7 @@
#define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 267
-#define IMX8MQ_CLK_END 268
+#define IMX8MQ_CLK_ARM 268
+
+#define IMX8MQ_CLK_END 269
#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC 2/5] dt-bindings: imx8mq-clock: Add the missing ARM clock
2019-02-13 19:05 ` [RFC 2/5] dt-bindings: imx8mq-clock: Add the missing ARM clock Abel Vesa
@ 2019-02-14 15:51 ` Lucas Stach
0 siblings, 0 replies; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 15:51 UTC (permalink / raw)
To: Abel Vesa, Rob Herring, Stephen Boyd, Mark Rutland,
Mike Turquette, Shawn Guo, Sascha Hauer, Angus Ainslie,
Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> Add the missing ARM clock which will be used by cpufreq
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-
> bindings/clock/imx8mq-clock.h
> index 04f7ac3..47c790c 100644
> --- a/include/dt-bindings/clock/imx8mq-clock.h
> +++ b/include/dt-bindings/clock/imx8mq-clock.h
> @@ -391,5 +391,7 @@
>
> #define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 267
>
> -#define IMX8MQ_CLK_END 268
> +#define IMX8MQ_CLK_ARM 268
> +
> +#define IMX8MQ_CLK_END 269
> #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC 3/5] clk: imx8mq: Add the missing ARM clock
2019-02-13 19:05 [RFC 0/5] Add cpufreq-dt support i.MX8MQ Abel Vesa
2019-02-13 19:05 ` [RFC 1/5] clk: imx: imx8mq: Fix the rate propagation for arm pll Abel Vesa
2019-02-13 19:05 ` [RFC 2/5] dt-bindings: imx8mq-clock: Add the missing ARM clock Abel Vesa
@ 2019-02-13 19:05 ` Abel Vesa
2019-02-14 15:52 ` Lucas Stach
2019-02-13 19:05 ` [RFC 4/5] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores Abel Vesa
` (2 subsequent siblings)
5 siblings, 1 reply; 17+ messages in thread
From: Abel Vesa @ 2019-02-13 19:05 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, Abel Vesa
Add the ARM clock as imx_clk_cpu type.
Will be used by cpufreq.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
drivers/clk/imx/clk-imx8mq.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 57499ed..8a283cb 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -558,6 +558,12 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc_25m", 1, 8);
clks[IMX8MQ_CLK_DRAM_ALT_ROOT] = imx_clk_fixed_factor("dram_alt_root", "dram_alt", 1, 4);
+ clks[IMX8MQ_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_div",
+ clks[IMX8MQ_CLK_A53_DIV],
+ clks[IMX8MQ_CLK_A53_SRC],
+ clks[IMX8MQ_ARM_PLL_OUT],
+ clks[IMX8MQ_SYS1_PLL_800M]);
+
for (i = 0; i < IMX8MQ_CLK_END; i++)
if (IS_ERR(clks[i]))
pr_err("i.MX8mq clk %u register failed with %ld\n",
--
2.7.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC 3/5] clk: imx8mq: Add the missing ARM clock
2019-02-13 19:05 ` [RFC 3/5] clk: imx8mq: " Abel Vesa
@ 2019-02-14 15:52 ` Lucas Stach
0 siblings, 0 replies; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 15:52 UTC (permalink / raw)
To: Abel Vesa, Rob Herring, Stephen Boyd, Mark Rutland,
Mike Turquette, Shawn Guo, Sascha Hauer, Angus Ainslie,
Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> Add the ARM clock as imx_clk_cpu type.
> Will be used by cpufreq.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/clk/imx/clk-imx8mq.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
> index 57499ed..8a283cb 100644
> --- a/drivers/clk/imx/clk-imx8mq.c
> +++ b/drivers/clk/imx/clk-imx8mq.c
> @@ -558,6 +558,12 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
> clks[IMX8MQ_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc_25m", 1, 8);
> clks[IMX8MQ_CLK_DRAM_ALT_ROOT] = imx_clk_fixed_factor("dram_alt_root", "dram_alt", 1, 4);
>
> + clks[IMX8MQ_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_div",
> + clks[IMX8MQ_CLK_A53_DIV],
> + clks[IMX8MQ_CLK_A53_SRC],
> + clks[IMX8MQ_ARM_PLL_OUT],
> + clks[IMX8MQ_SYS1_PLL_800M]);
> +
> for (i = 0; i < IMX8MQ_CLK_END; i++)
> if (IS_ERR(clks[i]))
> pr_err("i.MX8mq clk %u register failed with %ld\n",
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC 4/5] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores
2019-02-13 19:05 [RFC 0/5] Add cpufreq-dt support i.MX8MQ Abel Vesa
` (2 preceding siblings ...)
2019-02-13 19:05 ` [RFC 3/5] clk: imx8mq: " Abel Vesa
@ 2019-02-13 19:05 ` Abel Vesa
2019-02-13 19:05 ` [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes Abel Vesa
2019-02-14 15:55 ` [RFC 0/5] Add cpufreq-dt support i.MX8MQ Lucas Stach
5 siblings, 0 replies; 17+ messages in thread
From: Abel Vesa @ 2019-02-13 19:05 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, Abel Vesa
The clocks and their latencies will be used by cpufreq-dt.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 9155bd4..1a89062 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -87,6 +87,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
@@ -95,6 +97,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
@@ -103,6 +107,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x2>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
@@ -111,6 +117,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x3>;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
--
2.7.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-13 19:05 [RFC 0/5] Add cpufreq-dt support i.MX8MQ Abel Vesa
` (3 preceding siblings ...)
2019-02-13 19:05 ` [RFC 4/5] arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores Abel Vesa
@ 2019-02-13 19:05 ` Abel Vesa
2019-02-14 15:50 ` Lucas Stach
2019-02-15 0:55 ` Angus Ainslie
2019-02-14 15:55 ` [RFC 0/5] Add cpufreq-dt support i.MX8MQ Lucas Stach
5 siblings, 2 replies; 17+ messages in thread
From: Abel Vesa @ 2019-02-13 19:05 UTC (permalink / raw)
To: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, Abel Vesa
Add the opp table containing only non over drive opps.
Also add the cpu-supply nodes for the A53 cores in the EVK board.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17 +++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 54737bf..114359e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -31,6 +31,23 @@
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+};
+
+&A53_0 {
+ cpu-supply = <&sw1a_reg>;
+};
+
+&A53_1 {
+ cpu-supply = <&sw1a_reg>;
+};
+
+&A53_2 {
+ cpu-supply = <&sw1a_reg>;
+};
+
+&A53_3 {
+ cpu-supply = <&sw1a_reg>;
};
&fec1 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 1a89062..89b2d5f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -91,6 +91,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_0_opp_table>;
};
A53_1: cpu@1 {
@@ -101,6 +102,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_0_opp_table>;
};
A53_2: cpu@2 {
@@ -111,6 +113,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_0_opp_table>;
};
A53_3: cpu@3 {
@@ -121,6 +124,7 @@
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_0_opp_table>;
};
A53_L2: l2-cache0 {
@@ -666,6 +670,25 @@
status = "disabled";
};
+
+ a53_0_opp_table: opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <150000>;
+ opp-suspend;
+ };
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */
--
2.7.4
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-13 19:05 ` [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes Abel Vesa
@ 2019-02-14 15:50 ` Lucas Stach
2019-02-14 17:18 ` Abel Vesa
2019-02-15 0:55 ` Angus Ainslie
1 sibling, 1 reply; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 15:50 UTC (permalink / raw)
To: Abel Vesa, Rob Herring, Stephen Boyd, Mark Rutland,
Mike Turquette, Shawn Guo, Sascha Hauer, Angus Ainslie,
Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Hi Abel
Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> Add the opp table containing only non over drive opps.
> Also add the cpu-supply nodes for the A53 cores in the EVK board.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17 +++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++
> 2 files changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> index 54737bf..114359e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> @@ -31,6 +31,23 @@
> gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> enable-active-high;
> };
> +
> +};
> +
> +&A53_0 {
> + cpu-supply = <&sw1a_reg>;
> +};
> +
> +&A53_1 {
> + cpu-supply = <&sw1a_reg>;
> +};
> +
> +&A53_2 {
> + cpu-supply = <&sw1a_reg>;
> +};
> +
> +&A53_3 {
> + cpu-supply = <&sw1a_reg>;
> };
This should be a separate patch.
And AFAICS this is wrong, sw1a on the MX8M-EVK is the GPU supply, the
CPU is supplied by a dedicated switcher that is controlled via a GPIO.
Regards,
Lucas
> &fec1 {
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 1a89062..89b2d5f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -91,6 +91,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_1: cpu@1 {
> @@ -101,6 +102,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_2: cpu@2 {
> @@ -111,6 +113,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_3: cpu@3 {
> @@ -121,6 +124,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_L2: l2-cache0 {
> @@ -666,6 +670,25 @@
> status = "disabled";
> };
>
> +
> + a53_0_opp_table: opp-table {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-800000000 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <900000>;
> + clock-latency-ns = <150000>;
> + };
> +
> + opp-1000000000 {
> + opp-hz = /bits/ 64 <1000000000>;
> + opp-microvolt = <900000>;
> + clock-latency-ns = <150000>;
> + opp-suspend;
> + };
> + };
> +
> gic: interrupt-controller@38800000 {
> compatible = "arm,gic-v3";
> reg = <0x38800000 0x10000>, /* GIC
> Dist */
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-14 15:50 ` Lucas Stach
@ 2019-02-14 17:18 ` Abel Vesa
2019-02-14 17:26 ` Lucas Stach
0 siblings, 1 reply; 17+ messages in thread
From: Abel Vesa @ 2019-02-14 17:18 UTC (permalink / raw)
To: Lucas Stach
Cc: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Angus Ainslie, Anson Huang,
dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
On 19-02-14 16:50:28, Lucas Stach wrote:
> Hi Abel
>
> Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> > Add the opp table containing only non over drive opps.
> > Also add the cpu-supply nodes for the A53 cores in the EVK board.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17 +++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++
> > 2 files changed, 40 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > index 54737bf..114359e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > @@ -31,6 +31,23 @@
> > gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > enable-active-high;
> > };
> > +
> > +};
> > +
> > +&A53_0 {
> > + cpu-supply = <&sw1a_reg>;
> > +};
> > +
> > +&A53_1 {
> > + cpu-supply = <&sw1a_reg>;
> > +};
> > +
> > +&A53_2 {
> > + cpu-supply = <&sw1a_reg>;
> > +};
> > +
> > +&A53_3 {
> > + cpu-supply = <&sw1a_reg>;
> > };
>
> This should be a separate patch.
>
OK, will send as separate patches in the next version.
> And AFAICS this is wrong, sw1a on the MX8M-EVK is the GPU supply, the
> CPU is supplied by a dedicated switcher that is controlled via a GPIO.
>
Hmm, I think you're right. At least this is what the following document says.
https://www.mouser.com/ds/2/302/IMX8MDQLQEVKHUG-1280333.pdf
So I guess this means there will not be any cpu-supply properties.
Thanks,
Abel
> Regards,
> Lucas
>
> > &fec1 {
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 1a89062..89b2d5f 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -91,6 +91,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_1: cpu@1 {
> > @@ -101,6 +102,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_2: cpu@2 {
> > @@ -111,6 +113,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_3: cpu@3 {
> > @@ -121,6 +124,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_L2: l2-cache0 {
> > @@ -666,6 +670,25 @@
> > status = "disabled";
> > };
> >
> > +
> > + a53_0_opp_table: opp-table {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > +
> > + opp-800000000 {
> > + opp-hz = /bits/ 64 <800000000>;
> > + opp-microvolt = <900000>;
> > + clock-latency-ns = <150000>;
> > + };
> > +
> > + opp-1000000000 {
> > + opp-hz = /bits/ 64 <1000000000>;
> > + opp-microvolt = <900000>;
> > + clock-latency-ns = <150000>;
> > + opp-suspend;
> > + };
> > + };
> > +
> > gic: interrupt-controller@38800000 {
> > compatible = "arm,gic-v3";
> > reg = <0x38800000 0x10000>, /* GIC
> > Dist */
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-14 17:18 ` Abel Vesa
@ 2019-02-14 17:26 ` Lucas Stach
2019-02-14 17:32 ` Lucas Stach
0 siblings, 1 reply; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 17:26 UTC (permalink / raw)
To: Abel Vesa
Cc: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Angus Ainslie, Anson Huang,
dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Am Donnerstag, den 14.02.2019, 17:18 +0000 schrieb Abel Vesa:
> On 19-02-14 16:50:28, Lucas Stach wrote:
> > Hi Abel
> >
> > Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> > > Add the opp table containing only non over drive opps.
> > > Also add the cpu-supply nodes for the A53 cores in the EVK board.
> > >
> > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17
> > > +++++++++++++++++
> > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23
> > > +++++++++++++++++++++++
> > > 2 files changed, 40 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > index 54737bf..114359e 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > @@ -31,6 +31,23 @@
> > > gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > > enable-active-high;
> > > };
> > > +
> > > +};
> > > +
> > > +&A53_0 {
> > > + cpu-supply = <&sw1a_reg>;
> > > +};
> > > +
> > > +&A53_1 {
> > > + cpu-supply = <&sw1a_reg>;
> > > +};
> > > +
> > > +&A53_2 {
> > > + cpu-supply = <&sw1a_reg>;
> > > +};
> > > +
> > > +&A53_3 {
> > > + cpu-supply = <&sw1a_reg>;
> > > };
> >
> > This should be a separate patch.
> >
>
> OK, will send as separate patches in the next version.
>
> > And AFAICS this is wrong, sw1a on the MX8M-EVK is the GPU supply,
> > the
> > CPU is supplied by a dedicated switcher that is controlled via a
> > GPIO.
> >
>
> Hmm, I think you're right. At least this is what the following
> document says.
>
> https://www.mouser.com/ds/2/302/IMX8MDQLQEVKHUG-1280333.pdf
>
> So I guess this means there will not be any cpu-supply properties.
There is a variable voltage CPU supply, but you need to model it as a
gpio-regulator in the DT, it's not part of the PMIC provided rails.
Regards,
Lucas
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-14 17:26 ` Lucas Stach
@ 2019-02-14 17:32 ` Lucas Stach
2019-02-14 17:52 ` Abel Vesa
0 siblings, 1 reply; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 17:32 UTC (permalink / raw)
To: Abel Vesa
Cc: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Angus Ainslie, Anson Huang,
dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Am Donnerstag, den 14.02.2019, 18:26 +0100 schrieb Lucas Stach:
> Am Donnerstag, den 14.02.2019, 17:18 +0000 schrieb Abel Vesa:
> > On 19-02-14 16:50:28, Lucas Stach wrote:
> > > Hi Abel
> > >
> > > Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> > > > Add the opp table containing only non over drive opps.
> > > > Also add the cpu-supply nodes for the A53 cores in the EVK
> > > > board.
> > > >
> > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > > ---
> > > > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17
> > > > +++++++++++++++++
> > > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23
> > > > +++++++++++++++++++++++
> > > > 2 files changed, 40 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > index 54737bf..114359e 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > @@ -31,6 +31,23 @@
> > > > gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > > > enable-active-high;
> > > > };
> > > > +
> > > > +};
> > > > +
> > > > +&A53_0 {
> > > > + cpu-supply = <&sw1a_reg>;
> > > > +};
> > > > +
> > > > +&A53_1 {
> > > > + cpu-supply = <&sw1a_reg>;
> > > > +};
> > > > +
> > > > +&A53_2 {
> > > > + cpu-supply = <&sw1a_reg>;
> > > > +};
> > > > +
> > > > +&A53_3 {
> > > > + cpu-supply = <&sw1a_reg>;
> > > > };
> > >
> > > This should be a separate patch.
> > >
> >
> > OK, will send as separate patches in the next version.
> >
> > > And AFAICS this is wrong, sw1a on the MX8M-EVK is the GPU supply,
> > > the
> > > CPU is supplied by a dedicated switcher that is controlled via a
> > > GPIO.
> > >
> >
> > Hmm, I think you're right. At least this is what the following
> > document says.
> >
> > https://www.mouser.com/ds/2/302/IMX8MDQLQEVKHUG-1280333.pdf
> >
> > So I guess this means there will not be any cpu-supply properties.
>
> There is a variable voltage CPU supply, but you need to model it as a
> gpio-regulator in the DT, it's not part of the PMIC provided rails.
In the schematics it's the line called PWM_LED (actually it's just
GPIO1_IO13) that controls the voltage. This changes the feedback of the
DCDC switcher, so it can toggle between 0.9V and 1.0V.
Regards,
Lucas
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-14 17:32 ` Lucas Stach
@ 2019-02-14 17:52 ` Abel Vesa
0 siblings, 0 replies; 17+ messages in thread
From: Abel Vesa @ 2019-02-14 17:52 UTC (permalink / raw)
To: Lucas Stach
Cc: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Angus Ainslie, Anson Huang,
dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
On 19-02-14 18:32:40, Lucas Stach wrote:
> Am Donnerstag, den 14.02.2019, 18:26 +0100 schrieb Lucas Stach:
> > Am Donnerstag, den 14.02.2019, 17:18 +0000 schrieb Abel Vesa:
> > > On 19-02-14 16:50:28, Lucas Stach wrote:
> > > > Hi Abel
> > > >
> > > > Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> > > > > Add the opp table containing only non over drive opps.
> > > > > Also add the cpu-supply nodes for the A53 cores in the EVK
> > > > > board.
> > > > >
> > > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > > > ---
> > > > > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17
> > > > > +++++++++++++++++
> > > > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23
> > > > > +++++++++++++++++++++++
> > > > > 2 files changed, 40 insertions(+)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > > index 54737bf..114359e 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > > > @@ -31,6 +31,23 @@
> > > > > gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > > > > enable-active-high;
> > > > > };
> > > > > +
> > > > > +};
> > > > > +
> > > > > +&A53_0 {
> > > > > + cpu-supply = <&sw1a_reg>;
> > > > > +};
> > > > > +
> > > > > +&A53_1 {
> > > > > + cpu-supply = <&sw1a_reg>;
> > > > > +};
> > > > > +
> > > > > +&A53_2 {
> > > > > + cpu-supply = <&sw1a_reg>;
> > > > > +};
> > > > > +
> > > > > +&A53_3 {
> > > > > + cpu-supply = <&sw1a_reg>;
> > > > > };
> > > >
> > > > This should be a separate patch.
> > > >
> > >
> > > OK, will send as separate patches in the next version.
> > >
> > > > And AFAICS this is wrong, sw1a on the MX8M-EVK is the GPU supply,
> > > > the
> > > > CPU is supplied by a dedicated switcher that is controlled via a
> > > > GPIO.
> > > >
> > >
> > > Hmm, I think you're right. At least this is what the following
> > > document says.
> > >
> > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.mouser.com%2Fds%2F2%2F302%2FIMX8MDQLQEVKHUG-1280333.pdf&data=02%7C01%7Cabel.vesa%40nxp.com%7Cf7666164aff84f6f975d08d692a26c2a%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636857623628438873&sdata=EJJdfD8ewEXVQSTf2FqjEeUqGJd%2BwW94OQag428lszY%3D&reserved=0
> > >
> > > So I guess this means there will not be any cpu-supply properties.
> >
> > There is a variable voltage CPU supply, but you need to model it as a
> > gpio-regulator in the DT, it's not part of the PMIC provided rails.
>
> In the schematics it's the line called PWM_LED (actually it's just
> GPIO1_IO13) that controls the voltage. This changes the feedback of the
> DCDC switcher, so it can toggle between 0.9V and 1.0V.
>
Thanks, will look into it tomorrow when I get back at the office.
> Regards,
> Lucas
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-13 19:05 ` [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes Abel Vesa
2019-02-14 15:50 ` Lucas Stach
@ 2019-02-15 0:55 ` Angus Ainslie
2019-02-15 8:56 ` Abel Vesa
1 sibling, 1 reply; 17+ messages in thread
From: Angus Ainslie @ 2019-02-15 0:55 UTC (permalink / raw)
To: Abel Vesa
Cc: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang,
dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, linux-kernel-owner
On 2019-02-13 11:05, Abel Vesa wrote:
> Add the opp table containing only non over drive opps.
> Also add the cpu-supply nodes for the A53 cores in the EVK board.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17 +++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23
> +++++++++++++++++++++++
> 2 files changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> index 54737bf..114359e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> @@ -31,6 +31,23 @@
> gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> enable-active-high;
> };
> +
> +};
> +
> +&A53_0 {
> + cpu-supply = <&sw1a_reg>;
> +};
> +
> +&A53_1 {
> + cpu-supply = <&sw1a_reg>;
> +};
> +
> +&A53_2 {
> + cpu-supply = <&sw1a_reg>;
> +};
> +
> +&A53_3 {
> + cpu-supply = <&sw1a_reg>;
> };
>
> &fec1 {
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 1a89062..89b2d5f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -91,6 +91,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_1: cpu@1 {
> @@ -101,6 +102,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_2: cpu@2 {
> @@ -111,6 +113,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_3: cpu@3 {
> @@ -121,6 +124,7 @@
> clocks = <&clk IMX8MQ_CLK_ARM>;
> enable-method = "psci";
> next-level-cache = <&A53_L2>;
> + operating-points-v2 = <&a53_0_opp_table>;
> };
>
> A53_L2: l2-cache0 {
> @@ -666,6 +670,25 @@
> status = "disabled";
> };
>
> +
> + a53_0_opp_table: opp-table {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-800000000 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <900000>;
> + clock-latency-ns = <150000>;
> + };
> +
> + opp-1000000000 {
> + opp-hz = /bits/ 64 <1000000000>;
> + opp-microvolt = <900000>;
Shouldn't this be
opp-microvolt = <1000000>;
> + clock-latency-ns = <150000>;
> + opp-suspend;
> + };
> + };
> +
> gic: interrupt-controller@38800000 {
> compatible = "arm,gic-v3";
> reg = <0x38800000 0x10000>, /* GIC Dist */
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
2019-02-15 0:55 ` Angus Ainslie
@ 2019-02-15 8:56 ` Abel Vesa
0 siblings, 0 replies; 17+ messages in thread
From: Abel Vesa @ 2019-02-15 8:56 UTC (permalink / raw)
To: Angus Ainslie
Cc: Rob Herring, Stephen Boyd, Mark Rutland, Mike Turquette,
Shawn Guo, Sascha Hauer, Lucas Stach, Angus Ainslie, Anson Huang,
dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree, linux-kernel-owner
On 19-02-14 16:55:22, Angus Ainslie wrote:
> On 2019-02-13 11:05, Abel Vesa wrote:
> > Add the opp table containing only non over drive opps.
> > Also add the cpu-supply nodes for the A53 cores in the EVK board.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17 +++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23
> > +++++++++++++++++++++++
> > 2 files changed, 40 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > index 54737bf..114359e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > @@ -31,6 +31,23 @@
> > gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > enable-active-high;
> > };
> > +
> > +};
> > +
> > +&A53_0 {
> > + cpu-supply = <&sw1a_reg>;
> > +};
> > +
> > +&A53_1 {
> > + cpu-supply = <&sw1a_reg>;
> > +};
> > +
> > +&A53_2 {
> > + cpu-supply = <&sw1a_reg>;
> > +};
> > +
> > +&A53_3 {
> > + cpu-supply = <&sw1a_reg>;
> > };
> >
> > &fec1 {
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 1a89062..89b2d5f 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -91,6 +91,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_1: cpu@1 {
> > @@ -101,6 +102,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_2: cpu@2 {
> > @@ -111,6 +113,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_3: cpu@3 {
> > @@ -121,6 +124,7 @@
> > clocks = <&clk IMX8MQ_CLK_ARM>;
> > enable-method = "psci";
> > next-level-cache = <&A53_L2>;
> > + operating-points-v2 = <&a53_0_opp_table>;
> > };
> >
> > A53_L2: l2-cache0 {
> > @@ -666,6 +670,25 @@
> > status = "disabled";
> > };
> >
> > +
> > + a53_0_opp_table: opp-table {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > +
> > + opp-800000000 {
> > + opp-hz = /bits/ 64 <800000000>;
> > + opp-microvolt = <900000>;
> > + clock-latency-ns = <150000>;
> > + };
> > +
> > + opp-1000000000 {
> > + opp-hz = /bits/ 64 <1000000000>;
> > + opp-microvolt = <900000>;
>
> Shouldn't this be
>
> opp-microvolt = <1000000>;
>
Hmm, I looked into some older datasheet which said the maximum non
overdrive is 1GHz.
But the latest one I could find:
https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQIEC.pdf
says it's 0.8GHz.
So I'll fix it in the next version.
Thanks.
> > + clock-latency-ns = <150000>;
> > + opp-suspend;
> > + };
> > + };
> > +
> > gic: interrupt-controller@38800000 {
> > compatible = "arm,gic-v3";
> > reg = <0x38800000 0x10000>, /* GIC Dist */
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFC 0/5] Add cpufreq-dt support i.MX8MQ
2019-02-13 19:05 [RFC 0/5] Add cpufreq-dt support i.MX8MQ Abel Vesa
` (4 preceding siblings ...)
2019-02-13 19:05 ` [RFC 5/5] arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes Abel Vesa
@ 2019-02-14 15:55 ` Lucas Stach
5 siblings, 0 replies; 17+ messages in thread
From: Lucas Stach @ 2019-02-14 15:55 UTC (permalink / raw)
To: Abel Vesa, Rob Herring, Stephen Boyd, Mark Rutland,
Mike Turquette, Shawn Guo, Sascha Hauer, Angus Ainslie,
Anson Huang
Cc: dl-linux-imx, Linux Kernel Mailing List, linux-arm-kernel,
linux-clk, devicetree
Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa:
> I'm sending this as a patchseries (RFC) just to show all the changes
> needed for this to work. I'll resend separately once I get some
> feedback
> on the entire thing.
>
> One thing that is missing compared to the earlier work
> (here: https://patchwork.kernel.org/patch/10807821/ )
> is the speed grading. That can be done as a separate change
> once I figure out how to do it with cpufreq-dt.
>
> Unfortumately, there is a need to update the dt-bindings
> once again in order to add missing ARM clock from patches 1 and 2.
Which isn't much of a problem as it's a backward compatible change. A
new kernel with cpufreq support will not find the clock when started
with an old DT and thus not expose cpufreq support. I.e. it's working
with exactly the same functionality level as a kernel matching the old
DT.
Regards,
Lucas
> Abel Vesa (5):
> clk: imx: imx8mq: Fix the rate propagation for arm pll
> dt-bindings: imx8mq-clock: Add the missing ARM clock
> clk: imx8mq: Add the missing ARM clock
> arm64: dts: imx8mq: Add the clocks and the latencies for the A53
> cores
> arm64: dts: imx8mq: Add the opp table and the cpu-supply nodes
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 17 +++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31
> ++++++++++++++++++++++++++++
> drivers/clk/imx/clk-imx8mq.c | 8 ++++++-
> include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
> 4 files changed, 58 insertions(+), 2 deletions(-)
>
^ permalink raw reply [flat|nested] 17+ messages in thread