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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<talho@nvidia.com>, <skomatineni@nvidia.com>,
	<broonie@kernel.org>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <kyarlagadda@nvidia.com>
Cc: <ldewangan@nvidia.com>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: [PATCH V1 14/26] spi: tegra114: add 3 wire transfer mode support
Date: Tue, 26 Mar 2019 22:56:35 -0700	[thread overview]
Message-ID: <1553666207-11414-14-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1553666207-11414-1-git-send-email-skomatineni@nvidia.com>

This patch adds 3 wire transfer support to SPI mode list and also
implements it.

3 wire or Bi-directional mode uses only one serial data pin for
the transfer. SPI in master mode uses MOSI data line only and MISO
data line is not used by the SPI.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/spi/spi-tegra114.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 335c594d5b74..01efb615a196 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -755,6 +755,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
 		else
 			command1 &= ~SPI_LSBIT_FE;
 
+		if (spi->mode & SPI_3WIRE)
+			command1 |= SPI_BIDIROE;
+		else
+			command1 &= ~SPI_BIDIROE;
+
 		if (tspi->cs_control) {
 			if (tspi->cs_control != spi)
 				tegra_spi_writel(tspi, command1, SPI_COMMAND1);
@@ -1148,7 +1153,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
 
 	/* the spi->mode bits understood by this driver: */
 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST |
-			    SPI_TX_DUAL | SPI_RX_DUAL;
+			    SPI_TX_DUAL | SPI_RX_DUAL | SPI_3WIRE;
 	master->setup = tegra_spi_setup;
 	master->transfer_one_message = tegra_spi_transfer_one_message;
 	master->num_chipselect = MAX_CHIP_SELECT;
-- 
2.7.4


  parent reply	other threads:[~2019-03-27  5:58 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-27  5:56 [PATCH V1 01/26] spi: tegra114: fix PIO transfer Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 02/26] spi: tegra114: clear packed bit for unpacked mode Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: clear packed bit for unpacked mode" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 03/26] spi: tegra114: fix for unpacked mode transfers Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: fix for unpacked mode transfers" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 04/26] spi: tegra114: use packed mode for 32 bits per word Sowjanya Komatineni
2019-04-01  7:39   ` Mark Brown
2019-04-01 18:38     ` Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: use packed mode for 32 bits per word" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 05/26] spi: tegra114: use unpacked mode for below 4 byte transfers Sowjanya Komatineni
2019-04-01  8:26   ` Mark Brown
2019-03-27  5:56 ` [PATCH V1 06/26] spi: tegra114: terminate dma and reset on transfer timeout Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: terminate dma and reset on transfer timeout" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 07/26] spi: tegra114: flush fifos Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: flush fifos" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 08/26] spi: tegra114: configure dma burst size to fifo trig level Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 09/26] spi: tegra114: dump SPI registers during timeout Sowjanya Komatineni
2019-04-01  7:39   ` Mark Brown
2019-03-27  5:56 ` [PATCH V1 10/26] spi: tegra114: avoid reset call in atomic context Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 11/26] spi: tegra114: reset controller on probe Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: reset controller on probe" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 12/26] spi: tegra114: add SPI_LSB_FIRST support Sowjanya Komatineni
2019-04-01  8:54   ` Applied "spi: tegra114: add SPI_LSB_FIRST support" to the spi tree Mark Brown
2019-03-27  5:56 ` [PATCH V1 13/26] spi: tegra114: add dual mode support Sowjanya Komatineni
2019-03-27  5:56 ` Sowjanya Komatineni [this message]
2019-03-27  5:56 ` [PATCH V1 15/26] spi: tegra114: set supported bits_per_word Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 16/26] spi: tegra114: set bus number based on id Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 17/26] spi: tegra114: add support for interrupt mask Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 18/26] spi: tegra114: add support for hw based cs Sowjanya Komatineni
2019-04-01  7:48   ` Mark Brown
2019-04-01 18:40     ` Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 19/26] DT bindings: spi: add spi client device properties Sowjanya Komatineni
2019-04-01  7:37   ` Mark Brown
2019-04-01 17:59     ` Sowjanya Komatineni
2019-04-02  4:52       ` Mark Brown
2019-03-27  5:56 ` [PATCH V1 20/26] spi: tegra114: add support for tuning HW CS timing Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 21/26] DT bindings: spi: add tx/rx clock delay SPI client properties Sowjanya Komatineni
2019-03-31  6:42   ` Rob Herring
2019-04-02 20:27     ` Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 22/26] spi: tegra114: add support for tuning clock delay Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 23/26] spi: tegra114: add support for gpio based cs Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 24/26] spi: tegra114: de-assert CS before SPI mode is reset to its default Sowjanya Komatineni
2019-04-01  7:49   ` Mark Brown
2019-04-01 18:07     ` Sowjanya Komatineni
2019-04-02  4:52       ` Mark Brown
2019-03-27  5:56 ` [PATCH V1 25/26] spi: expand mode and mode_bits support Sowjanya Komatineni
2019-03-27  5:56 ` [PATCH V1 26/26] spi: tegra114: add support for LSBYTE_FIRST Sowjanya Komatineni

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