From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: Mark Brown <broonie@kernel.org>
Cc: "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Timo Alho <talho@nvidia.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"Krishna Yarlagadda" <kyarlagadda@nvidia.com>,
Laxman Dewangan <ldewangan@nvidia.com>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [PATCH V1 19/26] DT bindings: spi: add spi client device properties
Date: Mon, 1 Apr 2019 17:59:57 +0000 [thread overview]
Message-ID: <BYAPR12MB3398F515727D46DE21C54FD6C2550@BYAPR12MB3398.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20190401073723.GH2059@sirena.org.uk>
> On Tue, Mar 26, 2019 at 10:56:40PM -0700, Sowjanya Komatineni wrote:
> > This patch adds below cs timing properties to allow SPI master
> > configuring setup, hold and time interval between two SPI transactions
> > to meet specific SPI client device requirements.
> > CS setup time
> > CS hold time
> > CS inactive delay
> > DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
> > t=1553666253; bh=TbJVgRAIkjok3TkKNkfcvYc4WGyZhOpiH6sUZvadGrQ=;
> > h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
> > In-Reply-To:References:X-NVConfidentiality:MIME-Version:
> > Content-Type;
> > b=Tud9guY5XCzkjKA2k2n0+xO/vTfMTNhH1e0viAyYmlgoG/j+uSBAAmOeZucVUlmEa
> > rwqxlSm+rkYMUfgSWqmJXqEjgRIAqMhA32FOJmhgpblGwYUR22hnbdhbk4TcqMNsIO
>
> Something got corrupted?
Possible. Will re-send anyway with your feedback fixes.
> > +spi-client device controller properties:
> > +- nvidia,cs-setup-clk-count: CS setup timing parameter.
> > +- nvidia,cs-hold-clk-count: CS hold timing parameter.
> > +- nvidia,cs-inactive-cycles: CS inactive delay in terms of clock
> > +between
> > + transfers.
>
> Why are these being done as nVidia specific properties rather than generic ones and why are these being configured in DT rather than by the client driver? If the devices have particular timing requirements for chip select presumably that's going to apply no matter what controller or system they're used with so it seems best to configure this in the client driver and have an API that any controller can implement.
These are implemented thru DT as Tegra SPI is master and master controls the timing.
Some SPI slaves have specific requirements of certain CS setup/hold time and inactive cycles which SPI master should meet when driving during transfer and Tegra SPI controller supports tuning these parameters.
next prev parent reply other threads:[~2019-04-01 18:00 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 5:56 [PATCH V1 01/26] spi: tegra114: fix PIO transfer Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 02/26] spi: tegra114: clear packed bit for unpacked mode Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: clear packed bit for unpacked mode" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 03/26] spi: tegra114: fix for unpacked mode transfers Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: fix for unpacked mode transfers" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 04/26] spi: tegra114: use packed mode for 32 bits per word Sowjanya Komatineni
2019-04-01 7:39 ` Mark Brown
2019-04-01 18:38 ` Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: use packed mode for 32 bits per word" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 05/26] spi: tegra114: use unpacked mode for below 4 byte transfers Sowjanya Komatineni
2019-04-01 8:26 ` Mark Brown
2019-03-27 5:56 ` [PATCH V1 06/26] spi: tegra114: terminate dma and reset on transfer timeout Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: terminate dma and reset on transfer timeout" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 07/26] spi: tegra114: flush fifos Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: flush fifos" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 08/26] spi: tegra114: configure dma burst size to fifo trig level Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 09/26] spi: tegra114: dump SPI registers during timeout Sowjanya Komatineni
2019-04-01 7:39 ` Mark Brown
2019-03-27 5:56 ` [PATCH V1 10/26] spi: tegra114: avoid reset call in atomic context Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 11/26] spi: tegra114: reset controller on probe Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: reset controller on probe" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 12/26] spi: tegra114: add SPI_LSB_FIRST support Sowjanya Komatineni
2019-04-01 8:54 ` Applied "spi: tegra114: add SPI_LSB_FIRST support" to the spi tree Mark Brown
2019-03-27 5:56 ` [PATCH V1 13/26] spi: tegra114: add dual mode support Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 14/26] spi: tegra114: add 3 wire transfer " Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 15/26] spi: tegra114: set supported bits_per_word Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 16/26] spi: tegra114: set bus number based on id Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 17/26] spi: tegra114: add support for interrupt mask Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 18/26] spi: tegra114: add support for hw based cs Sowjanya Komatineni
2019-04-01 7:48 ` Mark Brown
2019-04-01 18:40 ` Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 19/26] DT bindings: spi: add spi client device properties Sowjanya Komatineni
2019-04-01 7:37 ` Mark Brown
2019-04-01 17:59 ` Sowjanya Komatineni [this message]
2019-04-02 4:52 ` Mark Brown
2019-03-27 5:56 ` [PATCH V1 20/26] spi: tegra114: add support for tuning HW CS timing Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 21/26] DT bindings: spi: add tx/rx clock delay SPI client properties Sowjanya Komatineni
2019-03-31 6:42 ` Rob Herring
2019-04-02 20:27 ` Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 22/26] spi: tegra114: add support for tuning clock delay Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 23/26] spi: tegra114: add support for gpio based cs Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 24/26] spi: tegra114: de-assert CS before SPI mode is reset to its default Sowjanya Komatineni
2019-04-01 7:49 ` Mark Brown
2019-04-01 18:07 ` Sowjanya Komatineni
2019-04-02 4:52 ` Mark Brown
2019-03-27 5:56 ` [PATCH V1 25/26] spi: expand mode and mode_bits support Sowjanya Komatineni
2019-03-27 5:56 ` [PATCH V1 26/26] spi: tegra114: add support for LSBYTE_FIRST Sowjanya Komatineni
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